[go: up one dir, main page]

DE3681193D1 - Auf einem verbundhalbleitersubstrat gebildete logische integrierte schaltungsvorrichtung. - Google Patents

Auf einem verbundhalbleitersubstrat gebildete logische integrierte schaltungsvorrichtung.

Info

Publication number
DE3681193D1
DE3681193D1 DE8686106035T DE3681193T DE3681193D1 DE 3681193 D1 DE3681193 D1 DE 3681193D1 DE 8686106035 T DE8686106035 T DE 8686106035T DE 3681193 T DE3681193 T DE 3681193T DE 3681193 D1 DE3681193 D1 DE 3681193D1
Authority
DE
Germany
Prior art keywords
integrated circuit
semiconductor substrate
circuit device
device formed
composite semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8686106035T
Other languages
English (en)
Inventor
Hiromitsu Hirayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE3681193D1 publication Critical patent/DE3681193D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/018535—Interface arrangements of Schottky barrier type [MESFET]
    • H03K19/018542—Interface arrangements of Schottky barrier type [MESFET] with at least one differential stage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/09432—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors with coupled sources or source coupled logic
    • H03K19/09436—Source coupled field-effect logic [SCFL]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Amplifiers (AREA)
DE8686106035T 1985-05-02 1986-05-02 Auf einem verbundhalbleitersubstrat gebildete logische integrierte schaltungsvorrichtung. Expired - Lifetime DE3681193D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9490585 1985-05-02

Publications (1)

Publication Number Publication Date
DE3681193D1 true DE3681193D1 (de) 1991-10-10

Family

ID=14123034

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686106035T Expired - Lifetime DE3681193D1 (de) 1985-05-02 1986-05-02 Auf einem verbundhalbleitersubstrat gebildete logische integrierte schaltungsvorrichtung.

Country Status (4)

Country Link
US (1) US4743957A (de)
EP (1) EP0200230B1 (de)
JP (1) JPS62283718A (de)
DE (1) DE3681193D1 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2594610A1 (fr) * 1986-02-18 1987-08-21 Labo Electronique Physique Dispositif semiconducteur du type reseau de portes prediffuse pour circuits a la demande
US4831284A (en) * 1988-03-22 1989-05-16 International Business Machines Corporation Two level differential current switch MESFET logic
FR2648971B1 (fr) * 1989-06-23 1991-09-06 Thomson Composants Microondes Circuit d'interface de sortie entre deux circuits numeriques de natures differentes
EP0417335A1 (de) * 1989-09-11 1991-03-20 Siemens Aktiengesellschaft Schaltungsanordnung zur Wandlung von Signalen mit TTL-Pegel in Signale mit CML-Pegel oder ECL-Pegel
DE4006504A1 (de) * 1990-03-02 1991-09-05 Telefunken Electronic Gmbh Schaltungsanordnung fuer opto-schmitt-trigger
JPH03270319A (ja) * 1990-03-19 1991-12-02 Fujitsu Ltd レベル変換回路
JPH0454724A (ja) * 1990-06-22 1992-02-21 Sumitomo Electric Ind Ltd 論理回路
JPH07226667A (ja) * 1993-06-22 1995-08-22 Nec Corp 入力回路
JPH11145397A (ja) * 1997-11-11 1999-05-28 Mitsubishi Electric Corp 半導体集積回路装置
JP2002370363A (ja) * 2001-06-15 2002-12-24 Canon Inc インクジェット記録ヘッド用基板、インクジェット記録ヘッド、インクジェット記録装置
CN111404537B (zh) * 2020-03-05 2023-09-26 中科亿海微电子科技（苏州）有限公司 一种用于fpga的过压输入i/o缓冲器电路

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5066146A (de) * 1973-10-12 1975-06-04
FR2264434B1 (de) * 1974-03-12 1976-07-16 Thomson Csf
US4410815A (en) * 1981-09-24 1983-10-18 Sperry Corporation Gallium arsenide to emitter coupled logic level converter
US4404480A (en) * 1982-02-01 1983-09-13 Sperry Corporation High speed-low power gallium arsenide basic logic circuit
US4496856A (en) * 1982-07-21 1985-01-29 Sperry Corporation GaAs to ECL level converter
US4494016A (en) * 1982-07-26 1985-01-15 Sperry Corporation High performance MESFET transistor for VLSI implementation
JPS59117328A (ja) * 1982-12-24 1984-07-06 Hitachi Ltd 論理回路
JPH0773207B2 (ja) * 1984-05-11 1995-08-02 セイコーエプソン株式会社 出力回路

Also Published As

Publication number Publication date
EP0200230A2 (de) 1986-11-05
JPS62283718A (ja) 1987-12-09
EP0200230A3 (en) 1987-04-08
EP0200230B1 (de) 1991-09-04
US4743957A (en) 1988-05-10

Similar Documents

Publication Publication Date Title
DE3688088D1 (de) Integrierte halbleiterschaltung.
DE68929486D1 (de) Integrierte Halbleiterschaltungsanordnung mit Leiterschichten
DE3669017D1 (de) Leistungshalbleitermodul mit keramiksubstrat.
FR2609841B1 (fr) Dispositif de circuit integre a semi-conducteurs
DE3689031D1 (de) Integrierte Halbleiterschaltung mit Prüfschaltung.
DE3685071D1 (de) Integrierte halbleiterschaltung.
DE68909452D1 (de) Integrierte monolithische schaltung mit einem pruefbus.
IT8421908A0 (it) Dispositivo a circuito integrato a semiconduttore.
DE68921088D1 (de) Integrierte Halbleiterschaltung.
DE3581077D1 (de) Ausweiskarte mit integriertem halbleiterschaltkreis.
DE3685759D1 (de) Integrierte halbleiterschaltung.
DE68918164D1 (de) Integrierte Halbleiterschaltung mit einem CMOS-Inverter.
KR850007157A (ko) 반도체 집적 회로장치
DE3680774D1 (de) Integriertes halbleiterbauelement.
DE69010034D1 (de) Halbleiteranordnung mit einer Schutzschaltung.
DE3582804D1 (de) Lichtemittierende halbleiterschaltung.
DE3879813D1 (de) Integrierte halbleiterschaltung mit signallinien.
DE3680265D1 (de) Halbleiterschaltungsanordnung.
DE3684364D1 (de) Integrierte halbleiterschaltung.
DE3668517D1 (de) Logischer schaltungsentwurf fuer hochintegrierte schaltkreise.
FR2553542B1 (fr) Circuit integre a semi-conducteurs
DE3677165D1 (de) Integrierte halbleiterschaltungsanordnung.
DE3681193D1 (de) Auf einem verbundhalbleitersubstrat gebildete logische integrierte schaltungsvorrichtung.
DE3772425D1 (de) Integrierter widerstand auf einem halbleitersubstrat.
DE3888148D1 (de) Integrierte Schaltung mit einem Lateraltransistor.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee