DE10196595T1 - Vorrichtung und Halbleiter-Prüfvorrichtung - Google Patents
Vorrichtung und Halbleiter-PrüfvorrichtungInfo
- Publication number
- DE10196595T1 DE10196595T1 DE10196595T DE10196595T DE10196595T1 DE 10196595 T1 DE10196595 T1 DE 10196595T1 DE 10196595 T DE10196595 T DE 10196595T DE 10196595 T DE10196595 T DE 10196595T DE 10196595 T1 DE10196595 T1 DE 10196595T1
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor test
- test device
- semiconductor
- test
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
- H03M1/0626—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by filtering
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/3167—Testing of combined analog and digital circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/08—Continuously compensating for, or preventing, undesired influence of physical parameters of noise
- H03M1/0836—Continuously compensating for, or preventing, undesired influence of physical parameters of noise of phase error, e.g. jitter
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/1205—Multiplexed conversion systems
- H03M1/121—Interleaved, i.e. using multiple converters or converter parts for one channel
- H03M1/1215—Interleaved, i.e. using multiple converters or converter parts for one channel using time-division multiplexing
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000-260271 | 2000-08-30 | ||
JP2000260271A JP4560187B2 (ja) | 2000-08-30 | 2000-08-30 | インターリーブad変換方式波形ディジタイザ装置 |
PCT/JP2001/007466 WO2002018966A1 (fr) | 2000-08-30 | 2001-08-30 | Numeriseur et instrument de test semiconducteur |
Publications (2)
Publication Number | Publication Date |
---|---|
DE10196595T1 true DE10196595T1 (de) | 2003-07-17 |
DE10196595B4 DE10196595B4 (de) | 2009-05-14 |
Family
ID=18748309
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE10196595T Expired - Fee Related DE10196595B4 (de) | 2000-08-30 | 2001-08-30 | Digitalisierungsvorrichtung und Halbleiter-Prüfvorrichtung |
Country Status (4)
Country | Link |
---|---|
US (1) | US6700515B2 (de) |
JP (1) | JP4560187B2 (de) |
DE (1) | DE10196595B4 (de) |
WO (1) | WO2002018966A1 (de) |
Families Citing this family (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2390447A (en) * | 2002-07-02 | 2004-01-07 | Hewlett Packard Co | Fault prediction in logical networks |
WO2004072668A1 (en) * | 2003-02-13 | 2004-08-26 | Mcgill Iniversity | Mixed-signal-device testing |
US6836227B2 (en) * | 2003-02-25 | 2004-12-28 | Advantest Corporation | Digitizer module, a waveform generating module, a converting method, a waveform generating method and a recording medium for recording a program thereof |
WO2005082060A2 (en) | 2004-02-25 | 2005-09-09 | Xplore Technologies Corporation | Apparatus providing multi-mode digital input |
JP3947185B2 (ja) * | 2004-06-01 | 2007-07-18 | 株式会社アドバンテスト | アナログディジタル変換方法、及びアナログディジタル変換装置 |
US7038602B1 (en) * | 2004-10-30 | 2006-05-02 | Agilent Technologies, Inc. | Method for correcting periodic sampling errors |
US7053804B1 (en) * | 2004-11-18 | 2006-05-30 | Analog Devices, Inc. | Phase-error reduction methods and controllers for time-interleaved analog-to-digital systems |
US8266196B2 (en) * | 2005-03-11 | 2012-09-11 | Qualcomm Incorporated | Fast Fourier transform twiddle multiplication |
US8229014B2 (en) * | 2005-03-11 | 2012-07-24 | Qualcomm Incorporated | Fast fourier transform processing in an OFDM system |
US7183953B2 (en) * | 2005-03-31 | 2007-02-27 | Teradyne, Inc. | Calibrating automatic test equipment containing interleaved analog-to-digital converters |
TWI282216B (en) * | 2005-04-13 | 2007-06-01 | Realtek Semiconductor Corp | Correlation circuit for time-interleaved ADC and method thereof |
US7292166B2 (en) * | 2005-05-26 | 2007-11-06 | Advantest Corporation | Analog/digital converter and program therefor |
US7460043B2 (en) * | 2005-06-03 | 2008-12-02 | General Electric Company | Analog-to-digital converter compensation system and method |
JP4895551B2 (ja) * | 2005-08-10 | 2012-03-14 | 株式会社アドバンテスト | 試験装置および試験方法 |
EP1999606A4 (de) * | 2006-02-22 | 2011-09-21 | Univ Akron | Verschachteltes verfahren zur parallelen implementierung der schnellen fourier-transformation |
US7495591B2 (en) * | 2006-06-30 | 2009-02-24 | Agilent Technologies, Inc. | Performing a signal analysis based on digital samples in conjunction with analog samples |
US7541958B2 (en) * | 2006-12-30 | 2009-06-02 | Teradyne, Inc. | Error reduction for parallel, time-interleaved analog-to-digital converter |
US7538708B2 (en) * | 2006-12-30 | 2009-05-26 | Teradyne, Inc. | Efficient, selective error reduction for parallel, time-interleaved analog-to-digital converter |
US7817076B2 (en) * | 2007-08-16 | 2010-10-19 | Olympus Ndt | Multiple mode digitization system for a non-destructive inspection instrument |
JP2009272683A (ja) | 2008-04-30 | 2009-11-19 | Toshiba Corp | 無線通信装置 |
WO2010090209A1 (ja) * | 2009-02-05 | 2010-08-12 | 日本電気株式会社 | Fft演算装置と電力演算方法 |
US8031101B2 (en) * | 2009-02-12 | 2011-10-04 | Quantenna Communications, Inc. | Spur cancellation |
US8305921B2 (en) | 2009-04-03 | 2012-11-06 | Quantenna Communications, Inc. | Channel selection and interference suppression |
JP4999885B2 (ja) * | 2009-06-05 | 2012-08-15 | 株式会社アドバンテスト | アナログ信号処理装置、方法、プログラム、記録媒体 |
CN102323498B (zh) * | 2011-06-09 | 2013-09-18 | 国网电力科学研究院 | 多级分段式高精度数据采样方法 |
JP5742556B2 (ja) * | 2011-07-29 | 2015-07-01 | 富士通セミコンダクター株式会社 | Adc |
US9026390B2 (en) * | 2011-09-06 | 2015-05-05 | Tektronix, Inc. | Interleaved RF triggering on a test and measurement instrument |
US9886419B2 (en) * | 2012-07-26 | 2018-02-06 | Tektronix, Inc. | System for improving probability of transient event detection |
JP6377335B2 (ja) * | 2013-10-28 | 2018-08-22 | 日本電産サンキョー株式会社 | 検出装置におけるデータ検出方法および検出装置 |
TWI524768B (zh) * | 2014-12-03 | 2016-03-01 | 晨星半導體股份有限公司 | 頻率解交錯與時間解交錯電路與方法以及數位電視之接收電路 |
TWI685208B (zh) * | 2018-12-07 | 2020-02-11 | 財團法人工業技術研究院 | 位置編碼裝置與方法 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4563750A (en) * | 1983-03-04 | 1986-01-07 | Clarke William L | Fast Fourier transform apparatus with data timing schedule decoupling |
US4816750A (en) * | 1987-01-16 | 1989-03-28 | Teradyne, Inc. | Automatic circuit tester control system |
US4763105A (en) * | 1987-07-08 | 1988-08-09 | Tektronix, Inc. | Interleaved digitizer array with calibrated sample timing |
JPH072978U (ja) * | 1993-06-10 | 1995-01-17 | 横河電機株式会社 | Fft解析装置 |
JPH075213A (ja) * | 1993-06-18 | 1995-01-10 | Advantest Corp | デジタル・スペクトラムアナライザの測定値補正装置 |
JP3352500B2 (ja) | 1993-06-21 | 2002-12-03 | 積水化学工業株式会社 | 光重合性組成物及び熱硬化性接着シート |
EP1080431B1 (de) * | 1998-05-18 | 2003-05-21 | Acqiris | Datenerfassungssystem mit einer schaltung zum umformen eines hochfrequenten analogen eingangssignals in eine anzahl von numerischen signalen |
-
2000
- 2000-08-30 JP JP2000260271A patent/JP4560187B2/ja not_active Expired - Fee Related
-
2001
- 2001-08-30 DE DE10196595T patent/DE10196595B4/de not_active Expired - Fee Related
- 2001-08-30 WO PCT/JP2001/007466 patent/WO2002018966A1/ja active Application Filing
-
2003
- 2003-02-26 US US10/374,199 patent/US6700515B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US6700515B2 (en) | 2004-03-02 |
WO2002018966A1 (fr) | 2002-03-07 |
US20030128141A1 (en) | 2003-07-10 |
DE10196595B4 (de) | 2009-05-14 |
JP4560187B2 (ja) | 2010-10-13 |
JP2002071723A (ja) | 2002-03-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8110 | Request for examination paragraph 44 | ||
8364 | No opposition during term of opposition | ||
R119 | Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee |
Effective date: 20120301 |