CN87105952A - 导电图的制造方法及其操作 - Google Patents
导电图的制造方法及其操作 Download PDFInfo
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Abstract
公开了一种在基底上形成电极图案的改进方法。基底涂覆以一第一导电膜且受烘烤。然后在第一导电膜上叠复一第二导电膜,该第二导电膜修补了第一导电膜可能的裂缝,而且该裂缝在图案中会引起开路。
Description
本发明涉及一种导电图的制造方法,更详细地说,涉及一种导电图制造方法的改进,该改进能使得用该方法制造的图案更为可靠。
到现在为止,对于制造包括一对玻璃基底和含有地址线和信号线以产生矩阵排列的电极图案的液晶器件,操作人员所关心的目标是怎样在基底上形成图案而无缺陷,且图案有高度的可靠性。该器件通常还包括用以激励液晶器件的集成(IC)电路片。一直所考虑的问题是IC电路片和图案之间连接的简化和可靠性。特别是图案是在玻璃基底上形成的情形下,在图案中很可能出现导致电路断开的裂缝。
因此本发明的一个目的是提供一种用以制造可靠的电路图案的方法。
为了达到本发明的目的,图案是用双层薄膜制成的。
图1(A)至图1(D)是说明根据本发明制造导电图的方法的横截面图。
图2(A)和图2(B)是说明根据本发明形成的图案的平面图和局部横截面图。
图3(A)和图3(B)是说明根据本发明的IC电路片和导电图之间的接触部分的局部横截面图。
图4(A)和图4(B)是使用于根据本发明的方法中的温度曲线图。
图5(A)至图5(C)是说明根据本发明的方法的横截面图。
图6是说明在IC电路片和用图5(A)至图5(C)所例举的方法所制造的导电图之间的接触部分的横截面图。
参阅图1(A)至图1(D),图中示出了一种根据本发明在基底上形成导电图的方法,该基底用以将一IC电路片安装于其上。在液晶器件的玻璃 基底上(图中只示出其一部分)用导电糊膏以胶版丝网印刷术(offsetscreen printing)形成一导电图〔图1(A)〕。形成图案的导电糊膏是通过用油乳胶与联邦德国一家名为德特米朗(Detmeron)的工厂销售的“涂覆用银糊膏”(产品号:61900234)相混合配制而成。图案的厚度为10微米。然后,基底根据图4(A)所示的温度曲线在氮气中烘干,以致形成一接触区2a和一基本上由银组成的烧结区〔图1(B)〕。而且,以同样的方式通过印刷和烘干,在图案的一部分上形成另一图案而成为一厚的部分〔图1(C)和图1(D)〕。在烘干以后厚的部分的厚度为30微米。代替印刷法,图案可以用喷涂ITO的方法形成而具有良好接触性和导电性,图2(A)和图2(B)是表示按上述方法在基底上形成的整个图案的平面图和横截面图。
在形成图案以后,将混合有平均直径为15微米的镍粒的环氧树脂透明胶合剂涂在基底的表面上,该基底表面是面向IC的底面和电极垫。每5克胶合剂加进50毫克的镍粒。然后,IC电路片以其铝垫与图案的厚的部分的相应的垫相接触而安装在基底上,而环氧树脂在180℃的温度下硬化,同时用一夹具以3千克的力将IC压紧于基底20分钟。在安装IC电路片的过程中,IC电路片与基底上图案的对准是通过透明树脂从基底底部观察两者来校验的。
能用紫外光来固化的树脂也可以用作胶合剂。在这方案中,树脂是透过透明基底用紫外光来照射。
图3(A)是表示在环氧胶合剂硬化后IC电路片5与基底1的接触的局部横截面图。在铝垫8和厚的部分3的顶部之间的间距预定为3微米,镍粒汇集在该间隙中而使接触电阻较低。包含在环氧树脂内的其他微粒位于IC电路片和基底之间的具有30微米间距的间隔内,而不会损害IC电路片和基底1上的图案2。厚的部分的面积最好是小于图案的相应的垫的面积。
然后,说明本发明的第二实施例。在以如上述实施例的图案2的同样方式用印刷和烘干的方法形成图案以后,用德特米朗厂出售的一种导电胶合剂DAP1(61901143号)涂敷在规定的部分来形成厚的部分3。然后,IC电路片以其铝垫接触图案的厚的部分的相应接合区域而安装在基底上,且用一夹具将IC电路片压在基底上,而基底根据图4(B)所示的温度曲线被烘干。图3(B)是表示根据本实施例的IC电路片和图案之间电气连接的横截面图。通过此实施例,本发明的方法带来了这样的优点:安装IC电路片且使得与IC电路片有必需的接触的加工步骤只需几个。
参阅图5(A)至图5(C),叙述本发明的第三个实施例。在图5(A)中,玻璃基底1是通过印刷方法用散布在酚树脂中的铜粒构成的导电糊膏来涂覆,以便形成一规定的图案11,图案11包括用以与IC电路片的对应垫相接触的电极线。铜粒的平均直径为5-10微米。这导电糊膏涂层然后在60℃的温度下被烘烤10分钟,且通过收缩变薄。该烘干层11可能有裂缝12。
然后,另一层铜导电糊膏13是通过在烘干的铜层上用印刷方法而被叠加在层11上,如图5(B)所示。叠加的铜层也在60℃的温度下被烘烤10分钟。裂缝12必须通过这一叠加的图案得到修补。双层图案散布的厚度约为30微米。双层图案然后受压以制成平的上表面14。在压制以后双层图案的厚度约成为20微米。在图案上安装一IC电路片,电路片与图案相接触的电极垫用镀的方法产生金的凸缘,IC电路片被压在基底上用胶合树脂将其固定就位。
尽管已对几个实施例作出了说明,但本发明仅受所附权利要求书的限定,而不应受特殊的实例的限制。
Claims (10)
1、一种在基底上制造电极图案的方法,其特征在于,该方法包括:
用第一导电膜以电路的电极图案形式涂覆所述基底;以及
用第二导电膜叠复在所述第一导电膜上来涂覆所述基底,所述第二导电膜是设计成起所述电路的完整图案的作用,即使这对所述第一导电膜来说不是这样的。
2、根据权利要求1所述的方法,其特征在于,在所述第一和第二导电膜的所述涂覆步骤后,分别都有烘烤步骤。
3、根据权利要求2所述的方法,其特征在于,烘烤温度是随着时间而改变的。
4、根据权利要求2所述的方法,其特征在于,该方法还包括一压制步骤,以使包括所述第一和第二导电膜的双层图案的上表面平坦。
5、一种制造在基底上包括IC电路片的电路的方法,该方法包括:
在所述基底上形成一导电图;
将胶合剂涂在所述基底表面的准备在上面安装所述IC电路片的部分上;以及
将所述IC电路片安装在所述表面部分上,以其电极垫与所述图案的相应的电极垫相接触,
所述方法的特征在于,所述胶合剂混合有金属微粒。
6、根据权利要求5所述的方法,其特征在于,所述金属微粒是银粒。
7、根据权利要求6所述的方法,其特征在于,所述图案的所述相应垫是增厚的。
8、根据权利要求7所述的方法,其特征在于,一导电层是形成在所述图案的要与所述IC电路片的垫相接触的部分上,以便构成所述增厚的垫。
9、根据权利要求7所述的方法,其特征在于,所述IC电路片的各垫的面积是小于所述图案的相应的垫的面积。
10、一种在液晶器件的玻璃基底上制造电极图案的方法,其特征在于,该方法包括:
用第一导电膜以电路的电极图案形式涂覆所述基底;
烘烤所述第一导电膜;
用第二导电膜叠复在所述第一导电膜上来涂覆所述基底,所述第二导电膜是设计成起所述电路的完整图案的作用,即使这对所述第一导电膜来说不是这样的,
烘烤所述第一和第二导电膜;
压第二导电膜的上表面,以使所述上表面平坦;以及
安装一用以激励所述液晶器件的IC电路片,以其垫与所述图案的相应的垫相接触,IC垫的底表面涂有金凸缘。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61310493A JPS63160352A (ja) | 1986-12-24 | 1986-12-24 | 半導体装置の実装方法 |
JP310493/86 | 1986-12-24 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN87105952A true CN87105952A (zh) | 1988-07-27 |
CN1021875C CN1021875C (zh) | 1993-08-18 |
Family
ID=18005889
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN87105952.5A Expired - Lifetime CN1021875C (zh) | 1986-12-24 | 1987-12-23 | 导电图形的制造方法 |
Country Status (4)
Country | Link |
---|---|
US (3) | US6383327B1 (zh) |
EP (1) | EP0272678A3 (zh) |
JP (1) | JPS63160352A (zh) |
CN (1) | CN1021875C (zh) |
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CN102332406A (zh) * | 2011-08-30 | 2012-01-25 | 华东光电集成器件研究所 | 集成电路导电胶图形制作方法 |
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-
1986
- 1986-12-24 JP JP61310493A patent/JPS63160352A/ja active Granted
-
1987
- 1987-12-21 EP EP87118977A patent/EP0272678A3/en not_active Withdrawn
- 1987-12-23 CN CN87105952.5A patent/CN1021875C/zh not_active Expired - Lifetime
-
1994
- 1994-03-30 US US08/219,853 patent/US6383327B1/en not_active Expired - Lifetime
-
2001
- 2001-11-26 US US09/995,866 patent/US20020110637A1/en not_active Abandoned
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2005
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1324933C (zh) * | 2003-01-14 | 2007-07-04 | 夏普株式会社 | 布线材料、布线基板及其制造方法以及显示面板 |
CN102332406A (zh) * | 2011-08-30 | 2012-01-25 | 华东光电集成器件研究所 | 集成电路导电胶图形制作方法 |
CN102332406B (zh) * | 2011-08-30 | 2015-12-09 | 华东光电集成器件研究所 | 集成电路导电胶图形制作方法 |
Also Published As
Publication number | Publication date |
---|---|
US6383327B1 (en) | 2002-05-07 |
CN1021875C (zh) | 1993-08-18 |
US7288437B2 (en) | 2007-10-30 |
US20020110637A1 (en) | 2002-08-15 |
JPH0432541B2 (zh) | 1992-05-29 |
JPS63160352A (ja) | 1988-07-04 |
US20050148165A1 (en) | 2005-07-07 |
EP0272678A3 (en) | 1990-04-25 |
EP0272678A2 (en) | 1988-06-29 |
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