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CN2653694Y - Substrates for Image Sensing Chip Packages - Google Patents

Substrates for Image Sensing Chip Packages Download PDF

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Publication number
CN2653694Y
CN2653694Y CNU032720289U CN03272028U CN2653694Y CN 2653694 Y CN2653694 Y CN 2653694Y CN U032720289 U CNU032720289 U CN U032720289U CN 03272028 U CN03272028 U CN 03272028U CN 2653694 Y CN2653694 Y CN 2653694Y
Authority
CN
China
Prior art keywords
plate
image sensing
metal sheets
sensing chip
exposed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNU032720289U
Other languages
Chinese (zh)
Inventor
谢志鸿
吴志成
张松典
陈炳光
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kingpak Technology Inc
Original Assignee
Kingpak Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kingpak Technology Inc filed Critical Kingpak Technology Inc
Priority to CNU032720289U priority Critical patent/CN2653694Y/en
Application granted granted Critical
Publication of CN2653694Y publication Critical patent/CN2653694Y/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]

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  • Solid State Image Pick-Up Elements (AREA)

Abstract

A substrate for packaging an image sensor chip. In order to provide a semiconductor package component for reducing the volume of an image sensor, improving the quality of the image sensor and reducing the production cost of the image sensor, the utility model is provided, which comprises a plurality of metal sheets and a sealing colloid which are symmetrically arranged; the plurality of metal sheets which are symmetrically arranged are provided with a first plate and a second plate with different heights and a third plate which is connected with the first plate and the second plate, so that the plurality of metal sheets which are arranged mutually form a groove for arranging the image sensing chip at the central part; the sealing colloid covers and fixes a plurality of symmetrical metal sheets to form an upper surface and a lower surface, and the upper surfaces of the first plate and the second plate of the metal sheets are exposed from the upper surface of the sealing colloid.

Description

The substrate that is used for the image sensing wafer encapsulation
Technical field
The utility model belongs to the parts of encapsulated semiconductor, particularly a kind of substrate that is used for the image sensing wafer encapsulation.
Background technology
As shown in Figure 1, the applicant comprises sheet metal 10, flange layer 16 and the photic zone 22 that arrange several spaces in the image sensor of 91/03/27 No. 091203873 patent application that proposes.
Sheet metal 10 forms first plate 12 and second plate 14 of differing heights.
Flange layer 16 is periphery and the bottom surface that is formed at several sheet metals 10, and top and the following of second plate 14 of first plate 12 of sheet metal 10 exposed by flange layer 16, and forms disposal area 20 in order to ccontaining image sensing wafer 18 with number sheet metals 10.
Photic zone 22 is to be covered on flange layer 16 tops, in order to cover image sensing wafer 18, makes image sensing wafer 18 can see through photic zone 22 and receives the light signal.
Only, though aforesaid image sensor can reach the effect and the purpose of its creation.So, the highly quite high flange layer 16 of essential formation in its whole knot with so that photic zone 22 is provided with thereon, can cover image sensing wafer 18.So, it can't reach compact demand.And first plate, 12 junctions of flange layer 16 and sheet metal 10 near the right angle state, more easily keep impurity (particle), not only cause being difficult for of cleaning on the processing procedure, and easily have influence on the quality of image sensor.
Summary of the invention
The purpose of this utility model provides a kind of substrate that is used for the image sensing wafer encapsulation that reduces image sensor volume, raising image sensor quality, reduces the image sensor production cost.
The utility model comprises sheet metal and the adhesive body that several are arranged symmetrically; The 3rd plate that several sheet metals of arranging symmetrically are provided with first and second plate of differing heights and connect first and second plate makes several sheet metals of arranging mutually form the groove that image sensing wafer is set in central part; Adhesive body is coated and fixed several symmetrical sheet metals and forms upper and lower surface, and the top upper surface by adhesive body of first and second plate of several sheet metals is exposed.
Wherein:
Several sheet metals of arranging mutually are provided with the intermediate plate that image sensing wafer can be set in the groove that central part forms.
The intermediate plate bottom surface is exposed by the adhesive body lower surface.
The following of several sheet metal second plates exposed by the adhesive body lower surface.
The sealing system is several symmetrical sheet metals that are coated and fixed with industrial plastic material ejection formation.
Second plate of the sheet metal that is exposed by the upper surface of adhesive body is electrically connected image sensing wafer by several wires.
Because the utility model comprises sheet metal and adhesive body that several are arranged symmetrically; The 3rd plate that several sheet metals of arranging symmetrically are provided with first and second plate of differing heights and connect first and second plate makes several sheet metals of arranging mutually form the groove that image sensing wafer is set in central part; Adhesive body is coated and fixed several symmetrical sheet metals and forms upper and lower surface, and the top upper surface by adhesive body of first and second plate of several sheet metals is exposed.Because sheet metal forms the groove that image sensing wafer is set, during encapsulation, image sensing wafer can be arranged in the groove, photic zone then is arranged on first plate of sheet metal, so because of needn't on adhesive body, forming the height that flange layer can reduce the overall package body in addition, to reach compact purpose; The 3rd plate of first and second plate of connection of sheet metal is skewed, can reduce the residual of impurity and be convenient to and remove, and improves its process quality.Not only reduce the image sensor volume, and improve image sensor quality, reduction image sensor production cost, thereby reach the purpose of this utility model.
Description of drawings
Fig. 1, be known image sensor structure schematic sectional view.
Fig. 2, be the utility model structural representation cutaway view.
Fig. 3, be several sheet metal structure schematic sectional views of the utility model.
Fig. 4, be image sensor structure schematic sectional view with the utility model encapsulation.
Fig. 5, for the utility model structural representation cutaway view (bottom surface of sheet metal second plate and intermediate plate is exposed by the lower surface of adhesive layer).
Embodiment
As shown in Figure 2, the utility model comprises sheet metal 30 and the adhesive body 31 that several are arranged symmetrically.
As shown in Figure 3, the 3rd plate 36 that several sheet metals 30 (Leadfram) of arranging symmetrically are provided with first plate 32, second plate 34 of differing heights and connect first and second plate 32,34 makes several sheet metals of arranging mutually 30 establish the groove 38 of intermediate plate 40 in central part forms.
Adhesive body 31 is industrial plastic material, it is to be coated and fixed several symmetrical sheet metals 30 and to form upper surface 42 and lower surface 44 with injection molding method, and the top upper surface 42 by adhesive body 31 of first and second plate 32,34 of several sheet metals 30 is exposed.
As shown in Figure 4, when encapsulating with the utility model, image sensing wafer 43 is arranged on the intermediate plate 40 of sheet metal 30, be electrically connected on second plate 34 of image sensing wafer 43 and sheet metal 30 by several wires 46, be passed on the sheet metal 30 in order to signal image sensing wafer 43, photic zone 48 is covered on first plate 32 of sheet metal 30, image sensing wafer 30 is covered, make image sensing wafer 43 can see through photic zone 48 and receive the light signal.So, can electrically connect with printed circuit board (PCB) (figure does not show) by first plate 32 of sheet metal 30.
As shown in Figure 5, the bottom surface that also can make second plate 34 of sheet metal 30 and intermediate plate 40 is exposed by the lower surface of adhesive layer 31, and second plate 34 of sheet metal 30 and printed circuit board (PCB) (figure shows) are electrically connected.So, can increase the radiating effect of image sensing wafer 43.
As mentioned above, the utlity model has following advantage:
1, because sheet metal 30 forms the groove 38 that image sensing wafer 33 is set, image sensing wafer 33 can be arranged in the groove 38, photic zone 37 then can be arranged on first plate 32 of sheet metal 30, so because of needn't on adhesive body 31, forming the height that flange layer can reduce the overall package body in addition, to reach compact purpose.
2, the 3rd plate 36 of first and second plate 32,34 of the connection of sheet metal 30 is skewed, can reduce the residual of impurity (particle) and be convenient to and remove, to reach the purpose that improves its process quality.

Claims (6)

1、一种用于影像感测晶片封装的基板,它包括数个相互对称排列的金属片及封胶体;每一金属片设有不同高度的第一、二板;封胶体包覆固定数个相互对称的金属片而形成上、下表面,并使金属片的第一板的上面由封胶体的上表面露出;其特征在于所述的金属片设有连接第一、二板的第三板,并使数个相互排列的金属片于中央部位形成设置影像感测晶片的凹槽;金属片第二板上面由封胶体的上表面露出电连接影像感测晶片。1. A substrate for image sensing chip packaging, which includes several metal sheets and sealants arranged symmetrically with each other; each metal sheet is provided with first and second boards of different heights; the sealant wraps and fixes several The upper and lower surfaces are formed by mutually symmetrical metal sheets, and the upper surface of the first plate of the metal sheet is exposed from the upper surface of the sealant; it is characterized in that the metal sheet is provided with a third plate connecting the first and second plates , and make several mutually arranged metal sheets form a groove for setting the image sensing chip at the central part; the upper surface of the second plate of the metal sheet is exposed from the upper surface of the encapsulant to electrically connect to the image sensing chip. 2、根据权利要求1所述的用于影像感测晶片封装的基板,其特征在于所述的数个相互排列的金属片于中央部位形成的凹槽内设有可设置影像感测晶片的中间板。2. The substrate for image sensing chip packaging according to claim 1, characterized in that the plurality of mutually arranged metal sheets are provided with a center where the image sensing chip can be placed in the groove formed in the central part. plate. 3、根据权利要求2所述的用于影像感测晶片封装的基板,其特征在于所述的中间板底面由封胶体下表面露出。3. The substrate for image sensor chip packaging according to claim 2, wherein the bottom surface of the intermediate board is exposed from the lower surface of the encapsulant. 4、根据权利要求1所述的用于影像感测晶片封装的基板,其特征在于所述的数个金属片第二板的下面由封胶体下表面露出。4. The substrate for image sensor chip packaging according to claim 1, wherein the lower surfaces of the plurality of second metal sheets are exposed by the lower surface of the encapsulant. 5、根据权利要求1所述的用于影像感测晶片封装的基板,其特征在于所述的封胶体系以工业塑胶材料射出成型而包覆固定数个相互对称的金属片。5 . The substrate for image sensor chip packaging according to claim 1 , wherein the sealing system uses industrial plastic material injection molding to cover and fix several mutually symmetrical metal sheets. 6、根据权利要求1所述的用于影像感测晶片封装的基板,其特征在于所述的由封胶体的上表面露出的金属片的第二板借由数条导线电连接影像感测晶片。6. The substrate for image sensing chip packaging according to claim 1, characterized in that the second plate of the metal sheet exposed from the upper surface of the encapsulant is electrically connected to the image sensing chip by several wires .
CNU032720289U 2003-06-17 2003-06-17 Substrates for Image Sensing Chip Packages Expired - Fee Related CN2653694Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNU032720289U CN2653694Y (en) 2003-06-17 2003-06-17 Substrates for Image Sensing Chip Packages

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNU032720289U CN2653694Y (en) 2003-06-17 2003-06-17 Substrates for Image Sensing Chip Packages

Publications (1)

Publication Number Publication Date
CN2653694Y true CN2653694Y (en) 2004-11-03

Family

ID=34330827

Family Applications (1)

Application Number Title Priority Date Filing Date
CNU032720289U Expired - Fee Related CN2653694Y (en) 2003-06-17 2003-06-17 Substrates for Image Sensing Chip Packages

Country Status (1)

Country Link
CN (1) CN2653694Y (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100485893C (en) * 2005-09-09 2009-05-06 鸿富锦精密工业(深圳)有限公司 Producing process for video sensing chip packaging and structure
CN100555643C (en) * 2005-08-12 2009-10-28 鸿富锦精密工业(深圳)有限公司 Image sensing chip packaging structure and use the numerical camera mould of this structure

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100555643C (en) * 2005-08-12 2009-10-28 鸿富锦精密工业(深圳)有限公司 Image sensing chip packaging structure and use the numerical camera mould of this structure
CN100485893C (en) * 2005-09-09 2009-05-06 鸿富锦精密工业(深圳)有限公司 Producing process for video sensing chip packaging and structure
US7592197B2 (en) 2005-09-09 2009-09-22 Altus Technology Inc. Image sensor chip package fabrication method

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C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20041103