CN2465329Y - an image sensor - Google Patents
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- CN2465329Y CN2465329Y CN01202030U CN01202030U CN2465329Y CN 2465329 Y CN2465329 Y CN 2465329Y CN 01202030 U CN01202030 U CN 01202030U CN 01202030 U CN01202030 U CN 01202030U CN 2465329 Y CN2465329 Y CN 2465329Y
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- 239000000758 substrate Substances 0.000 claims abstract description 47
- 239000000084 colloidal system Substances 0.000 claims description 11
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- 230000005540 biological transmission Effects 0.000 abstract 2
- 238000010586 diagram Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000004806 packaging method and process Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 3
- 238000012360 testing method Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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Abstract
Description
本实用新型涉及一种影像感测器,尤指一种用来将具有不同功能的集成电路与影像感测芯片封装在一封装体上,可减少封装基板并将具有各种不同功能的集成电路与影像感测芯片整合封装的影像感测器。The utility model relates to an image sensor, in particular to an integrated circuit with different functions and an image sensing chip packaged on a package body, which can reduce the number of packaging substrates and has various functions. An image sensor integrated with an image sensor chip.
一般用来接收一影像信号的影像感测器,将影像信号转换为电信号传递到印刷电路板上,再与其他集成电路进行连接,使其具有不同的功能。例如,其与数字信号处理器(Digital signal Processor)连接,用以处理影像感测器所产生的信号,或可与微控制器(Micro Controller)或中央处理器(CPU)等连接,而产生不同的功能。The image sensor is generally used to receive an image signal, converts the image signal into an electrical signal and transmits it to the printed circuit board, and then connects with other integrated circuits to make it have different functions. For example, it is connected with a digital signal processor (Digital signal Processor) to process the signal generated by the image sensor, or it can be connected with a microcontroller (Micro Controller) or a central processing unit (CPU) to generate different signals. function.
然而,现有的影像感测器都是单独封装制成的,因此,与其搭配的各种集成电路必须单独封装,再将封装完成的影像感测器及各种信号处理单元连接在印刷电路板上,再由导线将其连接整合使用。由于各信号处理单元与影像感测器分别封装,必须各使用一基板及一封装材料,造成生产成本无法有效地降低,且将各信号处理单元设置在印刷电路板上时,所需印刷电路板的面积较大,而无法达到轻、薄、短小的需求。However, the existing image sensors are all individually packaged. Therefore, the various integrated circuits that match them must be packaged separately, and then the packaged image sensors and various signal processing units are connected to the printed circuit board. , and then connected by wires for integrated use. Since each signal processing unit and image sensor are packaged separately, a substrate and a packaging material must be used respectively, resulting in that the production cost cannot be effectively reduced, and when each signal processing unit is arranged on a printed circuit board, the required printed circuit board The area is relatively large, but it cannot meet the requirements of lightness, thinness, and shortness.
本实用新型的主要目的在于提供一种影像感测器,其具有减少封装构件的功效,使封装成本降低。The main purpose of the present invention is to provide an image sensor, which has the effect of reducing packaging components and reducing the packaging cost.
本实用新型的另一目的在于提供一种影像感测器,其有减化生产过程,使其在制造上更为便利。Another object of the present invention is to provide an image sensor, which can simplify the production process and make it more convenient to manufacture.
本实用新型的又一目的在于提供一种影像感测器,其可降低影像感测产品的面积大小。Another object of the present invention is to provide an image sensor, which can reduce the size of the image sensing product.
本实用新型的再一目的在于提供一种影像感测器,其可降低影像感测产品封装、测试成本。Another object of the present invention is to provide an image sensor, which can reduce packaging and testing costs of image sensing products.
本实用新型的目的是通过如下技术方案来实现的:一种影像感测器,它连接在印刷电路板上,其包括:The purpose of this utility model is achieved through the following technical solutions: a kind of image sensor, it is connected on the printed circuit board, and it comprises:
一设有一第一表面及一第二表面的基板,该第一表面有一信号输入端,该第二表面有一用来与印刷电路板连接的信号输出端;A substrate with a first surface and a second surface, the first surface has a signal input terminal, and the second surface has a signal output terminal for connecting with a printed circuit board;
一设置在基板的第一表面上的集成电路,与基板的信号输入端连接;an integrated circuit disposed on the first surface of the substrate, connected to the signal input end of the substrate;
一连接在基板的信号输入端的影像感测芯片,其设置在信号处理单元上方,与信号处理单元为堆叠形态;An image sensor chip connected to the signal input end of the substrate, which is arranged above the signal processing unit and stacked with the signal processing unit;
一覆盖在影像感测芯片上方的透光层,影像感测芯片是透过该透光层接收影像信号,并将影像信号转换为电信号传递到基板上的。A light-transmitting layer covering the image sensing chip, the image sensing chip receives image signals through the light-transmitting layer, converts the image signals into electrical signals and transmits them to the substrate.
所述的基板的第二表面的信号输出端为用来与印刷电路板连接的球栅阵列金属球;所述的集成电路为信号处理单元;所述的信号处理单元为用来处理影像感测芯片的信号数字信号处理器(Digital Signal Processor);所述的信号处理单元为微控制器(Micro controller);所述的信号处理单元为中央处理器(CPU);所述的透光层为透光玻璃;所述的基板的第一表面周缘有一凸缘层,透光层设置在该凸缘层上;所述的透光层为透明胶体;所述的透光层为ㄇ形的透明胶体,其具有用来将其固定在基板的第一表面上的支撑柱。The signal output end of the second surface of the substrate is a ball grid array metal ball used to connect with the printed circuit board; the integrated circuit is a signal processing unit; the signal processing unit is used to process image sensing The signal digital signal processor (Digital Signal Processor) of chip; Described signal processing unit is microcontroller (Micro controller); Described signal processing unit is central processing unit (CPU); Described transparent layer is transparent Light glass; the first surface periphery of the substrate has a flange layer, and the light-transmitting layer is arranged on the flange layer; the light-transmitting layer is a transparent colloid; the light-transmitting layer is a ㄇ-shaped transparent colloid , which has support posts for securing it on the first surface of the substrate.
由于将影像感测芯片与集成电路整合封装,本实用新型具有如下的优点:Since the image sensor chip and the integrated circuit are integrated and packaged, the utility model has the following advantages:
1、可减少使用基板的材料,可有效降低影像感测产品的制造成本。1. The material used for the substrate can be reduced, which can effectively reduce the manufacturing cost of the image sensing product.
2、可降低影像感测产品面积大小。2. It can reduce the area size of image sensing products.
3、因仅有一封装体,因此测试用具仅需一套,可降低测试成本。3. Because there is only one package, only one set of test tools is needed, which can reduce the test cost.
4、两个芯片仅需一道封装便可制成,可有效降低封装成本。4. Two chips can be manufactured with only one package, which can effectively reduce the package cost.
下面结合附图对本实用新型作进一步的详细说明。Below in conjunction with accompanying drawing, the utility model is described in further detail.
图1为本实用新型一种影像感测器的第一实施例示意图。FIG. 1 is a schematic diagram of a first embodiment of an image sensor of the present invention.
图2为本实用新型一种影像感测器的第二实施例示意图。FIG. 2 is a schematic diagram of a second embodiment of an image sensor of the present invention.
图3为本实用新型一种影像感测器的第三实施例示意图。FIG. 3 is a schematic diagram of a third embodiment of an image sensor of the present invention.
图4为本实用新型一种影像感测器的第四实施例示意图。FIG. 4 is a schematic diagram of a fourth embodiment of an image sensor of the present invention.
如图1所示,该堆叠封装构造包括有:As shown in Figure 1, the stacked package structure includes:
一基板10,其设有一第一表面12及一在第一表面12相反侧的一第二表面14,第一表面12有一信号输入端16,第二表面14有一信号输出端18,信号输出端18为球栅阵列金属球,用来连接在印刷电路板20上,将基板10的信号传递到印刷电路板20;A
一集成电路22,其可为信号处理单元[如,数字信号处理器(DigitalSignal Processor)或微处理器(Micro Processor)或中央处理器CPU等],其设置在基板10的第一表面12上,且由金属线24以打线方式连接在基板10的信号输入端16,使集成电路22与基板10连接,用来将集成电路22的信号传递到基板10;An
一影像感测芯片26,其设置在集成电路22上方,与集成电路22形成堆叠形态,为避免影像感测芯片26压到位于集成电路22上的金属线24,将一间隔器28设置在集成电路22与影像感测芯片26间,使其间形成一空间30,而金属线24则恰位于空间30内。影像感测芯片26由金属线32电连接在基板10的信号输入端16,使其连接在基板10上,而将影像感测芯片26的信号传递到基板10。若集成电路22为数字信号处理器(DigitalSignal Processor),可用来将影像感测芯片26的信号予以处理,再传递到电路板20上;An
一凸缘层34,为框形结构,其设置在基板10的第一表面12,用来将集成电路22与影像感测芯片26包围住;A
一透光层36,为透光玻璃,其覆盖在凸缘层34上,用来将影像感测芯片26及集成电路22密封住,使影像感测芯片26可通过透光层36接收影像信号,并将影像信号转换为电信号传递到基板10上。A light-transmitting
如图2所示,为本实用新型的第二实施例,该集成电路22设有导电金属38,以覆晶方式(Flip Chip)与基板10的信号输入端16连接,使集成电路22与基板10连接;该影像感测芯片26由金属线32以打线方式连接在基板10的信号输入端16。As shown in Figure 2, it is the second embodiment of the present utility model, the
如图3所示,为本实用新型的第三实施例,透光层为透明胶体40,当集成电路22与影像感测芯片26堆叠在基板10上,并完成与基板10的连接后,用透明胶体40覆盖住影像感测芯片26与集成电路22,使影像感测芯片26通过透明胶体40接收影像信号,而将影像信号转换为电信号传递到基板10,再由集成电路22予以处理。As shown in Figure 3, it is the third embodiment of the present utility model, the light-transmitting layer is a
如图4所示,透光层为ㄇ形状的透明胶体40,其具有支撑柱42,用来将透光层固定在基板10的第一表面12上,ㄇ形状的透明胶体40可用压模或射出的方式形成。所以,将集成电路22以覆晶方式连接在基板10上,与基板10完成连接后,将影像感测芯片26堆叠在集成电路22上,而以打线方式将金属线32连接在基板10上后,再将ㄇ形状透明胶体40直接覆盖在基板10的第一表面12,即可将影像感测芯片26与集成电路22密封住,使影像感测芯片26可以通过ㄇ形状的透明胶体接收影像信号,并将影像信号转换为电信号传递到基板10。As shown in Figure 4, the light-transmitting layer is a
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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CN103811444A (en) * | 2012-11-07 | 2014-05-21 | 环旭电子股份有限公司 | Electronic apparatus, system in package module and method for manufacturing system in package module |
CN103838362A (en) * | 2012-11-27 | 2014-06-04 | 原相科技股份有限公司 | Gesture reorganization device and combined optical device |
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Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
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CN103811444A (en) * | 2012-11-07 | 2014-05-21 | 环旭电子股份有限公司 | Electronic apparatus, system in package module and method for manufacturing system in package module |
CN103811444B (en) * | 2012-11-07 | 2016-11-23 | 环旭电子股份有限公司 | The manufacture method of electronic installation, system-in-package module and system-in-package module |
CN103838362A (en) * | 2012-11-27 | 2014-06-04 | 原相科技股份有限公司 | Gesture reorganization device and combined optical device |
CN103838362B (en) * | 2012-11-27 | 2017-10-03 | 原相科技股份有限公司 | Gesture recognition device and combined optical device |
CN107589842A (en) * | 2012-11-27 | 2018-01-16 | 原相科技股份有限公司 | Combined optical device |
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