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CN205317381U - Sensitive chip of SOI pressure based on sacrifice layer technique - Google Patents

Sensitive chip of SOI pressure based on sacrifice layer technique Download PDF

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Publication number
CN205317381U
CN205317381U CN201620017149.5U CN201620017149U CN205317381U CN 205317381 U CN205317381 U CN 205317381U CN 201620017149 U CN201620017149 U CN 201620017149U CN 205317381 U CN205317381 U CN 205317381U
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pressure
soi
single crystal
crystal silicon
film
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揣荣岩
衣畅
张晓民
关若飞
关艳霞
李新
刘一婷
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Shenyang University of Technology
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Abstract

本实用新型公开了一种基于牺牲层技术的SOI压力敏感芯片。该芯片采用绝缘层上的单晶硅薄膜(SOI)材料制造,包括SOI的单晶硅衬底,SOI二氧化硅绝缘层作为牺牲层形成的腔体,在单晶硅薄膜上刻蚀隔离槽形成的四个应变电阻及其金属导线。金属导线上下的氮化硅绝缘保护层及最外层的多晶硅结构层与单晶硅薄膜共同构成敏感芯片感压膜,感压膜边缘刻蚀八个方形孔,用于腐蚀二氧化硅牺牲层。四个应变电阻通过金属导线连接成惠斯通电桥,将压力信号转换成电压信号输出。制备的基于牺牲层技术的SOI压力敏感芯片具有感器灵敏度高、重复性和稳定性好、可靠性高、耐高温、抗辐射以及制造工艺与集成电路工艺兼容等优点。

The utility model discloses an SOI pressure sensitive chip based on sacrificial layer technology. The chip is made of single crystal silicon film on insulating layer (SOI) material, including the single crystal silicon substrate of SOI, the cavity formed by the SOI silicon dioxide insulating layer as a sacrificial layer, and the isolation groove is etched on the single crystal silicon film Four strain resistors and their metal wires are formed. The silicon nitride insulating protective layer above and below the metal wires and the outermost polysilicon structure layer and single crystal silicon film together form a sensitive chip pressure-sensitive film. Eight square holes are etched on the edge of the pressure-sensitive film to corrode the silicon dioxide sacrificial layer. . Four strain resistors are connected through metal wires to form a Wheatstone bridge, which converts the pressure signal into a voltage signal for output. The prepared SOI pressure-sensitive chip based on the sacrificial layer technology has the advantages of high sensor sensitivity, good repeatability and stability, high reliability, high temperature resistance, radiation resistance, and the manufacturing process is compatible with the integrated circuit process.

Description

基于牺牲层技术的SOI压力敏感芯片SOI Pressure Sensitive Chip Based on Sacrificial Layer Technology

技术领域 technical field

本实用新型主要涉及一种基于牺牲层技术的SOI压力敏感芯片。属于微机电系统(MEMS)领域。 The utility model mainly relates to an SOI pressure sensitive chip based on sacrificial layer technology. It belongs to the field of microelectromechanical systems (MEMS).

背景技术 Background technique

在信息技术不断推动现代工业高速发展的背景下,MEMS传感器备受关注,特别是MEMS压力传感器已被广泛应用于工业生产、航空航天、电力石化等各行各业。目前扩散硅压力传感器仍是市场销量最大的压力传感器,但这种压阻式传感器的工作温度范围一般不超过120℃,这是因为扩散硅压力传感器的应变电阻是以pn结作为隔离层实现其与衬底的电绝缘。而当工作温度超过120℃时,硅材料由于本征激发,其pn结的反向漏电流迅速增大,所以一般不能在高于120℃的环境下进行压力测量。而在现代工业生产、航空航天以及军事活动中,高温恶劣环境下的压力测量必不可少,尤其是目前在汽车电子领域大量需要工作温度超过150℃的压力传感器。正是在这种市场需求的背景下,本专利提出了基于牺牲层技术的SOI压力敏感芯片及其制造方法,并得到了国家自然科学基金的资助(项目批准号61372019)。 Under the background that information technology continues to promote the rapid development of modern industry, MEMS sensors have attracted much attention, especially MEMS pressure sensors have been widely used in industrial production, aerospace, power petrochemical and other industries. At present, the diffused silicon pressure sensor is still the pressure sensor with the largest sales volume in the market, but the working temperature range of this piezoresistive sensor generally does not exceed 120°C, because the strain resistance of the diffused silicon pressure sensor uses the pn junction as the isolation layer to realize its electrically insulated from the substrate. However, when the operating temperature exceeds 120°C, the reverse leakage current of the pn junction of the silicon material increases rapidly due to intrinsic excitation, so pressure measurement cannot generally be performed in an environment higher than 120°C. In modern industrial production, aerospace and military activities, pressure measurement in high temperature and harsh environments is essential, especially in the field of automotive electronics, pressure sensors with working temperatures exceeding 150°C are required in large numbers. It is against the background of this market demand that this patent proposes an SOI pressure-sensitive chip based on sacrificial layer technology and its manufacturing method, and has been funded by the National Natural Science Foundation of China (Project Approval No. 61372019).

SOI材料是在其顶层硅薄膜和衬底硅之间引入二氧化硅绝缘层,顶层与衬底之间实现了介质隔离,可以使传感器的工作温度达到300℃以上。因此,SOI材料是制作高温压力传感器的良好材料。 The SOI material introduces a silicon dioxide insulating layer between the top silicon film and the substrate silicon, and realizes dielectric isolation between the top layer and the substrate, which can make the sensor's operating temperature reach more than 300°C. Therefore, SOI material is a good material for making high-temperature pressure sensors.

当前,大多数SOI高温压力传感器是将SOI顶层单晶硅薄膜制成4个应变电阻,并溅射金属将应变电阻连成惠斯通电桥,之后在对应4个应变电阻的适当位置的晶圆背面制作硅杯结构形成弹性膜片。由于采用硅杯结构,传感器体积较大,工艺与集成电路工艺不易兼容,不利于集成化。 At present, most SOI high-temperature pressure sensors make four strain resistors from the top layer of SOI single crystal silicon film, and sputter metal to connect the strain resistors into a Wheatstone bridge, and then place the wafers at the appropriate positions corresponding to the four strain resistors. A silicon cup structure is made on the back to form an elastic diaphragm. Due to the silicon cup structure, the sensor has a large volume, and the process is not easily compatible with the integrated circuit process, which is not conducive to integration.

采用MEMS牺牲层技术制作的腔体克服了硅杯结构的上述缺点。这种牺牲层结构压力传感器通常采用二氧化硅为牺牲层,多晶硅为敏感膜片,介质隔离的多晶硅薄膜为应变电阻,具有体积小、工作温度范围宽和与集成电路工艺兼容有利于集成化的优点。但由于使用多晶硅应变电阻,传感器的重复性和迟滞等性能较差。 The cavity made by MEMS sacrificial layer technology overcomes the above-mentioned shortcomings of the silicon cup structure. This kind of sacrificial layer structure pressure sensor usually uses silicon dioxide as the sacrificial layer, polysilicon as the sensitive diaphragm, and the polysilicon thin film isolated from the dielectric as the strain resistance. advantage. However, due to the use of polysilicon strain resistance, the performance of the sensor such as repeatability and hysteresis is poor.

基于上述问题,本实用新型旨在提出一种综合单晶硅应变电阻、牺牲层腔体结构和介质隔离等三方面优点于一身的半导体压力传感器芯片。 Based on the above problems, the utility model aims to propose a semiconductor pressure sensor chip that combines the advantages of single crystal silicon strain resistance, sacrificial layer cavity structure and dielectric isolation.

发明内容 Contents of the invention

发明目的: Purpose of the invention:

本实用新型是一种基于牺牲层技术的SOI压力敏感芯片。目的在于提高器件温度特性、减小传感器体积以及拓宽工作温度范围。 The utility model is an SOI pressure sensitive chip based on the sacrificial layer technology. The purpose is to improve the temperature characteristic of the device, reduce the volume of the sensor and widen the working temperature range.

技术方案: Technical solutions:

本实用新型通过以下技术方案实现: The utility model is realized through the following technical solutions:

基于牺牲层技术的SOI压力敏感芯片,其特征在于:该芯片采用绝缘层上的单晶硅薄膜(SOI)材料制造,包括SOI的单晶硅衬底,SOI二氧化硅绝缘层作为牺牲层形成的腔体,在单晶硅薄膜上刻蚀隔离槽形成的四个应变电阻及其金属导线;金属导线上下的氮化硅绝缘保护层及两次淀积形成的多晶硅结构层与单晶硅薄膜共同构成敏感芯片感压膜,感压膜边缘刻蚀有八个方形腐蚀孔,用于腐蚀二氧化硅牺牲层;四个应变电阻通过金属导线连接成惠斯通电桥,将压力信号转换成电压信号输出。 The SOI pressure-sensitive chip based on sacrificial layer technology is characterized in that: the chip is made of single crystal silicon film (SOI) material on the insulating layer, including the single crystal silicon substrate of SOI, and the SOI silicon dioxide insulating layer is formed as a sacrificial layer The cavity, four strain resistors and their metal wires formed by etching isolation grooves on the single crystal silicon film; the silicon nitride insulating protective layer above and below the metal wires and the polysilicon structure layer formed by two depositions and the single crystal silicon film Together, they form the pressure-sensing film of the sensitive chip. There are eight square etching holes etched on the edge of the pressure-sensing film, which are used to corrode the silicon dioxide sacrificial layer; the four strain resistors are connected by metal wires to form a Wheatstone bridge, which converts the pressure signal into a voltage. signal output.

应变电阻由SOI材料上的单晶硅薄膜制成,通过隔离槽与单晶硅薄膜实现电隔离,位于多晶硅结构层内侧。 The strain resistance is made of a single crystal silicon film on SOI material, and is electrically isolated from the single crystal silicon film through an isolation groove, and is located inside the polycrystalline silicon structure layer.

优点及效果: Advantages and effects:

本实用新型有如下优点及有益效果: The utility model has the following advantages and beneficial effects:

本实用新型所述的基于牺牲层技术的SOI压力敏感芯片采用单晶硅薄膜制作应变电阻,使传感器灵敏度高、重复性和稳定性好;应变电阻位于多晶硅结构层内侧,受到良好保护,提高了芯片的可靠性;采用介质隔离提高了传感器工作温度范围。 The SOI pressure sensitive chip based on the sacrificial layer technology described in the utility model adopts a single crystal silicon thin film to make a strain resistance, so that the sensor has high sensitivity, good repeatability and stability; the strain resistance is located inside the polysilicon structure layer and is well protected, improving the The reliability of the chip; the use of dielectric isolation improves the operating temperature range of the sensor.

附图说明 Description of drawings

图1是本实用新型芯片平面示意图。 Fig. 1 is a schematic plan view of the chip of the utility model.

图2是本实用新型芯片AA'剖面示意图。 Fig. 2 is a schematic cross-sectional view of chip AA' of the utility model.

图3是本实用新型芯片加工过程中第一次光刻后的示意图,其中,图3(a)是本实用新型芯片加工过程中第一次光刻后的平面示意图;图3(b)是本实用新型芯片加工过程中第一次光刻后的AA'剖面示意图。 Fig. 3 is the schematic diagram after photoetching for the first time in the chip processing process of the present utility model, and wherein, Fig. 3 (a) is the schematic plan view after photoetching for the first time in the chip processing process of the present utility model; Fig. 3 (b) is The schematic diagram of AA' section after the first photoetching in the chip processing process of the utility model.

图4是本实用新型芯片加工过程中第二次光刻形成隔离槽后的AA'剖面示意图。 Fig. 4 is a schematic cross-sectional view of AA' after the isolation groove is formed by the second photolithography in the chip processing process of the present invention.

图5是本实用新型芯片加工过程中淀积第一层氮化硅保护层后的AA'剖面示意图。 Fig. 5 is a schematic cross-sectional view of AA' after depositing the first silicon nitride protective layer during the chip processing process of the present invention.

图6是本实用新型芯片加工过程中第三次光刻形成引线孔后的AA'剖面示意图。 Fig. 6 is a schematic cross-sectional view of AA' after the lead hole is formed in the third photolithography process in the chip processing process of the present invention.

图7是本实用新型芯片加工过程中第四次光刻形成金属导线后的AA'剖面示意图。 Fig. 7 is a cross-sectional schematic view of AA' after the metal wire is formed by the fourth photolithography in the chip processing process of the present invention.

图8是本实用新型芯片加工过程中淀积第二层氮化硅保护层后的AA'剖面示意图。 Fig. 8 is a schematic cross-sectional view of AA' after depositing the second silicon nitride protection layer during chip processing of the present invention.

图9是本实用新型芯片加工过程中淀积第一层多晶硅结构层后的AA'剖面示意图。 Fig. 9 is a schematic cross-sectional view of AA' after depositing the first layer of polysilicon structure layer during chip processing of the present invention.

图10是本实用新型芯片加工过程中第五次光刻形成腐蚀孔后的BB'剖面示意图。 Fig. 10 is a schematic cross-sectional view of BB' after forming etching holes in the fifth photolithography process in the chip processing process of the present invention.

图11是本实用新型芯片加工过程中腐蚀二氧化硅牺牲层后的BB'剖面示意图。 Fig. 11 is a schematic cross-sectional view of BB' after etching the silicon dioxide sacrificial layer during chip processing of the present invention.

图12是本实用新型芯片加工过程中淀积第二层多晶硅形成密封腔体后的BB'剖面示意图。 Fig. 12 is a schematic cross-sectional view of BB' after depositing a second layer of polysilicon to form a sealed cavity during chip processing of the present invention.

附图标记说明: Explanation of reference signs:

1.单晶硅衬底,2.腔体,3.单晶硅薄膜,4.隔离槽,5.应变电阻,6.金属导线,7.氮化硅绝缘保护层8.多晶硅结构层9.方形腐蚀孔。 1. Single crystal silicon substrate, 2. Cavity, 3. Single crystal silicon film, 4. Isolation groove, 5. Strain resistance, 6. Metal wire, 7. Silicon nitride insulating protective layer 8. Polycrystalline silicon structure layer 9. Square corrosion holes.

具体实施方式 detailed description

下面通过附图对本实用新型作进一步说明: The utility model is further described below by accompanying drawing:

本实用新型提供一种基于牺牲层技术的SOI压力敏感芯片,如图1和图2所示,其特征在于:该芯片采用绝缘层上的单晶硅薄膜(SOI)材料制造,包括SOI的单晶硅衬底1,单晶硅衬底1上方为SOI二氧化硅绝缘层作为牺牲层形成的腔体2,腔体2上方为单晶硅薄膜3,在单晶硅薄膜3上刻蚀隔离槽4形成的四个应变电阻5及其金属导线6。位于金属导线6上方和下方的氮化硅绝缘保护层7及最外层的多晶硅结构层8与单晶硅薄膜3共同构成敏感芯片感压膜,感压膜边缘刻蚀八个方形腐蚀孔9,用于腐蚀二氧化硅牺牲层。四个应变电阻5通过金属导线6连接成惠斯通电桥,将压力信号转换成电压信号输出。 The utility model provides an SOI pressure-sensitive chip based on sacrificial layer technology, as shown in Fig. 1 and Fig. 2, and is characterized in that the chip is made of a single crystal silicon film (SOI) material on an insulating Crystalline silicon substrate 1, above the single crystal silicon substrate 1 is a cavity 2 formed by an SOI silicon dioxide insulating layer as a sacrificial layer, above the cavity 2 is a single crystal silicon film 3, on which the single crystal silicon film 3 is etched and isolated Four strain resistors 5 and their metal wires 6 formed by the slot 4 . The silicon nitride insulating protection layer 7 located above and below the metal wire 6 and the outermost polysilicon structure layer 8 and the single crystal silicon film 3 together form a sensitive chip pressure-sensitive film, and eight square etching holes 9 are etched on the edge of the pressure-sensitive film , used to etch the silicon dioxide sacrificial layer. Four strain resistors 5 are connected through metal wires 6 to form a Wheatstone bridge, which converts pressure signals into voltage signals for output.

通过改变本实用新型传感器密封腔体感压膜的厚度和尺寸,可设计出各种量程的压力传感器。 By changing the thickness and size of the pressure-sensing film of the sealed cavity of the sensor of the utility model, pressure sensors of various measuring ranges can be designed.

本实用新型的设计原理:本实用新型的主要结构由硅衬底、感压膜、腔体、腐蚀孔和应变电阻构成。感压膜由单晶硅层、氮化硅保护层及多晶硅结构层三部分构成,腔体采用MEMS表面微加工技术,即牺牲层技术,用氢氟酸通过腐蚀孔去掉二氧化硅牺牲层而成,用多晶硅封闭腐蚀孔,感压膜和硅衬底构成封闭腔体,近似为真空。选择单晶硅薄膜上的[110]晶向设置四个单晶硅薄膜应变电阻,并连接成惠斯通电桥,构成压力测量电路,电路采用恒压源或恒流源供电。 The design principle of the utility model: the main structure of the utility model is composed of a silicon substrate, a pressure sensitive film, a cavity, a corrosion hole and a strain resistance. The pressure-sensitive film is composed of three parts: single crystal silicon layer, silicon nitride protective layer and polysilicon structure layer. The cavity adopts MEMS surface micromachining technology, that is, sacrificial layer technology. Hydrofluoric acid is used to remove the silicon dioxide sacrificial layer through the etching hole. The corrosion hole is closed with polysilicon, and the pressure-sensitive film and the silicon substrate form a closed cavity, which is approximately a vacuum. Select the [110] crystal direction on the single crystal silicon film to set four strain resistors of single crystal silicon film, and connect them to form a Wheatstone bridge to form a pressure measurement circuit. The circuit is powered by a constant voltage source or a constant current source.

当压力作用时,传感器膜片发生弯曲,膜片应变作用于应变电阻产生压阻效应,惠斯通输出差动电压信号与压力值对应。当压力在传感器量程范围时,传感器输出与压力成线性关系的电压值,当压力超过量程达某一值时,传感器的感压膜与衬底接触,减缓膜片应力随压力变化趋势,保证大压力下膜片不断裂,提高过载能力。 When the pressure acts, the diaphragm of the sensor bends, and the strain of the diaphragm acts on the strain resistance to produce a piezoresistive effect, and the Wheatstone outputs a differential voltage signal corresponding to the pressure value. When the pressure is within the range of the sensor, the sensor outputs a voltage value that is linearly related to the pressure. When the pressure exceeds the range and reaches a certain value, the pressure-sensitive film of the sensor contacts the substrate, slowing down the trend of the diaphragm stress changing with the pressure, ensuring a large The diaphragm does not break under pressure, which improves the overload capacity.

采用SOI晶圆材料使压力敏感芯片耐辐射、耐高温,可适用于搭载多种功率元件的复合集成电路或高耐压集成电路。其中,应变电阻位于多晶硅结构层内侧,由隔离环实现电绝缘提高了芯片的可靠性。 The use of SOI wafer materials makes pressure-sensitive chips resistant to radiation and high temperature, and can be applied to composite integrated circuits or high-voltage-resistant integrated circuits equipped with various power components. Wherein, the strain resistance is located inside the polysilicon structure layer, and the electrical insulation is realized by the isolation ring, which improves the reliability of the chip.

本实用新型所述传感器芯片的制备工艺步骤如下: The preparation process steps of the sensor chip described in the utility model are as follows:

(1)选择合适的SOI晶圆(合适的单晶硅薄膜电阻率及绝缘层厚度)。 (1) Select a suitable SOI wafer (suitable monocrystalline silicon film resistivity and insulating layer thickness).

(2)常规清洗后,选择[110]晶向进行第一次光刻,在SOI材料上形成如图3(a)、3(b)所示结构。 (2) After routine cleaning, select the [110] crystal orientation for the first photolithography, and form the structures shown in Figure 3(a) and 3(b) on the SOI material.

(3)进行第二次光刻,在步骤(1)形成的单晶硅薄膜上刻蚀隔离槽,形成四个应变电阻,如图4所示。 (3) Carry out the second photolithography, etch isolation grooves on the single crystal silicon film formed in step (1) to form four strain resistors, as shown in FIG. 4 .

(4)利用低压化学气相沉积法(LPCVD)淀积适当厚度(厚度根据具体工艺情况选择)的氮化硅薄膜做第一层氮化硅绝缘保护层,如图5所示。 (4) Use low-pressure chemical vapor deposition (LPCVD) to deposit a silicon nitride film with an appropriate thickness (the thickness is selected according to the specific process conditions) as the first layer of silicon nitride insulating protective layer, as shown in Figure 5.

(5)进行第三次光刻,利用等离子刻蚀法形成应变电阻引线孔,如图6所示。 (5) The third photolithography is carried out, and the lead hole of the strain resistance is formed by using the plasma etching method, as shown in FIG. 6 .

(6)形成引线孔后,淀积金属层,进行第四次光刻形成金属导线,如图7所示。 (6) After forming the lead hole, deposit the metal layer, and perform the fourth photolithography to form the metal wire, as shown in FIG. 7 .

(7)采用LPCVD淀积适当厚度的氮化硅钝化薄膜,形成第二层氮化硅绝缘保护层,如图8所示。 (7) Deposit a silicon nitride passivation film with an appropriate thickness by LPCVD to form a second silicon nitride insulating protective layer, as shown in FIG. 8 .

(8)采用LPCVD淀积适当厚度(厚度根据芯片量程适当选择)的多晶硅作为第一层结构层,如图9所示。 (8) Use LPCVD to deposit polysilicon with an appropriate thickness (the thickness is properly selected according to the chip range) as the first structural layer, as shown in Figure 9.

(9)退火后,进行第五次光刻形成八个方形腐蚀孔,如图10所示。 (9) After annealing, perform the fifth photolithography to form eight square etching holes, as shown in Figure 10.

(10)芯片放到氢氟酸溶液中通过腐蚀孔腐蚀去掉二氧化硅牺牲层,采用临界干燥法,即腐蚀液逐渐用高压液态CO2代替,之后样品置于CO2临界点上,气、液相的界面消失,再干燥硅片,如图11所示。 (10) The chip is placed in the hydrofluoric acid solution to corrode the silicon dioxide sacrificial layer through the corrosion hole, and the critical drying method is adopted, that is, the corrosion solution is gradually replaced by high-pressure liquid CO 2 , and then the sample is placed on the critical point of CO 2 , gas, The interface of the liquid phase disappears, and then the silicon wafer is dried, as shown in Figure 11.

(11)利用LPCVD淀积适当厚度(厚度根据芯片量程适当选择)的多晶硅,形成密封腔体,形成含有多晶硅、氮化硅和单晶硅三层的感压膜,如图12所示。 (11) Use LPCVD to deposit polysilicon with an appropriate thickness (the thickness is appropriately selected according to the chip range) to form a sealed cavity and form a pressure-sensitive film containing three layers of polysilicon, silicon nitride and single crystal silicon, as shown in Figure 12.

(12)六次光刻形成外引线压焊点。 (12) Six times of photolithography to form the outer lead pads.

(13)划片、测试。 (13) Scribing and testing.

本实用新型这种基于牺牲层技术的SOI压力敏感芯片可广泛用于汽车中多路压力测量、环境控制压力测量以及航空系统、石化、电力等领域中的压力测量。 The SOI pressure sensitive chip based on the sacrificial layer technology of the utility model can be widely used in multi-channel pressure measurement in automobiles, environmental control pressure measurement, and pressure measurement in the fields of aviation systems, petrochemicals, electric power and the like.

Claims (2)

1.基于牺牲层技术的SOI压力敏感芯片,其特征在于:该芯片采用绝缘层上的单晶硅薄膜SOI材料制造,包括SOI的单晶硅衬底(1),SOI二氧化硅绝缘层作为牺牲层形成的腔体(2),在单晶硅薄膜(3)上刻蚀隔离槽(4)形成的四个应变电阻(5)及其金属导线(6);金属导线(6)上下的氮化硅绝缘保护层(7)及两次淀积形成的多晶硅结构层(8)与单晶硅薄膜(3)共同构成敏感芯片感压膜,感压膜边缘刻蚀有八个方形腐蚀孔(9),用于腐蚀二氧化硅牺牲层;四个应变电阻(5)通过金属导线(6)连接成惠斯通电桥,将压力信号转换成电压信号输出。 1. The SOI pressure-sensitive chip based on sacrificial layer technology is characterized in that: the chip is made of single crystal silicon thin film SOI material on the insulating layer, including the single crystal silicon substrate (1) of SOI, and the SOI silicon dioxide insulating layer is used as The cavity (2) formed by the sacrificial layer, four strain resistors (5) and their metal wires (6) formed by etching isolation grooves (4) on the single crystal silicon film (3); The silicon nitride insulating protection layer (7) and the polysilicon structure layer (8) formed by two depositions and the single crystal silicon film (3) together form a sensitive chip pressure-sensitive film, and eight square etching holes are etched on the edge of the pressure-sensitive film (9) is used to corrode the silicon dioxide sacrificial layer; four strain resistors (5) are connected through metal wires (6) to form a Wheatstone bridge, and the pressure signal is converted into a voltage signal for output. 2.根据权利要求1所述的基于牺牲层技术的SOI压力敏感芯片,其特征在于:应变电阻(5)由SOI材料上的单晶硅薄膜制成,通过隔离槽(4)与单晶硅薄膜(3)实现电隔离,位于多晶硅结构层(8)内侧。 2. The SOI pressure-sensitive chip based on sacrificial layer technology according to claim 1, characterized in that: the strain resistance (5) is made of a single crystal silicon film on the SOI material, and is connected to the single crystal silicon film through the isolation groove (4) The thin film (3) realizes electrical isolation and is located inside the polysilicon structure layer (8).
CN201620017149.5U 2016-01-08 2016-01-08 Sensitive chip of SOI pressure based on sacrifice layer technique Expired - Fee Related CN205317381U (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105444931A (en) * 2016-01-08 2016-03-30 沈阳工业大学 SOI pressure-sensitive chip based on sacrificial layer technology, and manufacturing method thereof
CN107504927A (en) * 2017-09-11 2017-12-22 重庆大学 A kind of surface acoustic wave high-temp strain sensor chip based on sheet metal and piezoelectric membrane and preparation method thereof
CN117147023A (en) * 2023-11-01 2023-12-01 合肥美镓传感科技有限公司 Gallium nitride pressure sensor and manufacturing method thereof

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105444931A (en) * 2016-01-08 2016-03-30 沈阳工业大学 SOI pressure-sensitive chip based on sacrificial layer technology, and manufacturing method thereof
CN107504927A (en) * 2017-09-11 2017-12-22 重庆大学 A kind of surface acoustic wave high-temp strain sensor chip based on sheet metal and piezoelectric membrane and preparation method thereof
CN107504927B (en) * 2017-09-11 2024-04-19 重庆大学 Acoustic surface wave high-temperature strain sensor chip based on metal sheet and piezoelectric film and preparation method thereof
CN117147023A (en) * 2023-11-01 2023-12-01 合肥美镓传感科技有限公司 Gallium nitride pressure sensor and manufacturing method thereof
CN117147023B (en) * 2023-11-01 2024-02-13 合肥美镓传感科技有限公司 Gallium nitride pressure sensor and manufacturing method thereof

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