CN1759484A - 光电二极管阵列及其制造方法和放射线检测器 - Google Patents
光电二极管阵列及其制造方法和放射线检测器 Download PDFInfo
- Publication number
- CN1759484A CN1759484A CNA200480006534XA CN200480006534A CN1759484A CN 1759484 A CN1759484 A CN 1759484A CN A200480006534X A CNA200480006534X A CN A200480006534XA CN 200480006534 A CN200480006534 A CN 200480006534A CN 1759484 A CN1759484 A CN 1759484A
- Authority
- CN
- China
- Prior art keywords
- photodiode
- photodiode array
- semiconductor substrate
- array
- plane
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F30/00—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors
- H10F30/20—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/80—Constructional details of image sensors
- H10F39/802—Geometry or disposition of elements in pixels, e.g. address-lines or gate electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/10—Integrated devices
- H10F39/12—Image sensors
- H10F39/18—Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors
- H10F39/189—X-ray, gamma-ray or corpuscular radiation imagers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/80—Constructional details of image sensors
- H10F39/803—Pixels having integrated switching, control, storage or amplification elements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/80—Constructional details of image sensors
- H10F39/809—Constructional details of image sensors of hybrid image sensors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05005—Structure
- H01L2224/05008—Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body, e.g.
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05005—Structure
- H01L2224/05009—Bonding area integrally formed with a via connection of the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/0502—Disposition
- H01L2224/05024—Disposition the internal layer being disposed on a redistribution layer on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/0502—Disposition
- H01L2224/05025—Disposition the internal layer being disposed on a via connection of the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/0502—Disposition
- H01L2224/05026—Disposition the internal layer being disposed in a recess of the surface
- H01L2224/05027—Disposition the internal layer being disposed in a recess of the surface the internal layer extending out of an opening
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05124—Aluminium [Al] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05155—Nickel [Ni] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05166—Titanium [Ti] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05169—Platinum [Pt] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05171—Chromium [Cr] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05568—Disposition the whole external layer protruding from the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05644—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
Landscapes
- Measurement Of Radiation (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Light Receiving Elements (AREA)
Abstract
本发明提供一种光电二极管阵列及其制造方法以及放射线检测器,其目的在于防止在封装时因光检测部的损伤而造成杂音的发生。本发明的光电二极管阵列,在n型硅基板(3)的被检测光的入射面侧,以阵列状形成多个光电二极管(4),且贯通入射面侧和其背面侧的贯通布线(8)针对光电二极管(4)来形成,其中:在其入射面侧,设置覆盖光电二极管(4)的形成区域并且透过被检测光的透明树脂膜(6),从而作成光电二极管阵列(1)。
Description
技术领域
本发明涉及光电二极管阵列及其制造方法、以及放射线检测器。
背景技术
作为此种光电二极管阵列,目前已知的是,利用将光入射面侧和背面侧进行连接的贯通布线(电极)、把来自光电二极管阵列的输出信号与背面侧进行电连接的类型的表面入射型光电二极管阵列(例如,参照日本国专利公开2001-318155号公报)。此公报所揭示的光电二极管阵列,如图17所示,用于取出信号的布线152从形成有作为光电变换部的本体的光电二极管144a、144b、144c、…144n的各个扩散层151而形成在光电二极管阵列144的表面,该布线152以连接于贯通Si布线基板153的表背的贯通布线154的方式延设着。另外,在光电二极管144的背面侧形成有连接于贯通布线154的凸块155,在布线152、贯通布线154和Si布线基板153之间由氧化硅膜的绝缘膜156a、156b、156c所绝缘。
但是,为了封装上述的光电二极管阵列例如CT用光电二极管阵列,作为吸附芯片的夹套,虽然可使用平夹套和角锥夹套,但是通常在进行倒装式接合的情况下使用平夹套。CT用光电二极管阵列,芯片面积大(例如,1边为20mm的矩形状),如图16B所示,当在使用通常的安装架中所使用的角锥夹套161时,因芯片162和角锥夹套161的间隙163而产生翘曲,因该翘曲造成位置偏差而具有封装精度降低之虑。另外,在进行倒装式接合之际需要加热及加压,但以角锥夹套161而言,热传导的效率不佳,而且,因所受压力也具有损伤芯片边缘之虑,角锥夹套161并不适于薄的芯片。基于此种理由,在进行倒装式接合的情况下,如图16A所示,一边以与芯片面作面接触的平夹套160吸附芯片162,一边由热块164对该芯片162施加热和压力。
然而,当使用平夹套160时,芯片162的芯片面全体与平夹套160接触。在此芯片162中,与平夹套160接触的芯片面是光检测部、即形成有用来构成光电二极管阵列的杂质扩散层的光入射面。此成为光入射面的芯片面全体在与平夹套160接触而受到加压及加热时,光检测部自身遭受到物理的损伤(damage)。如此一来,光检测部亦招致因表面损伤所造成的外观不良或特性劣化(暗电流或杂音增加等等)。
发明内容
于是,为了解决上述课题,本发明的目的在于提供一种可防止封装时因光电二极管阵列的损伤所引起的特性劣化的光电二极管阵列及其制造方法以及放射线检测器。
为了达到上述目的,本发明的光电二极管阵列的特征在于,具备在被检测光的入射面侧以阵列状形成多个光电二极管的半导体基板,半导体基板的贯通入射面侧和其背面侧的贯通布线针对光电二极管来形成,并且在半导体基板的入射面侧,设置至少覆盖形成有光电二极管的区域并且透过被检测光的树脂膜。
此光电二极管阵列是,因为树脂膜介在于形成有光电二极管的区域和在封装时所使用的平夹套之间,所以光电二极管不与在封装时所使用的平夹套直接接触而受树脂膜所保护,不会受到由加压所产生的应力或由加热所产生的应力。
上述光电二极管阵列是,将上述树脂膜设置在半导体基板的整个入射面侧为优选。此光电二极管阵列,可利用树脂膜而将各光电二极管的形成区域全体确实地覆盖,而且能容易地制造。
另外,在上述光电二极管阵列中,在半导体基板,在相邻的光电二极管之间,设置用于分离各光电二极管的杂质区域(分离层)即可。这些光电二极管阵列,因分离层而抑制表面泄漏,所以相邻的光电二极管彼此被确实地电气分离。
其次,本发明提供一种光电二极管阵列的制造方法,包括:在由第1导电型的半导体构成的半导体基板上形成贯通该半导体基板的两侧表面的贯通布线的第1工序;对于该半导体基板的单侧表面,向规定的区域添加杂质以形成多个第2导电型的杂质扩散层,将由各杂质扩散层和该半导体基板而成的多个光电二极管进行排列并设置成阵列状的第2工序;和,在该半导体基板的单侧表面侧设置至少覆盖形成有光电二极管的区域并且透过被检测光的树脂膜的第3工序。
根据此光电二极管阵列的制造方法,可在半导体基板的入射面侧,设置用来覆盖光电二极管的形成区域的树脂膜,以制造光电二极管阵列。
在上述光电二极管阵列的制造方法中,上述第1工序可以包括:在该半导体基板上形成多个穴部的工序;在包含有该各穴部的该半导体基板的至少单侧表面形成导电性覆膜的工序;和,研磨半导体基板以除去该导电性覆膜的工序。
这些光电二极管阵列的制造方法,可以还包括:在上述第1工序之后,在相邻的添加杂质的区域之间添加其它杂质以设置第1导电型的杂质区域的工序。根据此制造方法,可获得相邻的各光电二极管被确实地分离的光电二极管阵列。
而且,本发明提供一种放射线检测器,包括:上述任一光电二极管阵列;和,安装在光电二极管阵列的被检测光的入射面侧、并且因入射的放射线而发光的闪烁面板。
另外,提供一种放射线检测器,包括:由上述任一制造方法所制造的光电二极管阵列;和,安装在光电二极管阵列的设置了上述树脂膜一侧、因入射的放射线而发光的闪烁面板。
这些放射线检测器因为具备上述光电二极管阵列,所以形成在该光入射面的光电二极管因为受到树脂膜的保护而不会在封装时因加压或加热而受损伤,可防止因它们而产生的杂音或暗电流增加等所造成的特性劣化。
附图说明
图1是示意性地表示将实施方式的光电二极管阵列的主要部分进行放大的剖面图。
图2是表示构成光电二极管阵列的半导体芯片的侧面图及将其主要部分放大的剖面图。
图3是表示实施方式的光电二极管阵列的制造工序中途的过程的主要部分放大剖面图。
图4是表示图3的后续工序的主要部分放大剖面图。
图5是表示图4的后续工序的主要部分放大剖面图。
图6是表示图5的后续工序的主要部分放大剖面图。
图7是表示图6的后续工序的主要部分放大剖面图。
图8是表示图7的后续工序的主要部分放大剖面图。
图9是表示图8的后续工序的主要部分放大剖面图。
图10是表示图9的后续工序的主要部分放大剖面图。
图11是示意性地表示将实施方式的其它光电二极管阵列主要部分进行放大的剖面图。
图12是示意性地表示将实施方式的另外光电二极管阵列主要部分进行放大的剖面图。
图13是示意性地表示将实施方式的另外光电二极管阵列主要部分进行放大的剖面图。
图14是示意性地表示将具有欠缺部的透明树脂膜的光电二极管阵列的主要部分进行放大的剖面图。
图15是示意性地表示将具有实施方式的光电二极管阵列的放射线检测器的主要部分进行放大的剖面示意图。
图16A是示意性地表示由夹套吸附半导体芯片的状态、是表示利用平夹套进行吸附的状态的剖面图。
图16B是示意性地表示由夹套吸附半导体芯片的状态、是表示利用角锥夹套进行吸附的状态的剖面图。
图17是表示现有技术的光电二极管阵列的剖面图。
具体实施方式
以下,对本发明的实施方式加以说明。此外,同一要素使用同一符号,省略重复的说明。
图1是示意性地表示本发明实施方式的光电二极管阵列1的剖面图。此外,在以下的说明中,把光L的入射面设为表面,其相反侧的面设为背面。在以下的各图中,为了图示的便利性,尺寸可适当地变更。
光电二极管阵列1是,依pn结的多个光电二极管4以纵横有规则的阵列状进行2维排列,其一个一个的光电二极管4具有作为光电二极管阵列1的一像素的机能,整体构成一个光检测部。
光电二极管阵列1具有厚度为150~500μm(优选为400μm)左右且杂质浓度为1×1012~1015/cm3左右的n型(第1导电型)硅基板3。n型硅基板3的表面及背面形成由厚度0.05~1μm(优选为0.1μm)左右的SiO2所成的钝化膜2。另外,在光电二极管阵列1的表面侧,杂质浓度为1×1015~1020/cm3且膜厚为0.05~20μm左右(优选为0.2μm)的p型(第2导电型)杂质扩散层5以纵横的有规律的阵列状进行2维排列。由该各p型杂质扩散层5和n型硅基板3而成的pn结构成光电二极管4。
其次,各p型杂质扩散层5所存在的区域是形成光电二极管4的区域(形成区域),其以外的区域成为未形成光电二极管的非形成区域,在其表面侧,至少可覆盖光电二极管4的形成区域全体的透明树脂膜6设置在表面侧全体。
此透明树脂膜6成为由光电二极管4全体所成的光检测部的保护膜、且配置在入射面侧,所以,由使光电二极管阵列4所检测的光(被检测光,例如,后述的闪烁面板31所发生的荧光)透过且对该被检测光为光学上透明的光透过性的树脂、例如环氧树脂、聚酰亚胺、硅酮、氟、丙烯酸酯等或由以它们等为基材的复合材料所构成。
另外,透明树脂膜6如同后面将述及,在倒装式接合之际与平夹套直接接触,因为被加压且被加热,所以优选具备可发挥用来保护各光电二极管4以缓冲此加压及加热的作为缓冲层的功能。在此情况下,例如热膨胀系数为1×10-6~1×10-4/℃左右,作为弹性特性的弹性率为10~12000kg/cm2左右,热传导率为0.2~1.85W/mK,杂质离子不会因加热而朝光电二极管4扩散,且具有可吸收至少来自后述的闪烁面板31的光的膜厚(1~50μm(优选为10μm)左右)者为优选。
此透明树脂膜6若设置成至少可覆盖光电二极管4的形成区域全体的范围即可。若満足此条件,也可以用1个透明树脂膜6覆盖光电二极管4的形成区域全体,也可将透明树脂膜6按各光电二极管4而个别地形成,在其非形成区域,形成一部分未形成的欠缺部6a(参照图14)。然而,以简易制造工序这点而言,将1个透明树脂膜6设置在表面侧全体是优选(针对此点将在后面详述)。
另外,光电二极管阵列1的光电二极管4各自具有贯通布线8。各贯通布线8由将n型硅基板3的表面侧和背面侧贯通且形成为直径10μm~100μm左右(优选为50μm左右)、且磷的浓度为1×1015~1020/cm3左右的多晶硅所成,其表面侧通过由铝所成的电极布线9(膜厚为1μm左右)而与p型杂质扩散层5电连接,背面侧通过由同为铝所成的电极衬垫10(膜厚为0.05μm~5μm,优选为1μm左右)而被电连接。焊锡的凸块电极12经由Ni-Au所成的凸点底层金属(UBM)11而被连接至其各电极衬垫10。各贯通布线8设置在未形成有光电二极管4的非形成区域,但也可设置在除其以外的部分。
而且,图示的光电二极管阵列1是,在p型杂质扩散层5彼此之间,即,在相邻的光电二极管4、4之间,将n+型杂质区域(分离层)7设置为深度0.5~6μm左右。此n+型杂质区域(分离层)7具有将相邻的光电二极管4、4进行电气分离的功能,通过此设置,相邻的光电二极管4、4被确实地电气分离,可减低光电二极管4彼此的串音。然而,即使光电二极管阵列1未设置此n+型杂质区域7,也具有实用上充分可容许的程度的光检测特性。
图2表示构成光电二极管阵列1的半导体芯片30的侧面图及将其主要部分放大表示的剖面图。如图2所示,半导体芯片30的宽度W1为22.4mm左右,厚度D为约0.3mm的极薄的板状,具有多数个上述的光电二极管4(例如16×16个的2维配置),相邻的像素间的间距W2为1.4mm左右的大面积(例如22.4mm×22.4mm)的芯片。
并且,如以上那样构成的光电二极管阵列1是,当光L从表面侧入射时,其被检测光L在透过透明树脂膜6之后,向各p型杂质扩散层5入射,各光电二极管4生成对应其入射光的载流子。因生成的载流子所产生的光电流经由连接至各p型杂质扩散层5的电极布线9及贯通布线8,再经由背面侧的各电极衬垫10和UBM11而从凸块电极12被取出。通过来自此凸块电极12的输出以进行入射光的检测。
如同上述,光电二极管阵列1是,可覆盖光电二极管4的形成区域全体的透明树脂膜6设置在表面侧。因此,在将半导体芯片30吸附于平夹套上而进行倒装式接合时,此透明树脂膜6与平夹套接触,以介在于平夹套和光电二极管4的形成区域之间的的形状进行配置。由此,构成光检测部的光电二极管4的形成区域受此透明树脂膜6所保护,不会与平夹套直接接触。因此,光电二极管阵列1的光检测部因为不直接承受因加压或加热所产生的应力,所以光检测部自身不会受到物理性的损伤(damage),可抑制起因于那样的损伤的杂音或暗电流等的发生。因此,光电二极管阵列1可进行高精度(S/N比高)的光检测。另外,因为透明树脂膜6可发挥作为能够保护各光电二极管4的缓冲层的功能,所以也可吸收在吸附于平夹套之际的物理性冲撃,在这点上也具有效果。
另外,如同后面将述及,除了倒装式接合以外,例如在将光电二极管阵列1与闪烁器一体化而作为CT用传感器的情况下,因为闪烁器不直接与光检测部接触,所以也可回避闪烁器在安装时的损伤。
但是,上述的光电二极管阵列1也可为如下的构成。例如,如图11所示,也使磷扩散于孔部15的侧壁,也可将n+型杂质区域7设置在贯通布线8的周围。如此一来,可将在形成孔部15(穴部14)之际来自损伤层不要的载流子予以捕捉,可抑制暗电流。此时的所要添加的磷的浓度为1×1015~1020/cm3左右,n+型杂质区域7的厚度(深度)为0.1~5μm左右就可以。
又如图12所示,在孔部15内的氧化硅膜20之上也可设置膜厚为0.1~2μm左右的氮化硅膜26。如此一来,使得n型硅基板3与贯通布线8的绝缘确实而可减低动作不良。
而且,在背面侧也掺杂磷且使之扩散,如图13所示,也可设置n+型杂质区域7。在此情况下,可自背面取出阴极电极16。如此一来,成为不需设置用于阴极的贯通布线,所以涉及损伤的减低、暗电流的减低、以及不良率的减低。当然,根据需要而从形成于表面的n+型杂质区域7设置贯通布线而将作为阴极的电极取出于背面侧也可以。
其次,针对本实施方式的光电二极管阵列1的制造方法,依据图3~图10加以说明。
首先,准备厚度为150~500μm(优选为400μm)左右的n型硅基板3。接着,如图3所示,利用ICP-RIE,在n型硅基板3的表面(以下此面为表面,而相反侧的面为背面)侧,将直径10μm~100μm(优选为50μm)左右的未贯通的穴部14,以n型硅基板3的厚度所对应的深度(例如100~350μm左右),对应光电二极管4形成多个之后,在基板的表面及背面施予热氧化以形成氧化硅膜(SiO2)20。各穴部14随后形成有贯通布线8。氧化硅膜(SiO2)20实现后述的贯通布线8与n型硅基板3的电气绝缘。
其次,如图4所示,作为添加了杂质磷的导电性覆膜而言,在基板的表面和背面或仅在表面形成多晶硅膜21,同时在穴部14填入添加有其杂质而低电阻化的多晶硅。接着,如图5所示,研磨基板的表面及背面,除去形成在表面和背面的多晶硅膜21,同时使埋入穴部14的多晶硅从表面和背面露出,在形成了贯通两侧表面的孔部15之后,将该埋设的多晶硅作为贯通布线8,再次在基板的表面及背面施行热氧化以形成氧化硅膜22。此氧化硅膜22在后续的工序中被作为n+热扩散的屏蔽膜来利用。
然后,针对n型硅基板3的表面侧的氧化硅膜22,进行利用规定的光掩模的图案化,仅在欲设置n+型杂质区域7的区域设置开口,从该被开口的部分(开口部)使磷扩散以设置n+型杂质区域7(在未设置n+型杂质区域7的情况下也可省略此工序(杂质区域形成工序))。其后,再次在基板的表面及背面施行热氧化以形成氧化硅膜23(参照图6)。此氧化硅膜23在后续的工序中被作为要形成p型杂质扩散层5之际的屏蔽膜来利用。
接着,针对氧化硅膜23,进行利用规定的光掩护罩的图案化,仅在欲形成各p型杂质扩散层5的区域设置开口。接着从该开口部使硼扩散,将p型杂质扩散层5以2维排列形成纵横的阵列状。其后,再次在基板的表面及背面施行热氧化以形成氧化硅膜24(参照图7)。由此,依各p型杂质扩散层5和n型硅基板3的pn结的光电二极管4以2维排列形成纵横的阵列状,此光电二极管4成为对应于像素的部分。
而且,在形成有各贯通布线8的区域形成接触孔(contacthole)。接着,针对于表面及背面分别将铝金属膜形成在全面之后,使用规定的光掩模进行图案化,除去该金属膜的不要的部分,分别在表面侧形成电极布线9、在背面侧形成电极衬垫10(参照图8)。图中显示仅取出阳极的电极。在从表面取出阴极的电极的情况并未图示,可从n+型杂质区域7经由电极布线9和贯通布线8而取出于背面。
其次,在n型硅基板3的表面侧,涂布作为透明树脂膜6的材料的环氧树脂、聚酰亚胺树脂、硅树脂、氟树脂、丙烯酸酯树脂等或以它们为基材的复合材料的树脂,利用旋涂法或丝网印刷法使其扩大至整个面且使之固化,设置透明树脂膜6(参照图9)。通过设置此透明树脂膜6,构成光检测部的光电二极管4的形成区域被保护。此外,在透明树脂膜6上形成上述的欠缺部6a的情况下,从欠缺部6a的部分除去所涂布的树脂即可,即便如此,光电二极管4的形成区域亦受到保护。
然后,在各电极衬垫10设置凸块电极12,在作为该凸块电极12而使用焊锡的情况下,因为焊锡对铝的湿润性较差,所以在各电极衬垫10形成用于居中调节各电极衬垫10与凸块电极12的UBM11,而重叠于该UBM11上以形成凸块电极12(参照图10)。通过经由以上的工序,在不产生起因于封装时的损伤所造成的杂音之下,可制造能进行高精度光检测的光电二极管阵列1。
在此情况下,UBM11利用无电解电镀、并使用Ni-Au来形成,但也可利用剥落法(1ift-offmethod)、并使用Ti-Pt-Au或Cr-Au来形成。另外,凸块电极12是利用锡球搭载法或印刷法在规定的UBM11形成焊锡、再利用回焊而可获得。此外,凸块电极12并非局限于焊锡,可以是金凸块、镍凸块、铜凸块,也可以是包含有导电性填料等金属的导电性树脂凸块。
其次,针对本发明的放射线检测器的实施方式加以说明。图15是本实施方式的放射线检测器40的侧剖面图。此放射线检测器40包括:使放射线入射,再将依其放射线所产生的光从光射出面31a射出的闪烁面板31;和,把从闪烁面板31射出的光由光入射面入射、再变换成电信号的上述的光电二极管阵列1。此放射线检测器40的特征是包括本发明的光电二极管阵列1。
闪烁面板31被安装在光电二极管阵列1的表面侧(入射面侧),光电二极管阵列1的表面侧设置有上述的透明树脂膜6。因此,闪烁面板31的背面、即光射出面31a与透明树脂膜6接触,但不直接与光电二极管4的形成区域接触。另外,在闪烁面板31的光射出面31a和透明树脂膜6之问充填了具有不使光透过特性劣化而考虑的折射率的光学树脂35,依此光学树脂35,则从闪烁面板31射出的光有效率地入射至光电二极管阵列1。此光学树脂35可使用具有使闪烁面板31所射出的光透过的性质的环氧树脂、丙烯酯酸树脂、聚氨酯树脂、硅树脂、氟树脂等,也可使用以它们为基材的复合材料。
其次,在将光电二极管阵列1接合至未图示的封装布线基板上之际用平夹套吸附表面。但是,因为光电二极管阵列1的表面设置有上述的透明树脂膜6,所以平夹套的吸附面不直接与光检测部接触,且通过安装了闪烁面板31,其光射出面31a也不与光电二极管4的形成区域直接接触。因此,具有此种光电二极管阵列1和闪烁面板31的放射线检测器40,因为可防止在封装时的因光检测部的损伤所产生的杂音或暗电流等等,所以可进行高精度的光检测,也能进行精度佳的放射线检测。
产业上的可利用性
如以上详述,根据本发明,在光电二极管阵列及其制造方法以及放射线检测器中,可有效地防止因封装时的光电二极管的损伤所造成的杂音或暗电流的发生。
Claims (8)
1.一种光电二极管阵列,其特征在于:
具备在被检测光的入射面侧以阵列状形成多个光电二极管的半导体基板,
所述半导体基板的贯通所述入射面侧和其背面侧的贯通布线针对所述光电二极管来形成,
在所述半导体基板的入射面侧,设置至少覆盖形成有所述光电二极管的区域并且透过所述被检测光的树脂膜。
2.如权利要求1所述的光电二极管阵列,其特征在于:将所述树脂膜设置在所述半导体基板的入射面侧全体。
3.如权利要求1或2所述的光电二极管阵列,其特征在于:
在所述半导体基板,在相邻的所述各光电二极管之间设置将各光电二极管分离的杂质区域。
4.一种光电二极管阵列的制造方法,其特征在于,包括:
在由第1导电型的半导体构成的半导体基板上形成贯通该半导体基板的两侧表面的贯通布线的第1工序;
对于所述半导体基板的单侧表面,向规定的区域添加杂质以形成多个第2导电型的杂质扩散层,将由各杂质扩散层和所述半导体基板而成的多个光电二极管进行排列并设置成阵列状的第2工序;和
在所述半导体基板的所述单侧表面侧,设置至少覆盖形成有所述光电二极管的区域并且透过被检测光的树脂膜的第3工序。
5.如权利要求4所述的光电二极管阵列的制造方法,其特征在于:
所述第1工序包括:在所述半导体基板上形成多个穴部的工序;在包含该各穴部的所述半导体基板的至少单侧表面形成导电性覆膜的工序;和,研磨所述半导体基板以除去所述导电性覆膜的工序。
6.如权利要求4或5所述的光电二极管阵列的制造方法,其特征在于:还包括:在所述第1工序之后,在相邻的添加所述杂质的区域之间添加其它杂质以设置第1导电型的杂质区域的工序。
7.一种放射线检测器,其特征在于:
包括:权利要求1~3中任一项所述的光电二极管阵列;和,安装在该光电二极管阵列的所述被检测光的入射面侧并且因入射的放射线而发光的闪烁面板。
8.一种放射线检测器,其特征在于:
包括:利用权利要求4~6中任一项所述的制造方法所制造的光电二极管阵列;和,安装在该光电二极管阵列的设置了所述树脂膜一侧并且因入射的放射线而发光的闪烁面板。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003063891A JP4247017B2 (ja) | 2003-03-10 | 2003-03-10 | 放射線検出器の製造方法 |
JP063891/2003 | 2003-03-10 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2008101283695A Division CN101311749B (zh) | 2003-03-10 | 2004-03-10 | 光电二极管阵列及其制造方法和放射线检测器 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1759484A true CN1759484A (zh) | 2006-04-12 |
CN100418229C CN100418229C (zh) | 2008-09-10 |
Family
ID=32984448
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB200480006534XA Expired - Lifetime CN100418229C (zh) | 2003-03-10 | 2004-03-10 | 光电二极管阵列及其制造方法和放射线检测器 |
CN2008101283695A Expired - Lifetime CN101311749B (zh) | 2003-03-10 | 2004-03-10 | 光电二极管阵列及其制造方法和放射线检测器 |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2008101283695A Expired - Lifetime CN101311749B (zh) | 2003-03-10 | 2004-03-10 | 光电二极管阵列及其制造方法和放射线检测器 |
Country Status (9)
Country | Link |
---|---|
US (2) | US7727794B2 (zh) |
EP (2) | EP1605515B1 (zh) |
JP (1) | JP4247017B2 (zh) |
KR (1) | KR101080501B1 (zh) |
CN (2) | CN100418229C (zh) |
DE (1) | DE602004027121D1 (zh) |
IL (1) | IL170732A (zh) |
TW (1) | TWI312199B (zh) |
WO (1) | WO2004082025A1 (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104685630A (zh) * | 2012-11-28 | 2015-06-03 | 浜松光子学株式会社 | 光电二极管阵列 |
Families Citing this family (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7288825B2 (en) * | 2002-12-18 | 2007-10-30 | Noble Peak Vision Corp. | Low-noise semiconductor photodetectors |
JP4247017B2 (ja) | 2003-03-10 | 2009-04-02 | 浜松ホトニクス株式会社 | 放射線検出器の製造方法 |
US7968853B2 (en) * | 2005-04-26 | 2011-06-28 | Koninklijke Philips Electronics N.V. | Double decker detector for spectral CT |
CA2541256A1 (en) * | 2006-02-22 | 2007-08-22 | Redlen Technologies Inc. | Shielding electrode for monolithic radiation detector |
CN102082189B (zh) * | 2006-04-28 | 2012-11-28 | 株式会社半导体能源研究所 | 光电转换元件和光电转换元件制造方法 |
JP4455534B2 (ja) * | 2006-05-09 | 2010-04-21 | 株式会社東芝 | 放射線検出器およびその製造方法 |
GB0622695D0 (en) * | 2006-11-14 | 2006-12-27 | Element Six Ltd | Robust radiation detector comprising diamond |
JP4961617B2 (ja) * | 2007-10-01 | 2012-06-27 | 新光電気工業株式会社 | 配線基板とその製造方法及び半導体装置 |
JP5343245B2 (ja) * | 2008-05-15 | 2013-11-13 | 新光電気工業株式会社 | シリコンインターポーザの製造方法 |
JP2009295834A (ja) * | 2008-06-06 | 2009-12-17 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
JP4808748B2 (ja) * | 2008-06-13 | 2011-11-02 | 浜松ホトニクス株式会社 | ホトダイオードアレイの製造方法 |
JP2010114320A (ja) * | 2008-11-07 | 2010-05-20 | Panasonic Corp | 半導体装置 |
JP4808759B2 (ja) * | 2008-11-18 | 2011-11-02 | 浜松ホトニクス株式会社 | 放射線検出器 |
JP4808760B2 (ja) * | 2008-11-19 | 2011-11-02 | 浜松ホトニクス株式会社 | 放射線検出器の製造方法 |
US9202961B2 (en) | 2009-02-02 | 2015-12-01 | Redlen Technologies | Imaging devices with solid-state radiation detector with improved sensitivity |
US8614423B2 (en) * | 2009-02-02 | 2013-12-24 | Redlen Technologies, Inc. | Solid-state radiation detector with improved sensitivity |
US8476101B2 (en) * | 2009-12-28 | 2013-07-02 | Redlen Technologies | Method of fabricating patterned CZT and CdTe devices |
US8860166B2 (en) * | 2010-03-23 | 2014-10-14 | Stmicroelectronics S.R.L. | Photo detector array of geiger mode avalanche photodiodes for computed tomography systems |
US20120015474A1 (en) * | 2010-07-19 | 2012-01-19 | Yung-Chun Wu | Method for fabricating silicon heterojunction solar cells |
US8753917B2 (en) * | 2010-12-14 | 2014-06-17 | International Business Machines Corporation | Method of fabricating photoconductor-on-active pixel device |
JP5895504B2 (ja) | 2011-12-15 | 2016-03-30 | ソニー株式会社 | 撮像パネルおよび撮像処理システム |
JP5684157B2 (ja) * | 2012-01-04 | 2015-03-11 | 株式会社東芝 | 半導体装置 |
JP5925711B2 (ja) | 2013-02-20 | 2016-05-25 | 浜松ホトニクス株式会社 | 検出器、pet装置及びx線ct装置 |
JP6314984B2 (ja) * | 2013-07-04 | 2018-04-25 | コニカミノルタ株式会社 | シンチレータパネル及びその製造方法 |
JP6281268B2 (ja) * | 2013-12-06 | 2018-02-21 | 大日本印刷株式会社 | ガス増幅を用いた放射線検出器 |
TWI656631B (zh) * | 2014-03-28 | 2019-04-11 | 日商半導體能源研究所股份有限公司 | 攝像裝置 |
KR20180071802A (ko) * | 2016-12-20 | 2018-06-28 | 삼성전자주식회사 | 이미지 센서 |
CN111933748A (zh) * | 2020-07-22 | 2020-11-13 | 中国电子科技集团公司第十三研究所 | 背入射式日盲紫外探测器及其制作方法 |
Family Cites Families (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4110122A (en) * | 1976-05-26 | 1978-08-29 | Massachusetts Institute Of Technology | High-intensity, solid-state-solar cell device |
US5189297A (en) * | 1988-08-29 | 1993-02-23 | Santa Barbara Research Center | Planar double-layer heterojunction HgCdTe photodiodes and methods for fabricating same |
JPH0772255A (ja) * | 1993-09-01 | 1995-03-17 | Fuji Photo Film Co Ltd | 放射線検出器および画像信号処理方法 |
WO1995026573A1 (en) | 1994-03-28 | 1995-10-05 | Seiko Instruments Inc. | Semiconductor device for detecting light and radiation, and method of manufacturing the device |
US5886359A (en) * | 1996-06-13 | 1999-03-23 | Eastman Kodak Company | X-ray dectector, detection assembly, and method |
DE19714689A1 (de) * | 1997-04-09 | 1998-10-15 | Siemens Ag | Röntgendetektor |
US6211524B1 (en) * | 1997-04-18 | 2001-04-03 | The United States Of America As Represented By The United States Department Of Energy | Enhanced radiation detectors using luminescent materials |
US6326652B1 (en) * | 1999-06-18 | 2001-12-04 | Micron Technology, Inc., | CMOS imager with a self-aligned buried contact |
GB9915433D0 (en) | 1999-07-01 | 1999-09-01 | Europ Org For Nuclear Research | A monolithic semiconductor detector |
US6194258B1 (en) * | 2000-01-18 | 2001-02-27 | Taiwan Semiconductor Manufacturing Company | Method of forming an image sensor cell and a CMOS logic circuit device |
JP2001318155A (ja) | 2000-02-28 | 2001-11-16 | Toshiba Corp | 放射線検出器、およびx線ct装置 |
JP3713418B2 (ja) * | 2000-05-30 | 2005-11-09 | 光正 小柳 | 3次元画像処理装置の製造方法 |
JP2002031687A (ja) | 2000-07-18 | 2002-01-31 | Canon Inc | 放射線検出装置 |
JP4447752B2 (ja) | 2000-08-03 | 2010-04-07 | 浜松ホトニクス株式会社 | 放射線検出器 |
JP4283427B2 (ja) * | 2000-08-03 | 2009-06-24 | 浜松ホトニクス株式会社 | 放射線検出器およびシンチレータパネル |
JP2003066149A (ja) | 2000-08-14 | 2003-03-05 | Toshiba Corp | 放射線検出器、放射線検出システム、x線ct装置 |
JP2002270808A (ja) * | 2001-03-13 | 2002-09-20 | Matsushita Electric Ind Co Ltd | Mos型撮像装置 |
JP2003084066A (ja) * | 2001-04-11 | 2003-03-19 | Nippon Kessho Kogaku Kk | 放射線検出器用部品、放射線検出器および放射線検出装置 |
JP2003017676A (ja) * | 2001-04-27 | 2003-01-17 | Canon Inc | 放射線撮像装置およびそれを用いた放射線撮像システム |
US6765276B2 (en) * | 2001-08-23 | 2004-07-20 | Agilent Technologies, Inc. | Bottom antireflection coating color filter process for fabricating solid state image sensors |
JP3735547B2 (ja) * | 2001-08-29 | 2006-01-18 | 株式会社東芝 | 半導体装置及びその製造方法 |
JP2003066150A (ja) * | 2001-08-30 | 2003-03-05 | Canon Inc | 蛍光板、放射線検出装置および放射線検出システム |
JP4681774B2 (ja) * | 2001-08-30 | 2011-05-11 | キヤノン株式会社 | 撮像素子、その撮像素子を用いた撮像装置、及びその撮像装置を用いた撮像システム |
US6462365B1 (en) * | 2001-11-06 | 2002-10-08 | Omnivision Technologies, Inc. | Active pixel having reduced dark current in a CMOS image sensor |
JP2003347324A (ja) * | 2002-05-30 | 2003-12-05 | Fujitsu Ltd | マウント装置及び方法 |
EP1605513B1 (en) * | 2003-03-10 | 2015-01-07 | Hamamatsu Photonics K.K. | Photodiode array, method for manufacturing same, and radiation detector |
JP4247017B2 (ja) | 2003-03-10 | 2009-04-02 | 浜松ホトニクス株式会社 | 放射線検出器の製造方法 |
US20060138330A1 (en) * | 2003-03-28 | 2006-06-29 | Ronan Engineering Company | Flexible liquid-filled ionizing radiation scintillator used as a product level detector |
-
2003
- 2003-03-10 JP JP2003063891A patent/JP4247017B2/ja not_active Expired - Fee Related
-
2004
- 2004-03-10 EP EP04719113A patent/EP1605515B1/en not_active Expired - Lifetime
- 2004-03-10 DE DE602004027121T patent/DE602004027121D1/de not_active Expired - Lifetime
- 2004-03-10 US US10/548,487 patent/US7727794B2/en not_active Expired - Lifetime
- 2004-03-10 TW TW93106308A patent/TWI312199B/zh not_active IP Right Cessation
- 2004-03-10 EP EP20100150164 patent/EP2169720B1/en not_active Expired - Lifetime
- 2004-03-10 WO PCT/JP2004/003118 patent/WO2004082025A1/ja active Application Filing
- 2004-03-10 CN CNB200480006534XA patent/CN100418229C/zh not_active Expired - Lifetime
- 2004-03-10 CN CN2008101283695A patent/CN101311749B/zh not_active Expired - Lifetime
-
2005
- 2005-09-07 KR KR1020057016718A patent/KR101080501B1/ko active IP Right Grant
- 2005-09-07 IL IL170732A patent/IL170732A/en active IP Right Grant
-
2010
- 2010-01-20 US US12/656,175 patent/US8389322B2/en not_active Expired - Lifetime
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104685630A (zh) * | 2012-11-28 | 2015-06-03 | 浜松光子学株式会社 | 光电二极管阵列 |
CN104685630B (zh) * | 2012-11-28 | 2018-02-09 | 浜松光子学株式会社 | 光电二极管阵列 |
US10418496B2 (en) | 2012-11-28 | 2019-09-17 | Hamamatsu Photonics K.K. | Photodiode array |
Also Published As
Publication number | Publication date |
---|---|
TW200505039A (en) | 2005-02-01 |
KR101080501B1 (ko) | 2011-11-04 |
US8389322B2 (en) | 2013-03-05 |
IL170732A (en) | 2011-02-28 |
DE602004027121D1 (de) | 2010-06-24 |
US20100123081A1 (en) | 2010-05-20 |
KR20050113640A (ko) | 2005-12-02 |
US7727794B2 (en) | 2010-06-01 |
JP2004273848A (ja) | 2004-09-30 |
JP4247017B2 (ja) | 2009-04-02 |
EP1605515A4 (en) | 2006-03-15 |
CN101311749B (zh) | 2011-04-13 |
CN101311749A (zh) | 2008-11-26 |
EP1605515A1 (en) | 2005-12-14 |
TWI312199B (en) | 2009-07-11 |
EP1605515B1 (en) | 2010-05-12 |
EP2169720A1 (en) | 2010-03-31 |
CN100418229C (zh) | 2008-09-10 |
EP2169720B1 (en) | 2012-07-11 |
US20060255280A1 (en) | 2006-11-16 |
WO2004082025A1 (ja) | 2004-09-23 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN1759484A (zh) | 光电二极管阵列及其制造方法和放射线检测器 | |
CN100385673C (zh) | 检测器 | |
CN1685513A (zh) | 光电二极管阵列及其制造方法 | |
CN1836331A (zh) | 半导体光检测元件和放射线检测装置 | |
CN101373783B (zh) | 光电二极管阵列及其制造方法 | |
US20090302410A1 (en) | Photodiode array and production method thereof, and radiation detector | |
CN1759485A (zh) | 光电二极管阵列及其制造方法和放射线检测器 | |
JP4808760B2 (ja) | 放射線検出器の製造方法 | |
CN1768429A (zh) | 光电二极管阵列及其制造方法和放射线检测器 | |
JP4808748B2 (ja) | ホトダイオードアレイの製造方法 | |
JP4808759B2 (ja) | 放射線検出器 | |
US20150243813A1 (en) | Solar cell, method for manufacturing the same, and solar cell module | |
CN1523645A (zh) | 半导体器件 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CX01 | Expiry of patent term | ||
CX01 | Expiry of patent term |
Granted publication date: 20080910 |