CN1326432C - High-density circuit board without pad design and manufacturing method thereof - Google Patents

Abstract

The invention discloses a high-density circuit board without welding pad design and a manufacturing method thereof, which mainly comprises the following steps: providing a circuit board substrate; forming an external circuit including a plurality of external contacts; forming a solder mask layer covering the circuit board substrate and the external circuit, the solder mask layer having a plurality of solder mask layer openings; exposing the external contacts, and forming a plurality of conductive bumps on the external contacts within the opening range of the solder mask layer respectively for connecting an external element to form the high-density circuit board without the solder pad. The invention avoids the restriction factor of the size of the welding pad, can accommodate more lines in the circuit of the same layer under the condition of not increasing the circuit layer number or the surface area of the circuit board, so as to reduce the thickness, the surface area and the manufacturing cost of the high-density circuit board and help to reduce the size of the final product.

Description

High-density circuit board without pad design and manufacturing method thereof

technical field

The invention relates to a circuit board, in particular to a high-density circuit board and a manufacturing method thereof.

technical background

With the demand for light, thin, short and small electronic products in the market, in addition to the design of IC chips, more electronic components must be placed in the limited area of the semiconductor substrate; in the design of circuit boards , especially the flip-chip packaging substrate used to package the above-mentioned IC chip connection, the general BGA packaging substrate, or the circuit used to connect the semiconductor chip package, light-emitting element, connector, passive element, another circuit board, or other components Boards must also be placed with higher density circuit traces in a limited area. However, in the circuit design of the above-mentioned circuit board, the design of its external contacts becomes an important factor limiting the routing density of the above-mentioned circuit.

Please refer to FIG. 1 , which takes a traditional flip-chip package substrate as an example to illustrate how the design of its external contacts limits the density of its circuit traces. In Fig. 1, the pad 112 is the external contact point of the external circuit 110, the diameter _R1 of the pad 112 is usually 2 to 10 times larger than the line width W of the external circuit 110, and the line distance between the wires 114 in the external circuit 110 Therefore, subject to the constraints of the pads 112, in order not to short-circuit adjacent circuits, the line spacing between the wires 114 in the external circuit 110 must be greater than the sum of the wire width W of the wires 114 and the diameter _R of the pads 112 (W+R ₁ ) half of it. When designing a circuit board with a line spacing greater than 180 μm, it has not caused a great impact; however, when designing a circuit board such as a flip-chip package substrate, the contact spacing of the connected IC chip is often less than 180 μm, which is often limited by If the diameter of the bonding pad 112 cannot be reduced by reducing the distance between the wires 114 in the external circuit 110 to increase the circuit density per unit area, the only way to increase the number of circuit layers of the flip-chip package substrate 100 or increase The area of the flip-chip packaging substrate 100 is required to accommodate the required number of circuits, but thus the thickness, area and manufacturing cost of the flip-chip packaging substrate 100 are increased, which is not conducive to the reduction of the size of the final product. In the design of other circuit board circuits, such as general BGA packaging substrates, or circuit boards used to connect semiconductor chip packages, light-emitting components, connectors, passive components, another circuit board, or other components, also encounter Got the same problem.

Contents of the invention

In view of this, the main purpose of the present invention is to provide a high-density circuit board without soldering pad design, which can avoid the above-mentioned constraints on the size of the soldering pads in the design of circuit routing, and can increase the number of circuit layers of the circuit board without increasing the number of layers. In the case of surface area or surface area, more lines can be accommodated in the circuit of the same layer, so as to reduce the thickness, surface area and manufacturing cost of the above-mentioned high-density circuit board, and can help reduce the size of the final product.

Another object of the present invention is to provide a method for manufacturing a high-density circuit board without pad design, which can accommodate more circuits in the same layer of circuits without increasing the number of circuit layers or surface area of the circuit board. Quantity, in order to reduce the thickness, surface area and manufacturing cost of the above-mentioned high-density circuit board, and can help to reduce the size of the final product.

For achieving the above object, the technical scheme adopted in the present invention is:

Provides a high-density circuit board with no solder pad design, including:

A circuit board substrate, one surface of the circuit board substrate is a dielectric layer;

An external circuit formed on the dielectric layer, the external circuit includes a plurality of external contacts, and the width of these external contacts is not greater than the line width of the external circuit;

A solder resist layer, covering the above-mentioned dielectric layer and the above-mentioned external circuit, the solder-resist layer has a plurality of openings in the solder-resist layer, exposing the above-mentioned external contacts, and the diameters of the above-mentioned solder-resist layer openings are not smaller than the exposed external contacts the width of the

A plurality of conductive bumps are respectively formed on the above-mentioned external contacts within the range of the opening of the above-mentioned solder mask layer, and are used to form an electrical connection with an external component. as well as

The external component at least includes: a semiconductor chip, a semiconductor chip package, a light emitting element, a connector, a passive element, or another circuit board.

The present invention also provides a method for manufacturing a high-density circuit board without pad design, including:

A circuit board substrate is provided, one surface of the circuit board substrate is a dielectric layer;

forming an external circuit on the dielectric layer, the external circuit includes a plurality of external contacts, and the width of the external contact is not greater than the line width of the external circuit;

forming a solder resist layer covering the dielectric layer and the external circuit, the solder resist layer has a plurality of solder resist layer openings exposing the external contacts, the diameters of the solder resist layer openings are not smaller than the exposed external the width of the joint; and

A plurality of conductive bumps are respectively formed on the above-mentioned external contacts within the opening range of the above-mentioned solder mask layer.

According to the above method, the conductive bumps are formed by electroless plating.

According to the above method, the conductive bumps can also be formed by electroplating.

Since the conductive bumps are formed by electroless plating, the height of the/those conductive bumps is not higher than the thickness of the solder resist layer.

Since the above-mentioned conductive bumps are formed by electroplating, the formation of these conductive bumps further includes:

forming a conductive metal layer covering the solder resist layer, the solder resist layer openings and the external contacts;

forming a resist layer covering the conductive metal layer;

patterning the resist layer to expose the conductive metal layer overlying the solder mask openings and the external contacts;

placing the circuit board substrate in an electroplating solution, and energizing the conductive metal layer, and plating the conductive bumps on the external contacts; and

The resist layer and the conductive metal layer covering the solder resist layer are removed.

Since the conductive bumps are formed by electroplating, the height of the conductive bumps is 20 μm˜60 μm higher than the thickness of the solder resist layer.

A high-density circuit board with no solder pad design, suitable for forming an electrical connection with an external component that has formed a pin or a bump, and is characterized in that it at least includes:

A circuit board substrate, one surface of the circuit board substrate is a dielectric layer;

An external circuit formed on the dielectric layer, the external circuit includes a plurality of external contacts, and the width of the external contacts is not greater than the line width of the external circuit;

A solder resist layer covering the dielectric layer and the external circuit, the solder resist layer has a plurality of solder resist layer openings exposing the external contacts, the diameters of the solder resist layer openings are not smaller than the exposed respective the width of the external joint; and

A plurality of metal bumps are respectively formed on the external contacts within the opening range of the solder resist layer by electroless plating, and the height of the metal bumps is not higher than the thickness of the solder resist layer.

A high-density circuit board with no pad design, suitable for forming an electrical connection with an external component without pins or bumps, characterized in that it at least includes:

A circuit board substrate, one surface of the circuit board substrate is a dielectric layer;

An external circuit formed on the dielectric layer, the external circuit includes a plurality of external contacts, and the width of the external contacts is not greater than the line width of the external circuit;

A solder resist layer covering the dielectric layer and the external circuit, the solder resist layer has a plurality of solder resist layer openings exposing the external contacts, the diameters of the solder resist layer openings are not smaller than the exposed respective the width of the external joint; and

A plurality of metal bumps are respectively formed on the external contacts within the opening range of the solder resist layer by electroplating, and the height of the metal bumps is 20 μm˜60 μm higher than the thickness of the solder resist layer.

Advantage of the present invention and positive effect are:

1. The high-density circuit board without soldering pad design provided by the present invention can eliminate the restriction factor of the soldering pad size when designing the circuit routing, and can, without increasing the number of circuit layers or the surface area of the circuit board, In the circuit of the same layer, more lines are accommodated, so as to reduce the thickness, surface area and manufacturing cost of the above-mentioned high-density circuit board, and can help to reduce the size of the final product.

2. The high-density circuit board with no pad design on the substrate has external contacts without pad design and bumps that replace the pad function. After combining with the IC chip, the height and width of the flip-chip bump will hardly change. Affected, reducing the risk of short-circuiting of adjacent flip-chip bumps due to bridging; and not only in the application of flip-chip packaging substrates, but also in other areas, it also reduces short-circuiting of adjacent flip-chip bumps as mentioned above The question of risk.

3. Its external components can skip the process of forming pins such as ball planting, and directly form electrical connections with high-density circuit boards, which can reduce the process steps of semiconductor packaging or electronic product assembly, not only shorten the process time and increase Output, and in the case of reducing the risk of a yield drop by reducing one process step, it can improve the process yield and reduce production costs.

4. There is enough space between the flip-chip packaging substrate and the IC chip for the primer to flow when filling the primer, which not only reduces the process time of the primer, but also reduces the risk of primer voids.

Description of drawings

Figure 1 is a top view, taking a traditional flip-chip package substrate as an example to illustrate how the design of its external contacts limits the density of its circuit traces;

2 to 4 are a series of cross-sectional views for illustrating a high-density circuit board with no pad design as a flip-chip package substrate and a manufacturing method thereof according to the first embodiment of the present invention;

5 to 6 are a series of cross-sectional views for comparing a high-density circuit board designed without pads as a flip-chip packaging substrate according to the first embodiment of the present invention with a conventional flip-chip packaging substrate;

7 to 10 are a series of cross-sectional views for illustrating a high-density circuit board designed as a flip-chip package substrate and a manufacturing method thereof according to a second embodiment of the present invention;

FIGS. 11-13 are a series of cross-sectional views for comparing a high-density circuit board with no pad design as a flip-chip packaging substrate according to the second embodiment of the present invention and a conventional flip-chip packaging substrate shown in FIG. 5 .

Detailed ways

In order to make the above and other purposes, features and advantages of the present invention more clearly and accurately expressed, the preferred embodiments are specially cited, and in conjunction with the accompanying drawings, the detailed description is as follows:

Taking the flip-chip packaging substrate as an example, two examples and two application comparison examples are proposed below to illustrate the characteristics of the present invention and the advantages of its application in the industry. It does not mean that the application of the present invention is limited to the flip-chip packaging substrate. , such as a general BGA packaging substrate, or a circuit board used to connect semiconductor chip packages, light-emitting elements, connectors, passive components, another circuit board, or other components, can be designed and manufactured using the creative ideas of the present invention Produce small area, low thickness, high line density circuit boards.

first implementation side

Please refer to FIGS. 2-4 , which are a series of cross-sectional views for illustrating a high-density circuit board with no pad design as a flip-chip package substrate and a manufacturing method thereof according to the first embodiment of the present invention. The present invention can increase the circuit density of the high-density circuit board through the design without pads, and form conductive bumps on the external contacts to replace the function of pads in the prior art to connect a lead or bump external components of the block, including the following steps:

step one:

Referring to FIG. 2 , an external circuit 210 is formed on the circuit board substrate 250 . The external circuit 210 has a plurality of wires (trace lines) 214, and the external contact 212 is usually located at one end of the wires 214 to form an electrical connection with an external component, and is suitable for the flip-chip package substrate 200 according to the first embodiment of the present invention. External components can be an IC chip, a circuit board, or passive components, etc., and in the first embodiment of the present invention, the external contact 212 forms an electrical connection with an IC chip 10 in the first application comparative example described later. Sexual connection (please refer to FIG. 6); and the external contact 212 of the present invention is characterized in that its width is not greater than the line width of the wire 214, therefore, the minimum distance between the wires 214 in the external circuit 210 can be reduced to about 60 μm.

The material of the external circuit 210 is usually copper, and its formation method can be: a surface of the circuit board substrate 250 is bonded to a copper foil (not shown in the drawing), and then the above-mentioned copper foil is etched to form the desired external The circuit 210; or apply an appropriate mask layer (not shown in the figure) on a surface of the circuit board substrate 250, and then form copper atoms on the circuit board by physical vapor deposition methods such as sputtering (sputtering) The substrate 250 is used to form the external circuit 210; and then the above-mentioned mask layer is removed.

Step two:

Please refer to FIG. 3 , the solder resist 220 is completely covered with the circuit board substrate 250 and the external circuit 210 by screen printing or spin coating; 220 is partially hardened; and then by exposure and development, a solder mask opening 222 is formed on the solder mask layer 220 to expose the external contacts 212, and then a baking step is performed to completely harden the solder mask layer 220.

The function of the solder resist layer 220 is to protect the wire 214 from being polluted by solder during the subsequent process and bridged with other adjacent wires 214 to cause a short circuit, and also to protect the wire 214 from water during storage or use of the flip-chip package substrate 200. Electromigration occurs due to air intrusion, and bridges with other adjacent wires 214 to form a short circuit.

The diameter of the solder mask opening 222 is generally not smaller than the width of the external contact 212 , but is 1.2 to 2 times larger than the width of the external contact 212 , preferably to fully expose the external contact 212 .

Step three:

Please refer to FIG. 4, in response to the above-mentioned external contact 212 without pad design, the flip-chip package substrate 200 is immersed in an electroless plating solution (not shown in the figure) containing the composition of the conductive bump 230 to be plated by electroless plating. In the figure), the conductive bump 230 is formed on the external contact 212 to replace the function of the solder pad in the prior art.

The height of the conductive bump 230 is not higher than the solder resist layer 220 so as to be conveniently combined with the IC chip formed with the flip-chip bump in the subsequent packaging process. The material of the conductive bump 230 can be: copper, nickel plated with gold, tin-lead alloy, or lead-free tin-based alloy.

In addition, if the flip-chip packaging substrate 200 is a laminated circuit board with more than two layers of circuits, the circuit board base material 250 is a laminated circuit substrate with a dielectric layer on the surface. Before forming the external circuit 210 in step 1, it must be A plurality of via holes (not shown in the drawing) are formed on the above-mentioned dielectric layer, and a metal layer preferably made of copper is formed on the above-mentioned via holes by physical vapor deposition such as sputtering After the external circuit 210 is formed, the other end of the wire 214 can form a circuit connection with the laminated circuit in the circuit board substrate 250 . The aforementioned content is a known technology and is not related to the features of the present invention, so it is only briefly described after the steps of the first embodiment of the present invention.

If the flip-chip packaging substrate 200 is a circuit board with a layer of wiring, the circuit board substrate 250 is a dielectric layer, and the other end of the wire 214 is usually another form of external contact (not shown in the figure). , usually connected to external components different from the external contact 212, and after the above step three is completed, it also includes forming a plurality of openings on the other surface of the circuit board substrate 250 to expose the above-mentioned external components different from the external contact 212. Another form of external contact. The aforementioned content is a known technology and is not related to the features of the present invention, so it is only briefly described after the steps of the first embodiment of the present invention.

First application comparison example:

Please refer to FIGS. 5-6. The flip-chip packaging substrate 300 of FIG. 5 and the flip-chip packaging substrate 200 of FIG. The chip package substrate 300 is a circuit board with pad design as shown in FIG. .

Comparing the flip-chip packaging substrate 300 with the flip-chip packaging substrate 200: the flip-chip packaging substrate 200 has external contacts 212 designed without pads, and two wires 214 can be allowed to pass between the external contacts 212 in FIG. 6 ; while the flip-chip packaging substrate 300 There is a welding pad 312 with a diameter greater than the line width of the corresponding wire 314. In FIG. 5, the welding pad 312 has the same pitch as the external contact 212 in FIG. It can have fewer circuit layers or surface area due to the larger circuit density, which is beneficial to the reduction of the volume of the final finished product, which is the purpose of the present invention "without increasing the number of circuit layers or surface area of the circuit board." , In the circuit of the same layer, accommodate more lines, so as to reduce the thickness, surface area and manufacturing cost of the above-mentioned high-density circuit board, and can help reduce the size of the final product.

In addition, after the flip-chip packaging substrate 300 in FIG. 5 is combined with the IC chip 10, due to the design of the larger pad 312, the height of the flip-chip bump 12 will decrease and the width will increase after the combination, which increases the adjacent overlay. There is a risk of a short circuit due to bridging of the crystal bumps 12 . Not only in the application of flip-chip packaging substrates, but also in other fields, such as circuit boards used to connect semiconductor chip packages, light-emitting components, connectors, passive components, another circuit board, or other components. After the above-mentioned external components to be connected, the same problem as above-mentioned increases the risk of a short circuit caused by bridging adjacent flip-chip bumps 12 . Especially in the application of the flip-chip packaging substrate, in the subsequent packaging process, an underfill process must be performed between the flip-chip packaging substrate 300 and the IC chip 10; and the height of the above-mentioned flip-chip bump 12 The reduction and the increase of the width mean that the reduction of the flow space of the primer in the process of the primer filling will prolong the process time of the primer and increase the risk of voids in the primer.

However, in FIG. 6 , the high-density circuit board designed without pads as the flip-chip package substrate 200 according to the first embodiment of the present invention has external contacts 212 designed without pads and bumps 230 that replace pads. After the IC chips 10 are bonded, the height and width of the flip-chip bumps 12 are almost unaffected, which reduces the risk of short-circuiting of adjacent flip-chip bumps 12 due to bridging. Not only in the application of flip-chip packaging substrates, but also in other fields, such as circuit boards used to connect semiconductor chip packages, light-emitting components, connectors, passive components, another circuit board, or other components. The above-mentioned external components to be connected also reduce the same problem as above-mentioned risk of short-circuit due to bridging of adjacent flip-chip bumps 12 . Especially in the application of the flip-chip packaging substrate, because the height and width of the flip-chip bump 12 are hardly affected, there can be enough space between the flip-chip packaging substrate 200 and the IC chip 10 when filling the primer. The flow of the primer can not only reduce the process time of the primer, but also reduce the risk of voids in the primer. The above is that the high-density circuit board with no solder pad design of the present invention "under the situation of not increasing the number of circuit layers or the surface area of the circuit board, in the circuit of the same layer, accommodate more lines, so as to reduce the above-mentioned high density. The thickness, surface area and manufacturing cost of the circuit board can help reduce the size of the final product, and provide additional advantages for the industry.

second embodiment

Please refer to FIGS. 7-10 , which are a series of cross-sectional views for illustrating a high-density circuit board with no pad design as a flip-chip package substrate and a manufacturing method thereof according to a second embodiment of the present invention. The present invention can increase the circuit density of the high-density circuit board by the design of no welding pad, and form the conductive bump on the external contact to replace the function of the welding pad in the prior art, so as to connect a non-pin or bump external components.

In terms of the manufacturing method of the flip-chip package substrate 400 of the second embodiment of the present invention, the first and second steps are the same as those of the first embodiment above, so they will not be described here. Please refer to the above-mentioned first embodiment of the present invention Step 1 and Step 2 and description of Figure 2-3.

Step three:

Referring to FIGS. 7-9 , in response to the above-mentioned external contact 412 without pad design, conductive bumps 430 are formed on the external contact 412 by electroplating to replace the function of the solder pad in the prior art. Above-mentioned electroplating method still comprises following substep:

1. With reference to FIG. 7, a conductive metal layer 440 is formed to cover the solder mask 420, the solder mask opening 422 and the external contact 412; the metal layer 440 can be formed by physical vapor deposition such as sputtering .

2. Please refer to FIG. 8, after forming a resist layer 460 and covering the metal layer 440; patterning the resist layer 460 to form a resist layer opening 462 to expose the solder resist layer opening 422 and the external contact 412 The metal layer 440 of the flip-chip package substrate 400 is then placed in an electroplating solution (not shown in the figure), and the metal layer 440 is energized to plate the conductive bump 430 on the external contact 412 . as well as

3. Referring to FIG. 9 , remove the resist layer 460 and the metal layer 440 covering the solder resist layer 420 .

The height of the conductive bump 430 is higher than that of the solder resist layer 420, and the height of the conductive bump 430 is preferably 20 μm to 60 μm higher than the thickness of the solder resist layer 420, so as to facilitate the integration with flip-chip bump-free packaging in the subsequent packaging process. IC chip bonding. The material of the conductive bump 430 can be: copper, gold, tin-lead alloy, or lead-free tin-based alloy.

Please refer to FIG. 10 , if the material of the conductive bump 430 is copper or gold, in order to facilitate the reflow (reflow) process after connecting with the IC chip without the flip-chip bump, hot-dip plating, spraying, electroplating, etc. can be used. A metal layer 432 is formed on the surface of the conductive bump 430 . The metal layer 432 can be made of tin-lead alloy or lead-free tin-based alloy. In addition, the above-mentioned hot-dip plating method is to immerse the conductive bump 430 in a molten soup of tin-lead alloy or lead-free tin-based alloy to form a metal layer 432 on the surface of the conductive bump 430; The metal layer 432 is formed by spraying a tin-lead alloy or a lead-free tin-based alloy solution on the surface of the conductive bump 430 ; and the electroplating method can be incorporated into the above sub-step 2. and implemented together.

However, if the material of the conductive bump 430 is only copper or gold, the flip-chip package substrate 400 can be connected to the aforementioned IC chip without the flip-chip bump without reflow soldering through a conductive adhesive process. This part will be described in the second application comparative example described later.

In addition, the flip-chip package substrate 400 can also be a laminated circuit board with more than two layers of circuits or a circuit board with one layer of circuits, as described after step 3 of the above-mentioned first embodiment, here also omitted.

The second application comparison example:

Please refer to FIG. 5 and FIGS. 11-13. The flip-chip packaging substrate 300 in FIG. The packaging substrate 400 is a flip-chip packaging substrate designed to be combined with the IC chip 20 without flip-chip bumps; wherein the IC chip 10 and the IC chip 20 are only different in whether there are flip-chip bumps 12, and both have IC chips of the same design and function. The flip-chip packaging substrate 300 is a circuit board with a pad design as shown in FIG. 1; and the flip-chip packaging substrate 400 is a high-density circuit with no pad design as a flip-chip packaging substrate according to the second embodiment of the present invention. plate.

Comparing the flip-chip package substrate 300 with the flip-chip package substrate 400: the flip-chip package substrate 400 has an external contact 412 designed without pads, and two wires 414 can pass between the external contacts 412 in FIGS. 11-13 ; while the flip-chip package The substrate 300 has a welding pad 312 whose diameter is larger than the wire width of the associated wire 314. In FIG. 5, the welding pad 312 has the same spacing as the external contact 412 in FIGS. The crystal packaging substrate 400 can have fewer circuit layers or surface area due to its higher circuit density, which is beneficial to the reduction of the volume of the final product after the post-production. In the case of surface area, more circuits can be accommodated in the same layer of circuits, so as to reduce the thickness, surface area and manufacturing cost of the above-mentioned high-density circuit board, and can help reduce the size of the final product.

Please refer to FIGS. 11-13 , the high-density circuit board designed as a flip-chip packaging substrate without pads according to the second embodiment of the present invention has a conductive bump 430 higher than the solder resist layer 420, and the external component IC connected to it The chip 20 may be directly electrically connected to the flip-chip packaging substrate 400 without performing a process of forming bumps. However, not only in the application of flip-chip packaging substrates, but also in other fields, such as the application of circuit boards used to connect semiconductor chip packages, light-emitting components, connectors, passive components, another circuit board, or other external components In general, the above-mentioned external components can skip the process of forming pins such as ball planting, and directly form an electrical connection with the high-density circuit board, which can reduce the process steps of semiconductor packaging or electronic product assembly, not only shorten the process time and Increase output, and in the case of reducing the risk of a yield drop by reducing a process step, it can improve the process yield and reduce production costs; and then provide the above additional advantages for the industry.

In addition, after the flip-chip packaging substrate 300 in FIG. 5 is combined with the IC chip 10, due to the design of the larger pad 312, the height of the flip-chip bump 12 will decrease and the width will increase after the combination, which increases the adjacent overlay. There is a risk of a short circuit due to bridging of the crystal bumps 12 . Not only in the application of flip-chip packaging substrates, but also in other fields, such as circuit boards used to connect semiconductor chip packages, light-emitting components, connectors, passive components, another circuit board, or other components. After the above-mentioned external components to be connected, the same problem as above-mentioned increases the risk of a short circuit caused by bridging adjacent flip-chip bumps 12 . Especially in the application of the flip-chip packaging substrate, in the subsequent packaging process, an underfill process must be performed between the flip-chip packaging substrate 300 and the IC chip 10; and the reduction of the height of the above-mentioned flip-chip bump 12 The increase of the width means that the flow space of the primer is reduced during the primer filling process, which results in the prolongation of the primer process time and the increased risk of primer voids.

However, in FIGS. 11 to 13 , the high-density circuit board designed without pads as the flip-chip packaging substrate 400 according to the second embodiment of the present invention has external contacts 412 designed without pads and bumps 430 that replace pads. After being bonded to the IC chip 20 , the height and width of the conductive bump 430 are almost unaffected, which reduces the risk of shorting the adjacent conductive bump 430 due to bridging. Not only in the application of flip-chip packaging substrates, but also in other fields, such as circuit boards used to connect semiconductor chip packages, light-emitting components, connectors, passive components, another circuit board, or other components. The above-mentioned external components to be connected also reduce the same problem as above-mentioned risk of short-circuit due to bridging of adjacent conductive bumps 430 . Especially in the application of the flip-chip packaging substrate, the height and width of the conductive bump 430 can be adjusted during the manufacturing process of the flip-chip packaging substrate 400, so that during the process of filling the primer, the flip-chip packaging substrate 400 and the IC chip There is enough space between 20 for the primer to flow when filling the primer, which not only reduces the process time of the primer, but also reduces the risk of primer voids. The above is the high-density circuit board with no pad design of the present invention "under the situation of not increasing the number of circuit layers or surface area of the circuit board, in the circuit of the same layer, more lines are accommodated to reduce the above-mentioned high-density circuit. In addition to the thickness, surface area and manufacturing cost of the board, and can help reduce the size of the final product, it provides additional advantages for the industry.

Incidentally, in FIG. 11 , in the case where the conductive bump 430 is made of copper or gold, when the flip-chip package substrate 400 is bonded to the IC chip 20, screen printing or dipping can be used. After a conductive glue 30 is formed on the conductive bump 430 in a manner, the flip-chip package substrate 400 can directly form an electrical connection with the IC chip 20 without the traditional reflow process; in addition, in FIG. 12 , the conductive bump 430 In the case where the material is copper or gold, if the flip-chip packaging substrate 400 is to be bonded to the IC chip 20 by a conventional reflow process, a tin-lead alloy or lead-free material can be formed on the conductive bump 430 first. The metal layer 432 of the tin-based alloy, and the flip-chip package substrate 400 is electrically connected to the IC chip 20 through a reflow process; and in FIG. 13 , the material of the conductive bump 430 is tin-lead alloy or lead-free In the case of a tin-based alloy, the flip-chip package substrate 400 can be electrically connected to the IC chip 20 directly through a reflow process. Although the above is only applied to the high-density circuit board without pad design of the present invention in the application of the flip-chip package substrate, the same concept can also be applied in other fields, such as for connecting semiconductor chip packages, light-emitting elements, connectors , passive components, another circuit board, or the circuit board of other components.

Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Anyone skilled in this art can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, this The scope of protection of the invention shall be defined by the scope of the patent application of the present invention.

Claims (2)

1. A method for manufacturing a high-density circuit board without pad design, at least comprising the following steps: a. Provide a circuit board base material, a surface of the circuit board base material is a dielectric layer; b. forming an external circuit on the dielectric layer, the external circuit includes a plurality of external contacts, and the width of the external contacts is not greater than the line width of the external circuit; c. Form a solder resist layer to cover the dielectric layer and the external circuit. The solder resist layer has a plurality of solder resist layer openings to expose the external contacts. The diameters of the solder resist layer openings are not smaller than the exposed The width of each of the external contacts of ; and d. A plurality of conductive bumps are respectively formed on the external contacts within the opening range of the solder resist layer. The conductive bumps are formed by electroless plating, and the height of the conductive bumps is not higher than The thickness of the solder mask. 2. A high-density circuit board with no solder pad design, suitable for forming an electrical connection with an external component that has formed a pin or a bump, characterized in that it at least includes: A circuit board substrate, one surface of the circuit board substrate is a dielectric layer; An external circuit formed on the dielectric layer, the external circuit includes a plurality of external contacts, and the width of the external contacts is not greater than the line width of the external circuit; A solder resist layer covering the dielectric layer and the external circuit, the solder resist layer has a plurality of solder resist layer openings exposing the external contacts, the diameters of the solder resist layer openings are not smaller than the exposed respective the width of the external joint; and A plurality of metal bumps are respectively formed on the external contacts within the opening range of the solder resist layer by electroless plating, and the height of the metal bumps is not higher than the thickness of the solder resist layer.

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