CN102083269A - Ceramic circuit substrate and manufacturing method thereof - Google Patents
Ceramic circuit substrate and manufacturing method thereof Download PDFInfo
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- CN102083269A CN102083269A CN2011100336076A CN201110033607A CN102083269A CN 102083269 A CN102083269 A CN 102083269A CN 2011100336076 A CN2011100336076 A CN 2011100336076A CN 201110033607 A CN201110033607 A CN 201110033607A CN 102083269 A CN102083269 A CN 102083269A
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Abstract
Description
技术领域technical field
本发明关于一种陶瓷电路基板及其制造方法,尤其是有关于一种具有防焊功能的陶瓷电路基板与该陶瓷电路基板的制造方法。The present invention relates to a ceramic circuit substrate and a manufacturing method thereof, in particular to a ceramic circuit substrate with a solder-proof function and a manufacturing method of the ceramic circuit substrate.
背景技术Background technique
随着电子技术的日新月异,电子产品也朝向轻、薄、短、小的趋势设计。针对此种电子产品的电路布线设计,线路板(wired board)是经常使用的构装元件,例如是印刷电路板(printing circuit board)、晶片载板(chip carrier)或是低温共烧陶瓷基板(LTCC)等线路板。With the rapid development of electronic technology, electronic products are also designed towards the trend of light, thin, short and small. For the circuit wiring design of such electronic products, the circuit board (wired board) is a frequently used structural component, such as a printed circuit board (printing circuit board), a chip carrier (chip carrier) or a low-temperature co-fired ceramic substrate ( LTCC) and other circuit boards.
传统上,受限于印刷开孔仅在200微米(um)以下,且具有解析度不佳与印刷尺寸偏差等问题,仅能作局部防焊并无法在接合垫(pad)周围印防焊层(solder mask),进而造成锡球与锡球间会互相接触而形成锡桥,并产生短路现象。此外,由于印刷线径较大,在使用陶瓷石膏印刷时,因为印刷面积较大,使得陶瓷膏收缩率和基板材料不同,造成共烧过程中,产品产生翘曲的现象。Traditionally, due to the limitation that the printing opening is only below 200 microns (um), and there are problems such as poor resolution and printing size deviation, it can only be used for partial solder mask and cannot print solder mask around the bonding pad (pad). (solder mask), and then cause the solder balls to contact each other to form a solder bridge, and produce a short circuit. In addition, due to the large diameter of the printing line, when using ceramic plaster printing, the shrinkage rate of the ceramic paste is different from that of the substrate material due to the large printing area, resulting in warping of the product during the co-firing process.
鉴于传统的方法并无有效解决锡桥与基板翘曲的问题,因此亟需提出一种新颖的陶瓷电路基板,可用于防止锡桥与基板翘曲。In view of the fact that traditional methods cannot effectively solve the problems of solder bridges and substrate warpage, it is urgent to propose a novel ceramic circuit substrate that can be used to prevent solder bridges and substrate warpage.
发明内容Contents of the invention
本发明目的之一在于提供陶瓷电路基板,此陶瓷电路基板具有防焊层,用以防止在焊接的过程中,锡球与锡球相互接触而形成锡桥,并产生短路现象。One of the objectives of the present invention is to provide a ceramic circuit substrate with a solder resist layer to prevent solder balls from contacting each other during soldering to form solder bridges and short circuits.
本发明的另一目的在于提供陶瓷电路基板,用于防止在共烧的过程中,产生基板翘曲的问题。Another object of the present invention is to provide a ceramic circuit substrate for preventing the substrate from warping during the co-firing process.
本发明关于一种陶瓷电路基板,包括基板以及生胚。基板表面具有复数个接合垫。生胚堆迭于该基板的表面上,该生胚具有复数个通孔,其中这些通孔的位置对应于这些接合垫,且这些通孔的直径大于这些接合垫的直径。The invention relates to a ceramic circuit substrate, including a substrate and a green body. There are a plurality of bonding pads on the surface of the substrate. The green body is stacked on the surface of the substrate. The green body has a plurality of through holes, wherein the positions of the through holes correspond to the bonding pads, and the diameter of the through holes is larger than that of the bonding pads.
根据本发明所述的陶瓷电路基板,基板与生胚的收缩率相同。或者生胚的材料与基板相同。According to the ceramic circuit substrate of the present invention, the shrinkage ratio of the substrate and the green body is the same. Or the material of the green body is the same as that of the substrate.
根据本发明所述的陶瓷电路基板,基板为低温共烧陶瓷基板。According to the ceramic circuit substrate of the present invention, the substrate is a low temperature co-fired ceramic substrate.
根据本发明所述的陶瓷电路基板,复数个通孔是通过激光或机械通孔装置形成的。According to the ceramic circuit substrate of the present invention, the plurality of through holes are formed by laser or mechanical through hole means.
根据本发明所述的陶瓷电路基板,生胚的厚度介于10至50微米之间。According to the ceramic circuit substrate of the present invention, the thickness of the green body is between 10 and 50 microns.
本发明关于一种陶瓷电路基板的制造方法,包括以下步骤。提供表面具有复数个接合垫的基板。提供堆迭于该基板表面上的生胚,该生胚具有复数个通孔,其中这些通孔的位置对应于这些接合垫,且这些通孔的直径大于这些接合垫的直径。The present invention relates to a manufacturing method of a ceramic circuit substrate, comprising the following steps. A substrate having a plurality of bonding pads on its surface is provided. A green body stacked on the surface of the substrate is provided, the green body has a plurality of through holes, wherein the positions of the through holes correspond to the bonding pads, and the diameter of the through holes is larger than the diameter of the bonding pads.
根据本发明所述的陶瓷电路基板的制造方法,基板与生胚的收缩率相同。或者生胚的材料与基板相同。基板为低温共烧陶瓷基板。复数个通孔是通过激光或机械通孔装置形成的。生胚的厚度介于10至50微米之间。According to the manufacturing method of the ceramic circuit substrate of the present invention, the shrinkage ratio of the substrate and the green body is the same. Or the material of the green body is the same as that of the substrate. The substrate is a low temperature co-fired ceramic substrate. The plurality of vias are formed by laser or mechanical via means. The thickness of the green embryos is between 10 and 50 microns.
通过本发明,该陶瓷电路基板具有防焊层,可用于防止锡桥与基板翘曲。According to the present invention, the ceramic circuit substrate has a solder resist layer, which can be used to prevent tin bridges and substrate warping.
附图说明Description of drawings
图1是显示根据本发明一实施例的陶瓷电路基板的剖面图。FIG. 1 is a cross-sectional view showing a ceramic circuit substrate according to an embodiment of the present invention.
图2A至图2B是显示根据本发明一实施例的气密陶瓷层的制造方法示意图。2A to 2B are schematic diagrams showing a manufacturing method of an airtight ceramic layer according to an embodiment of the present invention.
具体实施方式Detailed ways
为使对本发明的目的、构造、特征、及其功能有进一步的了解,兹配合实施例详细说明如下。In order to have a further understanding of the purpose, structure, features, and functions of the present invention, the following detailed descriptions are provided in conjunction with the embodiments.
图1的剖面图是显示根据本发明一实施例的陶瓷电路基板1,其包括:基板11,其表面具有复数个接合垫12,且基板11可为低温共烧陶瓷基板,其中上述的低温共烧陶瓷基板可由复数个陶瓷层15所构成;以及生胚13,堆迭于基板11的表面上,生胚13具有复数个通孔14,其中该复数个通孔14的位置对应于该复数个接合垫12,且该通孔14的直径大于该接合垫12的直径。此外,生胚13的厚度介于10~50微米之间,且可透过透过激光或机械通孔装置(未图示)形成这些通孔14。需特别说明的是基板11与生胚13的收缩率相同,且构成两者的材料也相同。如图1所示,当将IC晶片16的锡球17焊接至基板11的接合垫12时,生胚13将可作为防焊层,以避免锡球间产生锡桥,进而产生短路现象。另外,生胚13的厚度可根据实际情况,设计成与基板11的厚度相同。The sectional view of Fig. 1 shows a
图2A至图2B为显示根据本发明一实施例的气密陶瓷层1的制造方法示意图。如图2A所示,本发明提供表面具有复数个接合垫的基板11,且基板11可为低温共烧陶瓷基板,其中上述低温共烧陶瓷基板可由复数个陶瓷层所构成。此外,基板11的中央设有电子线路18。如图2B所示,本发明提供堆迭于该基板表面上的生胚13,生胚13具有复数个通孔14,其中该复数个通孔14的位置对应于该复数个接合垫12,且该通孔14的直径大于该接合垫的直径12。此外,生胚13的厚度介于10~50微米之间,且可透过透过激光或机械通孔装置(未图示)形成这些通孔14。需特别说明的是基板11与生胚13的收缩率相同,且构成两者之材料也相同。接着,以烧结的方式将生胚13与基板11堆迭起来,并仅露出所需要的接合垫12(如图1所示)。2A to 2B are schematic diagrams showing a manufacturing method of the airtight
本发明已由上述相关实施例加以描述,然而上述实施例仅为实施本发明的范例。必需指出的是,已揭露的实施例并未限制本发明的范围。The present invention has been described by the above-mentioned related embodiments, however, the above-mentioned embodiments are only examples for implementing the present invention. It must be pointed out that the disclosed embodiments do not limit the scope of the present invention.
Claims (10)
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9607862B2 (en) | 2012-09-11 | 2017-03-28 | Globalfoundries Inc. | Extrusion-resistant solder interconnect structures and methods of forming |
CN108807428A (en) * | 2018-04-26 | 2018-11-13 | 武汉高芯科技有限公司 | Focal plane arrays (FPA) and preparation method thereof with isolated column |
CN109524310A (en) * | 2018-10-11 | 2019-03-26 | 中国电子科技集团公司第四十三研究所 | A kind of ltcc substrate cofiring welding resistance layer manufacturing method thereof |
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JPH11112149A (en) * | 1997-09-30 | 1999-04-23 | Elna Co Ltd | Multilayered printed wiring board |
CN1510979A (en) * | 2002-12-23 | 2004-07-07 | 矽统科技股份有限公司 | High-density circuit board without welding pad design and manufacturing method thereof |
JP2007053206A (en) * | 2005-08-17 | 2007-03-01 | Tdk Corp | Electronic component and manufacturing method thereof |
JP4284782B2 (en) * | 1999-10-08 | 2009-06-24 | 株式会社村田製作所 | Multilayer ceramic substrate and manufacturing method thereof |
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2011
- 2011-01-22 CN CN2011100336076A patent/CN102083269A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH11112149A (en) * | 1997-09-30 | 1999-04-23 | Elna Co Ltd | Multilayered printed wiring board |
JP4284782B2 (en) * | 1999-10-08 | 2009-06-24 | 株式会社村田製作所 | Multilayer ceramic substrate and manufacturing method thereof |
CN1510979A (en) * | 2002-12-23 | 2004-07-07 | 矽统科技股份有限公司 | High-density circuit board without welding pad design and manufacturing method thereof |
JP2007053206A (en) * | 2005-08-17 | 2007-03-01 | Tdk Corp | Electronic component and manufacturing method thereof |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9607862B2 (en) | 2012-09-11 | 2017-03-28 | Globalfoundries Inc. | Extrusion-resistant solder interconnect structures and methods of forming |
US10049897B2 (en) | 2012-09-11 | 2018-08-14 | Globalfoundries Inc. | Extrusion-resistant solder interconnect structures and methods of forming |
CN108807428A (en) * | 2018-04-26 | 2018-11-13 | 武汉高芯科技有限公司 | Focal plane arrays (FPA) and preparation method thereof with isolated column |
CN109524310A (en) * | 2018-10-11 | 2019-03-26 | 中国电子科技集团公司第四十三研究所 | A kind of ltcc substrate cofiring welding resistance layer manufacturing method thereof |
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Application publication date: 20110601 |