CN114864404A - A fabrication process of charge-coupled SBR device realized by three-time mask - Google Patents
A fabrication process of charge-coupled SBR device realized by three-time mask Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 23
- 238000000034 method Methods 0.000 title claims description 14
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 56
- 229920005591 polysilicon Polymers 0.000 claims abstract description 56
- 239000002184 metal Substances 0.000 claims abstract description 21
- 150000002500 ions Chemical class 0.000 claims abstract description 10
- 238000005530 etching Methods 0.000 claims abstract description 9
- 238000000206 photolithography Methods 0.000 claims abstract description 6
- 210000000746 body region Anatomy 0.000 claims abstract description 5
- 239000007943 implant Substances 0.000 claims description 8
- 239000000758 substrate Substances 0.000 claims description 8
- 230000004888 barrier function Effects 0.000 claims description 4
- 239000011800 void material Substances 0.000 claims description 4
- 230000008878 coupling Effects 0.000 claims description 2
- 238000010168 coupling process Methods 0.000 claims description 2
- 238000005859 coupling reaction Methods 0.000 claims description 2
- 238000000151 deposition Methods 0.000 claims description 2
- 238000005516 engineering process Methods 0.000 claims 1
- 230000015572 biosynthetic process Effects 0.000 abstract description 4
- 238000000137 annealing Methods 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
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- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
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- H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
- H10D64/311—Gate electrodes for field-effect devices
- H10D64/411—Gate electrodes for field-effect devices for FETs
- H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
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Abstract
本发明公开了一种3次掩膜实现电荷耦合的SBR器件的制作工艺,包括:形成薄氧化层;形成体区;形成厚氧化层作为第一掩膜;光刻形成沟槽;形成场氧化层;形成第一多晶硅;设置第二掩膜,刻蚀第一多晶硅,使其顶部低于外延层表面;以位于有源区沟槽之间的厚氧化层作为掩膜,注入源区离子;淀积形成第一氧化层;各向同性的向下刻蚀第一氧化层,使有源区表面的外延层外露,且在有源区沟槽内形成了有源区接触孔,有源区接触孔延伸至第二多晶硅内。本发明的制作过程只需要3次掩膜即可完成整个制作工艺,分别在形成沟槽、形成第一多晶硅和形成金属电极时才需要设置掩膜,节省了形成源区和形成体接触区时的掩膜,节省了成本。
The invention discloses a manufacturing process of a charge-coupled SBR device realized by three masks, comprising: forming a thin oxide layer; forming a body region; forming a thick oxide layer as a first mask; forming a trench by photolithography; layer; forming a first polysilicon; setting a second mask, etching the first polysilicon so that its top is lower than the surface of the epitaxial layer; using the thick oxide layer between the trenches in the active region as a mask, implanting source area ions; deposit to form a first oxide layer; isotropically etch the first oxide layer downward to expose the epitaxial layer on the surface of the active area, and form an active area contact hole in the active area trench , the contact hole of the active area extends into the second polysilicon. The manufacturing process of the present invention only needs three masks to complete the entire manufacturing process, and only when the trench is formed, the first polysilicon is formed, and the metal electrode is formed, the mask needs to be set, which saves the formation of the source region and the formation of the body contact. Zone time masks, saving costs.
Description
技术领域technical field
本发明涉及半导体技术领域,具体为一种3次掩膜实现电荷耦合的SBR器件的制作工艺。The invention relates to the technical field of semiconductors, in particular to a manufacturing process of an SBR device in which charge coupling is realized by three masks.
背景技术Background technique
传统的电荷耦合的SBR器件的制作工艺如图1A至图1I所示,包括如下步骤:The fabrication process of a conventional charge-coupled SBR device is shown in FIG. 1A to FIG. 1I , including the following steps:
提供一衬底1,在衬底1上形成外延层2,在外延层2表面形成薄氧化层3,如图1A所示;A substrate 1 is provided, an
设置第一掩膜,光刻形成沟槽,并去除第一掩膜,沟槽包括有源区沟槽4-1和终端区沟槽4-2,如图1B所示;A first mask is set, a trench is formed by photolithography, and the first mask is removed, and the trench includes an active region trench 4-1 and a terminal region trench 4-2, as shown in FIG. 1B ;
在沟槽内形成场氧化层5,如图1C所示;A
填充多晶硅并回刻,在沟槽内形成第一多晶硅6,如图1D所示;Fill polysilicon and etch back to form a first polysilicon 6 in the trench, as shown in FIG. 1D ;
设置第二掩膜7,第二掩膜7覆盖终端区,刻蚀有源区的第一多晶硅6,如图1E所示;A
去除第二掩膜7,去除第一多晶硅6上方的氧化层,如图1F所示;The
在有源区的沟槽内形成栅氧化层9,填充第二多晶硅10并回刻,并且注入形成体区11,如图1G所示;A
设置第三掩膜12,第三掩膜12覆盖终端区,在有源区注入并形成源区13,如图1H所示;A
去除第三掩膜12,在器件表面形成阻挡层14,设置第四掩膜并光刻形成体接触区接触孔15及金属接触孔17,向下注入形成体接触区16,如图1I所示;The
去除第四掩膜,通过第五掩膜在金属接触孔17内填充并形成金属电极。上述的形成体接触区接触孔15、金属接触孔17、体接触区16和金属电极的方法为本领域技术人员的常用技术手段,在此不再详述。The fourth mask is removed, and metal electrodes are filled and formed in the
通过上述步骤可知,在传统的电荷耦合的SBR器件的制作工艺中,至少要设置5次掩膜才能实现器件功能。It can be known from the above steps that in the traditional manufacturing process of the charge-coupled SBR device, at least five masks are required to realize the device function.
众所周知,设置一次掩膜的成本极高,每多设置一次掩膜,整个器件的制作成本将大大上升。因此,在不影响器件性能的前提下,如果能够降低掩膜的设置次数,将大大降低制作成本。As is known to all, the cost of setting a mask once is extremely high, and the manufacturing cost of the entire device will greatly increase each time a mask is set. Therefore, under the premise of not affecting the performance of the device, if the number of mask settings can be reduced, the fabrication cost will be greatly reduced.
发明内容SUMMARY OF THE INVENTION
本发明的目的在于提供一种3次掩膜实现电荷耦合的SBR器件的制作工艺,以解决上述技术问题。The purpose of the present invention is to provide a manufacturing process of a charge-coupled SBR device with three masks, so as to solve the above-mentioned technical problems.
为实现上述目的,本发明提供了一种3次掩膜实现电荷耦合的SBR器件的制作工艺,包括如下步骤:In order to achieve the above object, the present invention provides a manufacturing process of a 3-time mask to realize the charge-coupled SBR device, comprising the following steps:
提供一衬底,在所述衬底上形成外延层,在所述外延层表面形成薄氧化层;A substrate is provided, an epitaxial layer is formed on the substrate, and a thin oxide layer is formed on the surface of the epitaxial layer;
在器件表面向下注入并在外延层表面形成体区;Implant down on the surface of the device and form a body region on the surface of the epitaxial layer;
在器件表面形成厚氧化层,作为第一掩膜;A thick oxide layer is formed on the surface of the device as a first mask;
光刻形成沟槽,所述沟槽包括有源区沟槽和终端区沟槽;forming trenches by photolithography, the trenches include active region trenches and terminal region trenches;
在所述有源区沟槽和终端区沟槽内形成场氧化层;forming a field oxide layer in the active region trenches and the termination region trenches;
填充并刻蚀多晶硅,在所述有源区沟槽和终端区沟槽内分别形成第一多晶硅;Filling and etching polysilicon, respectively forming a first polysilicon in the active region trench and the terminal region trench;
设置第二掩膜,所述第二掩膜覆盖终端区,之后刻蚀有源区沟槽内的第一多晶硅,使其顶部低于外延层表面;setting a second mask, the second mask covering the terminal area, and then etching the first polysilicon in the active area trench so that the top is lower than the surface of the epitaxial layer;
减薄位于有源区沟槽内的第一多晶硅上方的场氧化层,以及减薄有源区的厚氧化层;thinning the field oxide layer above the first polysilicon in the active region trench, and thinning the thick oxide layer of the active region;
以位于有源区沟槽之间的厚氧化层作为掩膜,垂直向下的在有源区的外延层表面注入源区离子;Using the thick oxide layer between the trenches in the active region as a mask, implant source region ions vertically downward on the surface of the epitaxial layer in the active region;
去除有源区沟槽内的第一多晶硅上方的场氧化层,以及去除位于有源区沟槽之间的薄氧化层及厚氧化层;removing the field oxide layer above the first polysilicon in the active region trenches, and removing the thin oxide layer and the thick oxide layer between the active region trenches;
去除第二掩膜,在所述有源区沟槽内的第一多晶硅上方形成栅氧化层;removing the second mask to form a gate oxide layer over the first polysilicon in the active region trench;
填充并刻蚀多晶硅,在所述有源区沟槽内形成第二多晶硅,所述第二多晶硅的表面低于有源区沟槽的顶部,所述第二多晶硅的表面与有源区沟槽顶部之间形成凹陷区域;Filling and etching polysilicon to form a second polysilicon in the active region trench, the surface of the second polysilicon is lower than the top of the active region trench, the surface of the second polysilicon A recessed region is formed between the top of the trench in the active region;
在器件表面淀积形成第一氧化层,位于有源区沟槽上方的第一氧化层形成空隙区域;A first oxide layer is formed by depositing on the surface of the device, and the first oxide layer above the active region trench forms a void area;
采用接触孔自对准工艺,各向同性的向下刻蚀第一氧化层,使终端区沟槽内的第一多晶硅外露,且使有源区表面的外延层外露,在有源区沟槽内形成了有源区接触孔,所述有源区接触孔延伸至第二多晶硅内。Using the contact hole self-alignment process, the first oxide layer is etched down isotropically, so that the first polysilicon in the trench in the terminal region is exposed, and the epitaxial layer on the surface of the active region is exposed. An active area contact hole is formed in the trench, and the active area contact hole extends into the second polysilicon.
优选的,还包括:在有源区沟槽之间的外延层表面注入并形成体接触区。Preferably, the method further includes: implanting and forming a body contact region on the surface of the epitaxial layer between the trenches in the active region.
优选的,还包括:继续向下刻蚀,在有源区沟槽之间的外延层内形成体接触区接触孔,且所述有源区接触孔的深度变深,之后在所述体接触区接触孔内注入并形成体接触区。Preferably, the method further includes: continuing to etch down, forming a contact hole in the body contact region in the epitaxial layer between the active region trenches, and the depth of the contact hole in the active region becomes deeper, and then in the body contact region A body contact region is implanted into the region contact hole and forms a body contact region.
优选的,其特征在于,以有源区沟槽自对准刻蚀形成所述体接触区接触孔。Preferably, it is characterized in that the body contact region contact hole is formed by self-aligned etching of active region trenches.
优选的,还包括:在器件表面形成金属电极,所述金属电极通过有源区接触孔与第二多晶硅接触,所述金属电极覆盖有源区且与体接触区接触,所述金属电极覆盖终端区且与终端区内的第一多晶硅接触。Preferably, the method further includes: forming a metal electrode on the surface of the device, the metal electrode is in contact with the second polysilicon through the contact hole in the active region, the metal electrode covers the active region and is in contact with the body contact region, and the metal electrode is in contact with the body contact region. Overlying the termination area and in contact with the first polysilicon in the termination area.
优选的,形成所述第一氧化层后,所述凹陷区域未被填满。Preferably, after the first oxide layer is formed, the recessed region is not filled.
优选的,形成所述有源区接触孔时,所述有源区沟槽顶部的侧壁会留下由第一氧化层形成的阻挡层,用于保护沟道。Preferably, when the contact hole in the active region is formed, a barrier layer formed by the first oxide layer is left on the sidewall of the top of the trench in the active region to protect the channel.
优选的,在所述有源区沟槽内的第一多晶硅上方形成栅氧化层时,所述源区离子形成源区。Preferably, when a gate oxide layer is formed on the first polysilicon in the active region trench, the source region ions form the source region.
与现有技术相比,本发明具有如下有益效果:Compared with the prior art, the present invention has the following beneficial effects:
(1)与传统的制作工艺相比,本发明的制作过程只需要3次掩膜即可完成整个制作工艺,分别在形成沟槽、形成第一多晶硅和形成金属电极时才需要设置掩膜,节省了形成源区和形成体接触区时的掩膜,节省了成本。(1) Compared with the traditional manufacturing process, the manufacturing process of the present invention only needs 3 masks to complete the entire manufacturing process, and only when forming the trench, forming the first polysilicon and forming the metal electrode, the mask needs to be set. The film saves the mask when forming the source region and the body contact region, and saves the cost.
(2)本发明利用减薄的厚氧化层作为掩膜,在有源区的外延层表面注入源区离子,节省了注入源区离子时的掩膜。(2) The present invention uses the thinned thick oxide layer as a mask to implant source region ions on the surface of the epitaxial layer of the active region, thereby saving the mask when implanting source region ions.
(3)本发明利用第一氧化层和厚氧化层高度的配合,实现了体接触区的自对准刻蚀,省去了原本体接触区形成时候需要的掩膜。而由于体接触区采用无mask的自对准工艺,因此器件的cell pitch可以做的更小。(3) The present invention utilizes the combination of the height of the first oxide layer and the thick oxide layer to realize the self-aligned etching of the body contact region, thereby eliminating the need for a mask originally required for the formation of the body contact region. Since the body contact area adopts a self-aligned process without mask, the cell pitch of the device can be made smaller.
(4)本发明在形成体接触区待注入位置时,通过有源区的凹陷区域的设计,能够同时形成有源区接触孔,为后续形成金属电极时省去了另外形成金属接触孔的步骤。(4) In the present invention, when the body contact region to be implanted is formed, the active region contact hole can be formed at the same time through the design of the recessed region of the active region, which saves the step of forming a metal contact hole in the subsequent formation of the metal electrode. .
(5)本发明利用形成栅极氧化层时产生的高温,实现了源区离子的退火成型,省去了单独退火形成源区的步骤。(5) The present invention utilizes the high temperature generated when the gate oxide layer is formed to realize the annealing and shaping of the ions in the source region, and the step of forming the source region by separate annealing is omitted.
附图说明Description of drawings
图1A至图1I为现有技术中的电荷耦合的SBR器件的制作工艺的流程示意图;1A to FIG. 1I are schematic flowcharts of the manufacturing process of the charge-coupled SBR device in the prior art;
图2A至图2P为本发明实施例的3次掩膜实现电荷耦合的SBR器件的制作工艺的流程示意图。FIG. 2A to FIG. 2P are schematic flowcharts of a fabrication process of a charge-coupled SBR device with three masks according to an embodiment of the present invention.
具体实施方式Detailed ways
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.
图2A至图2P示出了本实施例的一种3次掩膜实现电荷耦合的SBR器件的制作工艺,包括如下步骤:FIG. 2A to FIG. 2P show a manufacturing process of a charge-coupled SBR device implemented by three masks in this embodiment, including the following steps:
步骤一:如图2A所示,提供一衬底1,在衬底1上形成外延层2,在外延层2表面形成薄氧化层3,在本实施例中薄氧化层3的厚度为500A。Step 1: As shown in FIG. 2A, a substrate 1 is provided, an
步骤二:如图2B所示,在器件表面向下注入并在外延层2表面形成体区11。Step 2: As shown in FIG. 2B , implant downward on the surface of the device and form a
步骤三:如图2C所示,在器件表面形成厚氧化层18,作为第一掩膜,在本实施例中厚氧化层18的厚度为7000A。Step 3: As shown in FIG. 2C , a
步骤四:如图2D所示,光刻形成沟槽,沟槽包括有源区沟槽4-1和终端区沟槽4-2,该步骤保留了厚氧化层18,减少了一次去除掩膜的步骤。Step 4: As shown in FIG. 2D, a trench is formed by photolithography. The trench includes an active region trench 4-1 and a terminal region trench 4-2. This step retains the
步骤五:如图2E所示,在有源区沟槽4-1和终端区沟槽4-2内形成场氧化层5,在本实施例中场氧化层5的厚度为3000A。Step 5: As shown in FIG. 2E, a
步骤六:如图2F所示,填充并刻蚀多晶硅,在有源区沟槽4-1和终端区沟槽4-2内分别形成第一多晶硅6,第一多晶硅6的表面与器件表面齐平。Step 6: As shown in FIG. 2F, polysilicon is filled and etched, and a first polysilicon 6 is formed in the active region trench 4-1 and the terminal region trench 4-2 respectively, and the surface of the first polysilicon 6 is formed. Flush with the device surface.
步骤七:如图2G所示,设置第二掩膜7,第二掩膜7覆盖终端区,之后刻蚀有源区沟槽4-1内的第一多晶硅6,使其顶部低于外延层2的表面。Step 7: As shown in FIG. 2G, a
步骤八:如图2H所示,以湿法腐蚀方式,减薄位于有源区沟槽4-1内的第一多晶硅6上方的场氧化层5,以及减薄有源区的厚氧化层,为垂直向下注入源区离子8预留位置;在本实施例中,场氧化层5从原来的3000A减薄至500A,有源区的厚氧化层从原来的7000A减薄至5000A。Step 8: As shown in FIG. 2H, by wet etching, the
步骤九:如图2I所示,以位于有源区沟槽4-1之间的厚氧化层18作为掩膜,垂直向下的在有源区的外延层2表面注入源区离子8。Step 9: As shown in FIG. 2I, using the
步骤十:如图2J所示,去除有源区沟槽4-1内的第一多晶硅6上方的场氧化层5,以及去除位于有源区沟槽4-1之间的薄氧化层3及厚氧化层18,使得有源区的外延层2外露,且位于第一多晶硅6上方的有源区沟槽4-1的侧壁外露。Step 10: As shown in FIG. 2J, remove the
步骤十一:如图2K所示,去除第二掩膜7,在有源区沟槽4-1内的第一多晶硅6上方形成栅氧化层9。由于形成栅氧化层9的过程是高温过程,因此在该步骤中,源区离子8直接就退火形成了源区13,省去了单独退火形成源区13的步骤。Step 11: As shown in FIG. 2K, the
步骤十二:如图2L所示,填充并刻蚀多晶硅,在有源区沟槽4-1内形成第二多晶硅10,第二多晶硅10的表面低于有源区沟槽4-1的顶部,第二多晶硅10的表面与有源区沟槽4-1顶部之间形成凹陷区域19。Step 12: As shown in FIG. 2L, polysilicon is filled and etched, and a
步骤十三:如图2M所示,在器件表面淀积形成第一氧化层20,由于位于凹陷区域19的存在,有源区沟槽4-1上方的第一氧化层20形成空隙区域21,在本实施例中第一氧化层20的厚度为3500A。Step 13: As shown in FIG. 2M, a
步骤十四:如图2N所示,各向同性的向下刻蚀第一氧化层20,使终端区沟槽4-2内的第一多晶硅6外露,且有源区表面的外延层2外露,在有源区沟槽4-1内形成了有源区接触孔22,有源区接触孔22延伸至第二多晶硅10内。由于空隙区域21的存在,在形成有源区接触孔22时,有源区沟槽4-1顶部的侧壁会留下由第一氧化层20形成的阻挡层23。Step 14: As shown in FIG. 2N, the
步骤十五:如图2O所示,在有源区沟槽4-1之间的外延层2表面注入并形成体接触区16。Step 15: As shown in FIG. 2O, implant and form a
步骤十六:如图2P所示,在器件表面形成金属电极24,金属电极24通过有源区接触孔22与第二多晶硅10接触,金属电极24覆盖有源区且与体接触区16接触,金属电极24覆盖终端区且与终端区内的第一多晶硅6接触。Step 16: As shown in FIG. 2P , a
对于本领域技术人员而言,显然本发明不限于上述示范性实施例的细节,而且在不背离本发明的精神或基本特征的情况下,能够以其他的具体形式实现本发明。因此,无论从哪一点来看,均应将实施例看作是示范性的,而且是非限制性的,本发明的范围由所附权利要求而不是上述说明限定,因此旨在将落在权利要求的等同要件的含义和范围内的所有变化囊括在本发明内。不应将权利要求中的任何附图标记视为限制所涉及的权利要求。It will be apparent to those skilled in the art that the present invention is not limited to the details of the above-described exemplary embodiments, but that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics of the invention. Therefore, the embodiments are to be regarded in all respects as illustrative and not restrictive, and the scope of the invention is to be defined by the appended claims rather than the foregoing description, which are therefore intended to fall within the scope of the claims. All changes within the meaning and scope of the equivalents of , are included in the present invention. Any reference signs in the claims shall not be construed as limiting the involved claim.
此外,应当理解,虽然本说明书按照实施方式加以描述,但并非每个实施方式仅包含一个独立的技术方案,说明书的这种叙述方式仅仅是为清楚起见,本领域技术人员应当将说明书作为一个整体,各实施例中的技术方案也可以经适当组合,形成本领域技术人员可以理解的其他实施方式。In addition, it should be understood that although this specification is described in terms of embodiments, not each embodiment only includes an independent technical solution, and this description in the specification is only for the sake of clarity, and those skilled in the art should take the specification as a whole , the technical solutions in each embodiment can also be appropriately combined to form other implementations that can be understood by those skilled in the art.
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