CN113162604B - Fuse trimming circuit and control method thereof - Google Patents
Fuse trimming circuit and control method thereof Download PDFInfo
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
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Abstract
本发明揭示了一种熔丝修调电路及其控制方法，所述熔丝修调电路包括：修调控制模块、修调模块和输出电路模块；所述修调控制模块用以向修调模块提供启动信号、烧写信号和修调码，修调码存在逻辑高电平和逻辑低电平两种情况；所述修调模块连接所述修调控制模块，用以根据所述修调控制模块提供的启动信号和烧写信号，控制烧写的启动及烧写过程；完成烧写后对应阻值发生变化，输出逻辑电平信号随修调控制模块信号的不同而形成不同值；所述输出电路模块连接所述修调模块,用以根据所述修调模块输出的信号输出对应的输出信号。本发明提出的熔丝修调电路及其控制方法，减小了芯片占用面积，降低了成本，并且不需要额外的设备。
The present invention discloses a fuse trimming circuit and a control method thereof, wherein the fuse trimming circuit comprises: a trimming control module, a trimming module and an output circuit module; the trimming control module is used to provide a start signal, a burning signal and a trimming code to the trimming module, and the trimming code has two conditions of a logic high level and a logic low level; the trimming module is connected to the trimming control module, and is used to control the start and burning process of burning according to the start signal and the burning signal provided by the trimming control module; after the burning is completed, the corresponding resistance value changes, and the output logic level signal forms different values according to the different signals of the trimming control module; the output circuit module is connected to the trimming module, and is used to output the corresponding output signal according to the signal output by the trimming module. The fuse trimming circuit and the control method thereof proposed by the present invention reduce the chip occupied area, reduce the cost, and do not require additional equipment.
Description
Technical Field
The invention belongs to the technical field of electronic circuits, and relates to a trimming circuit, in particular to a fuse trimming circuit and a control method thereof.
Background
The trimming technology can reduce adverse effects of process fluctuation and offset on the circuit, improves the chip yield, is widely applied to trimming of DAC, ADC, reference sources and various high-precision integrated circuits, and currently, three common trimming modes are mainly adopted: the first is a laser trimming technology of a resistor film, and the resistance value is increased by cutting off part of the resistor material; the second is a fuse trimming technology, which adopts a voltage source or a current source to blow fuses connected in parallel to two ends of a resistor or a capacitor so as to increase the resistance value to realize trimming; and thirdly, a diode short circuit trimming technology, which is similar to a fuse trimming technology, is realized by reducing the resistance value.
The traditional fuse trimming technology is simple to operate, but needs to introduce additional trimming points, and occupies a large amount of chip area. The impedance after fuse breaking has normal distribution, and the voltage, the current and the duration time applied to the two ends of the fuse are all required in the process of fuse breaking, and the repair error can be caused by poor control, so the repair yield is low. The laser trimming technology can directly burn and trim the aluminum wire and the polysilicon wire without additional trimming points, but special laser machine and two-wheel test processes are needed, namely a first-wheel high-temperature test and a second-wheel low-temperature test, so that the test efficiency is low, the test success rate is low, and the trimming cost is high.
In view of this, there is an urgent need to design a new fuse trimming circuit to overcome at least some of the above-mentioned drawbacks of the existing fuse trimming circuits.
Disclosure of Invention
The invention provides a fuse trimming circuit and a control method thereof, which can reduce the occupied area of a chip, reduce the cost and do not need extra equipment.
In order to solve the technical problems, according to one aspect of the present invention, the following technical scheme is adopted:
a fuse trimming circuit, the fuse trimming circuit comprising: the system comprises a trimming control module, a trimming module and an output circuit module;
The trimming control module is used for providing a starting signal, a programming signal and a trimming code for the trimming module;
The trimming module is connected with the trimming control module and used for controlling the starting and writing processes of writing according to the starting signal and the writing signal provided by the trimming control module; after the programming is finished, the corresponding resistance value changes, and the output logic level signals form different values along with the difference of the trimming control module signals;
The output circuit module is connected with the trimming module and is used for outputting corresponding output signals according to the signals output by the trimming module.
As an embodiment of the present invention, the trimming module includes a programming control module and a curing module;
the programming control module is used for sending a programming control signal to the curing module;
the solidifying module is used for completing the fuse blowing operation under the control of the programming control module, and the corresponding resistance value changes after the fuse blowing operation is completed.
As an embodiment of the present invention, the trimming control module is configured to control the start and close of the trimming module, the entry and exit of the programming mode, and whether the curing module performs the fuse blowing operation; the trimming code provided by the trimming control module has two conditions of logic high level and logic low level.
As an implementation mode of the invention, the input end of the programming control module receives the starting signal and the programming signal output by the trimming control module.
As an implementation mode of the present invention, the curing module receives the trimming code from the trimming control module, and enters a programming mode when the programming signal is at a logic high level; if the trimming code is at a logic high level, the fuse is blown, and the output logic level signal is at a logic high level.
After finishing programming, the trimming control module writes the signal at a logic low level, and exits from the programming mode, at this time, the signal at a logic low level is written, the starting signal at a logic high level is written, and the trimming code at a logic high level is written, and the output logic level signal at a high level is written.
After entering the programming mode, if the trimming code is at a logic low level, the curing module does not perform fuse blowing operation, and the output logic level signal is still at a high level; in this case, the programming mode is exited, namely: the programming signal is at a logic low level, the starting signal is at a logic high level, the trimming code is at a logic low level, and the output logic level signal is at a low level.
As one embodiment of the invention, the programming control module circuit comprises a first inverter, a first NOR gate, a second inverter, a second NOR gate, a third inverter, a fourth inverter, a fifth inverter, a sixth inverter, a seventh inverter, a first P-type channel MOS field effect transistor, a second P-type channel MOS field effect transistor, a first N-type channel MOS field effect transistor, a second N-type channel MOS field effect transistor, a third P-type channel MOS field effect transistor, a fourth P-type channel MOS field effect transistor, a first resistor and a first current source;
The input end of the first inverter is connected with the starting signal, the two input ends of the second NOR gate are respectively connected with the starting signal and the programming signal, the output end of the fourth inverter outputs a first enabling signal, the output end of the seventh inverter outputs a second enabling signal, the drain end of the first P-type channel MOS field effect transistor outputs a first bias signal, and the drain end of the first N-type channel MOS field effect transistor outputs a second bias signal.
As one embodiment of the present invention, the solidification module circuit includes an eighth inverter, a ninth inverter, a first nand gate, a tenth inverter, an eleventh inverter, a twelfth inverter, a fifth P-channel MOS field effect transistor, a sixth P-channel MOS field effect transistor, a seventh P-channel MOS field effect transistor, a third N-channel MOS field effect transistor, a fourth N-channel MOS field effect transistor, and a FUSE;
the input of the eighth inverter is connected with the programming signal, the eighth inverter is connected with the ninth inverter in series, two ends of the first NAND gate are respectively connected with the trimming code and the output of the ninth inverter, the grid electrode of the fifth P-type channel MOS field effect transistor is connected with the second enabling signal, the grid electrode of the sixth P-type channel MOS field effect transistor is connected with the first biasing signal, the grid electrode of the third N-type channel MOS field effect transistor is connected with the second biasing signal, the grid electrode of the fourth N-type channel MOS field effect transistor is connected with the first enabling signal, and the drain end of the fifth P-type channel MOS field effect transistor outputs a first logic level signal.
As one embodiment of the present invention, the output circuit module includes an inverter group, and an input terminal of the output circuit module is connected to a first logic level signal, and an output terminal of the output circuit module is connected to a second logic level signal.
A control method of a fuse trimming circuit, the control method comprising:
the trimming control module provides a starting signal, a programming signal and a trimming code for the trimming module, wherein the trimming code has two conditions of logic high level and logic low level;
The trimming module controls the starting and programming processes of programming according to the starting signal and the programming signal provided by the trimming control module; after the programming is finished, the corresponding resistance value changes, and the output logic level signals form different values along with the difference of the trimming control module signals;
and the output circuit module outputs a corresponding output signal according to the signal output by the trimming module.
As an implementation mode of the present invention, the curing module receives the trimming code from the trimming control module, and enters a programming mode when the programming signal is at a logic high level; if the trimming code is at a logic high level, the fuse is blown, and a logic level signal is output as a logic high level;
After finishing programming, the trimming control module writes a signal at a logic low level, and exits from the programming mode, wherein the programming signal is at a logic low level, the starting signal is at a logic high level, and the trimming code is at a logic high level, so that the output logic level signal is at a high level;
After entering the programming mode, if the trimming code is at a logic low level, the curing module does not perform fuse blowing operation, and the output logic level signal is still at a high level; in this case, the programming mode is exited, namely: the programming signal is at a logic low level, the starting signal is at a logic high level, the trimming code is at a logic low level, and the output logic level signal is at a low level.
The invention has the beneficial effects that: the fuse trimming circuit and the control method thereof provided by the invention can reduce the occupied area of a chip, reduce the cost and do not need additional equipment.
Drawings
FIG. 1 is a schematic diagram illustrating a fuse trimming circuit according to an embodiment of the invention.
FIG. 2 is a schematic circuit diagram of a programming control module according to an embodiment of the invention.
Fig. 3 is a circuit schematic of a curing module circuit according to an embodiment of the invention.
FIG. 4 is a schematic diagram illustrating a fuse trimming circuit according to an embodiment of the invention.
FIG. 5 is a schematic diagram illustrating a fuse trimming circuit according to an embodiment of the invention.
Detailed Description
Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
For a further understanding of the present invention, preferred embodiments of the invention are described below in conjunction with the examples, but it should be understood that these descriptions are merely intended to illustrate further features and advantages of the invention, and are not limiting of the claims of the invention.
The description of this section is intended to be illustrative of only a few exemplary embodiments and the invention is not to be limited in scope by the description of the embodiments. It is also within the scope of the description and claims of the invention to interchange some of the technical features of the embodiments with other technical features of the same or similar prior art.
The description of the steps in the various embodiments in the specification is merely for convenience of description, and the implementation of the present application is not limited by the order in which the steps are implemented.
"Connected" in the specification includes both direct and indirect connections, such as through some active, passive, or electrically conductive medium; connections through other active or passive devices, such as through switches, follower circuits, etc. circuits or components, may be included as known to those skilled in the art, on the basis of achieving the same or similar functional objectives.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily implying any actual such relationship or order between such entities or actions. The drawings provided by the present invention are merely to illustrate the basic idea of the present invention by way of illustration, only, the components related to the present invention are shown in the drawings, not according to the number, shape and size of the components in actual implementation, the form, number and proportion of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complicated.
FIG. 1 is a schematic diagram illustrating a fuse trimming circuit according to an embodiment of the invention; referring to fig. 1, the fuse trimming circuit includes: the trimming control module 1, the trimming module 2 and the output circuit module 3.
The trimming control module 1 is used for providing a starting signal, a programming signal and a trimming code for the trimming module; in one embodiment, the trim code has both a logic high level and a logic low level. The trimming module 2 is connected with the trimming control module 1 and is used for controlling the starting and writing processes of writing according to the starting signal and the writing signal provided by the trimming control module 1; after the programming is completed, the corresponding resistance value changes, and the output logic level signals form different values along with the difference of the trimming control module signals. In one embodiment, the default enable signal may be a logic high level without specific discussion. The output circuit module 3 is connected with the trimming module 2 and is used for outputting corresponding output signals according to the signals output by the trimming module.
In an embodiment of the present invention, the trimming module 2 includes a programming control module 21 and a curing module 22; the programming control module 21 is configured to send a programming control signal to the curing module 22; the curing module 22 is configured to complete a fuse blowing operation under the control of the programming control module 21, and the corresponding resistance value changes after the fuse blowing operation is completed. In an embodiment, the input end of the programming control module 21 receives the start signal and the programming signal output by the trimming control module 1.
In an embodiment of the present invention, the trimming module 2 needs to burn the signal before trimming, and normally outputs the trimming code start signal after the burn is completed.
The key point of the invention is the trimming module 2, so that the circuit design is simpler and the key point is highlighted; in an embodiment of the present invention, the functions of providing the programming signal, the start signal and the trimming code are placed in the trimming control module 1 (of course, the functions of providing the programming signal, the start signal and the trimming code may also be placed in other modules); that is, in an embodiment of the present invention, the trimming control module 1 is configured to control the entering and exiting of the programming mode, provide a start signal for the programming control module, and provide a trimming code command for the curing module. In an embodiment of the present invention, the trimming control module 1 is configured to control the start and stop of the trimming module 2, the entry and exit of the programming mode, and whether the curing module 22 performs the fuse blowing operation.
In an embodiment, the curing module 22 receives the trimming code from the trimming control module 1, the programming signal is at a logic high level, the programming control module 21 enters a programming mode, the fuse in the curing module 22 is blown, and the output logic level signal is at a high level; when the programming signal is at a logic low level, the programming control module 21 exits the programming mode.
After the programming is finished, the programming signal of the trimming control module 1 is at a logic low level, and the programming control module 21 exits the programming mode, i.e. the programming signal goes through a process from a logic high level to a logic low level; at this time, the programming signal is at a logic low level, the start signal is at a logic high level, the trimming code is at a logic high level, and the output logic level signal is at a high level.
It should be noted that, after entering the programming mode, if the trimming code is at a logic low level, the curing module 22 does not execute the fuse blowing operation, and the output logic level signal is still at a high level; in this case, the programming mode is exited, namely: the programming signal is at a logic low level, the starting signal is at a logic high level, the trimming code is at a logic low level, and the output logic level signal is at a low level.
FIG. 2 is a schematic circuit diagram of a programming control module according to an embodiment of the invention; referring to fig. 2, in an embodiment of the invention, the programming control module circuit includes a first inverter, a first nor gate, a second inverter, a second nor gate, a third inverter, a fourth inverter, a fifth inverter, a sixth inverter, a seventh inverter, a first P-channel mosfet, a second P-channel mosfet, a first N-channel mosfet, a second N-channel mosfet, a third P-channel mosfet, a fourth P-channel mosfet, a first resistor, and a first current source.
The start signal TRIM_ON is connected with the input end of the first inverter INV1, two inputs of the first NOR gate NOR1 are respectively connected with the output end of the first inverter INV1 and the programming signal EN_PROG, the output end of the NOR1 is connected with the input end of the second inverter INV2, two inputs of the second NOR gate NOR2 are respectively connected with the start signal TRIM_ON and the programming signal EN_PROG, the output end of the NOR2 is connected with the input end of the third inverter INV3, the fourth inverter INV4 is connected with the INV3 in series, the INV4 outputs the first enable signal EN1, the fifth inverter INV5, the sixth inverter INV6 and the seventh inverter INV7 are sequentially connected in series, the input end of the INV5 is connected with the programming signal EN2, the INV7 outputs the second enable signal EN2, the grid electrode of the first P-channel MOS field effect transistor MP1 is connected with the output of the NOR1, the drain electrode of the MP1 outputs a first bias signal PBIAS, the grid electrode of the second P-type channel MOS field effect transistor MP2 is connected with the drain electrode, the grid electrode of the second P-type channel MOS field effect transistor MP2 is connected to the drain electrode of the MP1 and is connected with the grid electrode of the third P-type channel MOS field effect transistor MP3, the current source I1 is connected between the MP2 and the ground, the grid electrode of the first N-type channel MOS field effect transistor MN1 is connected with the output of the INV2, the drain electrode of the second N-type channel MOS field effect transistor MN2 is connected with the drain electrode, the drain electrode of the MP3 and the drain electrode of the MN1 are connected, the source electrode of the MN2 is connected with one end of a resistor R1, the other end of the R1 and the source electrode of the MN1 are connected to the ground, the drain electrode of the fourth P-type channel MOS field effect transistor MP4 is connected with the source electrode of the MP2, and the source electrode of the MP1, the source electrode of the MP2 and the MP3 are connected to the power supply VDD. The programming control module outputs a first enabling signal and a second enabling signal and a first biasing signal to control the curing module circuit according to the starting signal TRIM_ON and the programming signal EN_PROG, the programming signal in the programming mode is high level, the programming mode is exited after programming is completed, the programming signal is low level, and the curing circuit is controlled not to perform programming operation. The current source I1 functions to prevent clamping of PBIAS by MP 2.
FIG. 3 is a schematic circuit diagram of a curing module according to an embodiment of the invention; the solidifying module circuit comprises an eighth inverter, a ninth inverter, a first NAND gate, a tenth inverter, an eleventh inverter, a twelfth inverter, a fifth P-type channel MOS field effect transistor, a sixth P-type channel MOS field effect transistor, a seventh P-type channel MOS field effect transistor, a third N-type channel MOS field effect transistor, a fourth N-type channel MOS field effect transistor and a FUSE.
The input end of the eighth inverter INV8 is connected with the programming signal en_prog, the ninth inverter INV9 and INV8 are connected IN series, the two input ends of the first NAND gate NAND1 are respectively connected with the outputs of the trimming codes trim_in and INV9, the output end of the NAND1 is connected with the input end of the tenth inverter INV10, the eleventh inverter IN11 and the twelfth inverter INV12 are connected IN parallel, the input end thereof is connected with the output of the INV10, the output end thereof is connected with the gate of the seventh P-channel MOS field effect transistor MP7, the gate of the fifth P-channel MOS field effect transistor MP5 is connected with the drain of the second enable signal EN2, the drain of the MP5 is connected with the drain of the fourth N-channel MOS field effect transistor MN4, the gate of the MN4 is connected with the first enable signal EN1, the gate of the sixth P-channel MOS field effect transistor MP6 is connected with the first bias signal PBIAS, the drain of the MP6 is connected with the drain of the third N-channel MOS field effect transistor MN3 and outputs the logic level trim_out, the gate of the second bias signal nbs 3 is connected with the drain of the FUSE MN3, and the other end of the FUSE MN4 is connected with the source 7 and the source is connected with the source end of the FUSE 7.
In the above embodiment, when the programming signal en_prog is at a high level, the programming mode is entered; when trim_in is at a high level, the gate of the seventh P-channel mosfet MP7 is at a logic low level, MP7 is turned on, and a larger current flows through MP7 and into FUSE, resulting IN FUSE blowing from a smaller resistance value to a larger resistance value; EN1 and EN2 are both logic low level, and the output logic level signal trim_out is high level;
When trim_in is low, the gate of MP7 is logic high, MP7 is turned off, and PBIAS is logic high, so MP6 is turned off; NBIAS is logic low, so MN3 is turned off, no current flows through FUSE at this time, and the FUSE will not blow; but EN1, EN2 are both logic low, so the output logic level signal trim_out is still high.
After the programming is completed, the programming signal en_prog goes low. When trim_in is high, PBIAS is logic low, MP6 is turned on, EN1 is logic low, MN4 is turned off, EN2 is logic high, and MP5 is turned off, so that trim_out is high; when trim_in is low, EN2 is high, MP5 is off, EN1 is low, MN4 is off, NBIAS is high, MN3 is on, PBIAS is low, MP6 is on, MN3 and MP5 have the same aspect ratio, and under the condition of on, since the current flowing capability of the N-channel fet is greater than that of the P-channel fet, MN3 pulls down the output logic level trim_out to low.
FIG. 4 is a schematic diagram illustrating a fuse trimming circuit according to an embodiment of the present invention; referring to fig. 4, in an embodiment of the present invention, the output circuit module includes a first buffer circuit and a second buffer circuit, wherein the first buffer circuit is formed by connecting a first inverter and a second inverter in series, and has a shaping effect on the trim_out waveform; the second buffer circuit comprises three inverters, the input of the third inverter is connected with the output of the first buffer circuit, the fourth inverter is connected with the fifth inverter in parallel, the input of the fourth inverter is connected with the output of the third inverter, the output of the fourth inverter is a logic level signal, and the two inverters connected in parallel have lower output impedance, so that the driving capability of the circuit is enhanced.
FIG. 5 is a schematic diagram showing a fuse trimming circuit according to an embodiment of the present invention; referring to fig. 5, in an actual application of the present invention, a plurality of curing modules and output circuit modules may be combined in parallel according to specific situations, so as to implement a plurality of trimming operations at a time.
The invention also discloses a control method of the fuse trimming circuit, which comprises the following steps:
the trimming control module provides a starting signal, a programming signal and a trimming code for the trimming module, wherein the trimming code has two conditions of logic high level and logic low level;
The trimming module controls the starting and programming processes of programming according to the starting signal and the programming signal provided by the trimming control module; after the programming is finished, the corresponding resistance value changes, and the output logic level signals form different values along with the difference of the trimming control module signals;
and the output circuit module outputs a corresponding output signal according to the signal output by the trimming module.
In an embodiment of the present invention, the curing module receives the trimming code from the trimming control module, and enters a programming mode when the programming signal is at a logic high level; if the trimming code is at a logic high level, the fuse is blown, and the output logic level signal is at a logic high level.
After finishing programming, the trimming control module writes the signal at a logic low level, and exits from the programming mode, at this time, the signal at a logic low level is written, the starting signal at a logic high level is written, and the trimming code at a logic high level is written, and the output logic level signal at a high level is written.
After entering the programming mode, if the trimming code is at a logic low level, the curing module does not perform fuse blowing operation, and the output logic level signal is still at a high level; in this case, the programming mode is exited, namely: the programming signal is at a logic low level, the starting signal is at a logic high level, the trimming code is at a logic low level, and the output logic level signal is at a low level.
In summary, the fuse trimming circuit and the control method thereof provided by the invention can reduce the occupied area of the chip, reduce the cost and do not need additional equipment.
It should be noted that the present application may be implemented in software and/or a combination of software and hardware; for example, an Application Specific Integrated Circuit (ASIC), a general purpose computer, or any other similar hardware device may be employed. In some embodiments, the software program of the present application may be executed by a processor to implement the above steps or functions. Likewise, the software program of the present application (including the related data structures) may be stored in a computer-readable recording medium; such as RAM memory, magnetic or optical drives or diskettes, and the like. In addition, some steps or functions of the present application may be implemented in hardware; for example, as circuitry that cooperates with the processor to perform various steps or functions.
The technical features of the above-described embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above-described embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The description and applications of the present invention herein are illustrative and are not intended to limit the scope of the invention to the embodiments described above. Effects or advantages referred to in the embodiments may not be embodied in the embodiments due to interference of various factors, and description of the effects or advantages is not intended to limit the embodiments. Variations and modifications of the embodiments disclosed herein are possible, and alternatives and equivalents of the various components of the embodiments are known to those of ordinary skill in the art. It will be clear to those skilled in the art that the present invention may be embodied in other forms, structures, arrangements, proportions, and with other assemblies, materials, and components, without departing from the spirit or essential characteristics thereof. Other variations and modifications of the embodiments disclosed herein may be made without departing from the scope and spirit of the invention.
Claims (7)
1. A fuse trimming circuit, the fuse trimming circuit comprising: the system comprises a trimming control module, a trimming module and an output circuit module;
The trimming control module is used for providing a starting signal, a programming signal and a trimming code for the trimming module;
The trimming module is connected with the trimming control module and used for controlling the starting and writing processes of writing according to the starting signal and the writing signal provided by the trimming control module; after the programming is finished, the corresponding resistance value changes, and the output logic level signals form different values along with the difference of the trimming control module signals;
The output circuit module is connected with the trimming module and is used for outputting corresponding output signals according to the signals output by the trimming module;
the trimming module comprises a programming control module and a curing module;
the programming control module is used for sending a programming control signal to the curing module;
the curing module is used for completing the fuse blowing operation under the control of the programming control module, and the corresponding resistance value changes after the fuse blowing operation is completed;
the trimming control module is used for controlling the starting and closing of the trimming module, the entering and exiting of the programming mode and whether the curing module performs fuse blowing operation or not; the trimming code provided by the trimming control module has two conditions of logic high level and logic low level;
The programming control module circuit comprises a first inverter, a first NOR gate, a second inverter, a second NOR gate, a third inverter, a fourth inverter, a fifth inverter, a sixth inverter, a seventh inverter, a first P-type channel MOS field effect transistor, a second P-type channel MOS field effect transistor, a first N-type channel MOS field effect transistor, a second N-type channel MOS field effect transistor, a third P-type channel MOS field effect transistor, a fourth P-type channel MOS field effect transistor, a first resistor and a first current source;
The input end of the first inverter is connected with the starting signal, the two input ends of the second NOR gate are respectively connected with the starting signal and the programming signal, the output end of the fourth inverter outputs a first enabling signal, the output end of the seventh inverter outputs a second enabling signal, the drain end of the first P-type channel MOS field effect transistor outputs a first bias signal, and the drain end of the first N-type channel MOS field effect transistor outputs a second bias signal.
2. The fuse trimming circuit of claim 1, wherein:
the input end of the programming control module receives the starting signal and the programming signal output by the trimming control module.
3. The fuse trimming circuit of claim 1, wherein:
The solidifying module receives the trimming code from the trimming control module, and enters a programming mode when the programming signal is at a logic high level; if the trimming code is at a logic high level, the fuse is blown, and a logic level signal is output as a logic high level;
After finishing programming, the trimming control module writes a signal at a logic low level, and exits from the programming mode, wherein the programming signal is at a logic low level, the starting signal is at a logic high level, and the trimming code is at a logic high level, so that the output logic level signal is at a high level;
After entering the programming mode, if the trimming code is at a logic low level, the curing module does not perform fuse blowing operation, and the output logic level signal is still at a high level; in this case, the programming mode is exited, namely: the programming signal is at a logic low level, the starting signal is at a logic high level, the trimming code is at a logic low level, and the output logic level signal is at a low level.
4. The fuse trimming circuit of claim 1, wherein:
The solidifying module circuit comprises an eighth inverter, a ninth inverter, a first NAND gate, a tenth inverter, an eleventh inverter, a twelfth inverter, a fifth P-type channel MOS field effect transistor, a sixth P-type channel MOS field effect transistor, a seventh P-type channel MOS field effect transistor, a third N-type channel MOS field effect transistor, a fourth N-type channel MOS field effect transistor and a FUSE;
the input of the eighth inverter is connected with the programming signal, the eighth inverter is connected with the ninth inverter in series, two ends of the first NAND gate are respectively connected with the trimming code and the output of the ninth inverter, the grid electrode of the fifth P-type channel MOS field effect transistor is connected with the second enabling signal, the grid electrode of the sixth P-type channel MOS field effect transistor is connected with the first biasing signal, the grid electrode of the third N-type channel MOS field effect transistor is connected with the second biasing signal, the grid electrode of the fourth N-type channel MOS field effect transistor is connected with the first enabling signal, and the drain end of the fifth P-type channel MOS field effect transistor outputs a first logic level signal.
5. The fuse trimming circuit of claim 1, wherein:
the output circuit module comprises an inverter group, wherein the input end of the output circuit module is connected with a first logic level signal, and the output end of the output circuit module is connected with a second logic level signal.
6. A control method of the fuse trimming circuit of any one of claims 1 to 5, characterized by comprising:
the trimming control module provides a starting signal, a programming signal and a trimming code for the trimming module, wherein the trimming code has two conditions of logic high level and logic low level;
The trimming module controls the starting and programming processes of programming according to the starting signal and the programming signal provided by the trimming control module; after the programming is finished, the corresponding resistance value changes, and the output logic level signals form different values along with the difference of the trimming control module signals;
and the output circuit module outputs a corresponding output signal according to the signal output by the trimming module.
7. The control method according to claim 6, characterized in that:
The solidifying module receives the trimming code from the trimming control module, and enters a programming mode when the programming signal is at a logic high level; if the trimming code is at a logic high level, the fuse is blown, and a logic level signal is output as a logic high level;
After finishing programming, the trimming control module writes a signal at a logic low level, and exits from the programming mode, wherein the programming signal is at a logic low level, the starting signal is at a logic high level, and the trimming code is at a logic high level, so that the output logic level signal is at a high level;
After entering the programming mode, if the trimming code is at a logic low level, the curing module does not perform fuse blowing operation, and the output logic level signal is still at a high level; in this case, the programming mode is exited, namely: the programming signal is at a logic low level, the starting signal is at a logic high level, the trimming code is at a logic low level, and the output logic level signal is at a low level.
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| CN113917967B (en) * | 2021-09-26 | 2022-05-13 | 电子科技大学 | Low-power consumption trimming circuit |
| CN113873184B (en) * | 2021-10-29 | 2023-10-17 | 西安微电子技术研究所 | Image sensor chip-level ADC trimming system |
| CN115981683B (en) * | 2023-03-20 | 2023-07-11 | 荣湃半导体（上海）有限公司 | Automatic efuse programming circuit |
| CN116030871B (en) * | 2023-03-23 | 2023-06-23 | 长鑫存储技术有限公司 | Trimming circuit and memory |
| CN117176134B (en) * | 2023-08-30 | 2024-07-23 | 北京中科格励微科技有限公司 | A multiplexed pin trimming circuit and trimming method |
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| CN107743035A (en) * | 2017-09-04 | 2018-02-27 | 浙江大华技术股份有限公司 | A kind of chip trims circuit and method for repairing and regulating |
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