CN113162604A - Fuse trimming circuit and control method thereof - Google Patents
Fuse trimming circuit and control method thereof Download PDFInfo
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Abstract
The invention discloses a fuse trimming circuit and a control method thereof, wherein the fuse trimming circuit comprises: the trimming control module, the trimming module and the output circuit module; the trimming control module is used for providing a starting signal, a programming signal and a trimming code for the trimming module, and the trimming code has two conditions of logic high level and logic low level; the trimming module is connected with the trimming control module and used for controlling the programming starting and programming process according to the starting signal and the programming signal provided by the trimming control module; after the programming is finished, the corresponding resistance value changes, and the output logic level signal forms different values along with the difference of the signals of the trimming control module; the output circuit module is connected with the trimming module and used for outputting corresponding output signals according to the signals output by the trimming module. The fuse trimming circuit and the control method thereof provided by the invention reduce the occupied area of a chip, reduce the cost and do not need additional equipment.
Description
Technical Field
The invention belongs to the technical field of electronic circuits, relates to a trimming circuit, and particularly relates to a fuse trimming circuit and a control method thereof.
Background
The trimming technology can reduce the adverse effect of process fluctuation and maladjustment on a circuit, improve the yield of chips, and be widely applied to trimming of a DAC, an ADC, a reference source and various high-precision integrated circuits, and the currently commonly used trimming modes mainly include three types: the first is a laser trimming technology of the resistance film, which increases the resistance value by cutting off part of the resistance material; the second is fuse trimming technology, which adopts a voltage source or a current source to blow fuses connected to two ends of a resistor or a capacitor in parallel so as to increase resistance value to realize trimming; the third is diode short circuit trimming technology, which is similar to fuse trimming technology and realizes trimming by reducing resistance.
Although the traditional fuse trimming technology is simple to operate, additional trimming points need to be introduced, and a large amount of chip area is occupied. The impedance of the fuse after being fused is normally distributed, the voltage, the current and the duration which are applied to two ends of the fuse are required in the fusing process, and poor control can cause trimming errors, so that the trimming yield is low. The laser trimming technology can directly burn out and trim aluminum wires and polysilicon wires without additional trimming points, but needs a special laser machine and two test flows, namely a first round of high-temperature test and a second round of low-temperature test, and has the advantages of low test efficiency, low test success rate and high trimming cost.
In view of the above, there is a need to design a new fuse trimming circuit to overcome at least some of the above-mentioned disadvantages of the existing fuse trimming circuits.
Disclosure of Invention
The invention provides a fuse trimming circuit and a control method thereof, which can reduce the occupied area of a chip and reduce the cost without additional equipment.
In order to solve the technical problem, according to one aspect of the present invention, the following technical solutions are adopted:
a fuse trimming circuit, the fuse trimming circuit comprising: the trimming control module, the trimming module and the output circuit module;
the trimming control module is used for providing a starting signal, a programming signal and a trimming code for the trimming module;
the trimming module is connected with the trimming control module and used for controlling the programming starting and programming process according to the starting signal and the programming signal provided by the trimming control module; after the programming is finished, the corresponding resistance value changes, and the output logic level signal forms different values along with the difference of the signals of the trimming control module;
the output circuit module is connected with the trimming module and used for outputting corresponding output signals according to the signals output by the trimming module.
As an embodiment of the present invention, the trimming module includes a programming control module and a curing module;
the programming control module is used for sending a programming control signal to the curing module;
the curing module is used for completing fuse-blowing operation under the control of the programming control module, and the corresponding resistance value changes after the fuse-blowing operation is completed.
As an embodiment of the present invention, the trimming control module is configured to control the start and the stop of the trimming module, the entering and the exiting of the programming mode, and whether the curing module performs the fuse blowing operation; the trimming code provided by the trimming control module has two conditions of logic high level and logic low level.
As an embodiment of the present invention, an input end of the programming control module receives the start signal and the programming signal output by the trimming control module.
As an embodiment of the present invention, the curing module receives a trimming code from the trimming control module, and enters a programming mode when the programming signal is at a logic high level; if the trimming code is at logic high level, the fuse is blown, and the output logic level signal is at logic high level.
And after the programming is finished, the trimming control module writes a logic low level as a programming signal and exits from the programming mode, at the moment, the programming signal is a logic low level, the starting signal is a logic high level, the trimming code is a logic high level, and the output logic level signal is a high level.
After entering a programming mode, if the trimming code is a logic low level, the curing module does not perform fuse blowing operation, and the output logic level signal is still a high level; the write-burn mode is exited in this case, i.e.: the programming signal is at logic low level, the starting signal is at logic high level, the trimming code is at logic low level, and the output logic level signal is at low level.
As an embodiment of the present invention, the programming control module circuit includes a first inverter, a first nor gate, a second inverter, a second nor gate, a third inverter, a fourth inverter, a fifth inverter, a sixth inverter, a seventh inverter, a first P-channel MOS field effect transistor, a second P-channel MOS field effect transistor, a first N-channel MOS field effect transistor, a second N-channel MOS field effect transistor, a third P-channel MOS field effect transistor, a fourth P-channel MOS field effect transistor, a first resistor, and a first current source;
the input end of the first phase inverter is connected with the starting signal, the two input ends of the second NOR gate are respectively connected with the starting signal and the programming signal, the output end of the fourth phase inverter outputs a first enabling signal, the output end of the seventh phase inverter outputs a second enabling signal, the drain end of the first P-type channel MOS field effect transistor outputs a first bias signal, and the drain end of the first N-type channel MOS field effect transistor outputs a second bias signal.
As an embodiment of the present invention, the curing module circuit includes an eighth inverter, a ninth inverter, a first nand gate, a tenth inverter, an eleventh inverter, a twelfth inverter, a fifth P-type channel MOS field effect transistor, a sixth P-type channel MOS field effect transistor, a seventh P-type channel MOS field effect transistor, a third N-type channel MOS field effect transistor, a fourth N-type channel MOS field effect transistor, and a FUSE;
the input of the eighth phase inverter is connected with the programming signal, the eighth phase inverter is connected with the ninth phase inverter in series, two ends of the first NAND gate are respectively connected with the output of the trimming code and the output of the ninth phase inverter, the grid of the fifth P-type channel MOS field effect transistor is connected with the second enabling signal, the grid of the sixth P-type channel MOS field effect transistor is connected with the first bias signal, the grid of the third N-type channel MOS field effect transistor is connected with the second bias signal, the grid of the fourth N-type channel MOS field effect transistor is connected with the first enabling signal, and the drain end of the fifth P-type channel MOS field effect transistor outputs the first logic level signal.
As an embodiment of the present invention, the output circuit module includes an inverter group, and an input terminal of the output circuit module is connected to the first logic level signal, and an output terminal of the output circuit module is connected to the second logic level signal.
A method of controlling a fuse trimming circuit, the method comprising:
the trimming control module provides a starting signal, a programming signal and a trimming code to the trimming module, and the trimming code has two conditions of logic high level and logic low level;
the trimming module controls the programming starting and programming process according to the starting signal and the programming signal provided by the trimming control module; after the programming is finished, the corresponding resistance value changes, and the output logic level signal forms different values along with the difference of the signals of the trimming control module;
and the output circuit module outputs a corresponding output signal according to the signal output by the trimming module.
As an embodiment of the present invention, the curing module receives a trimming code from the trimming control module, and enters a programming mode when the programming signal is at a logic high level; if the trimming code is at a logic high level, the fuse wire is fused, and a logic level signal is output as a logic high level;
after programming, the trimming control module writes a logic low level as a programming signal and exits from the programming mode, at the moment, the programming signal is a logic low level, the starting signal is a logic high level, the trimming code is a logic high level, and then the output logic level signal is a high level;
after entering a programming mode, if the trimming code is a logic low level, the curing module does not perform fuse blowing operation, and the output logic level signal is still a high level; the write-burn mode is exited in this case, i.e.: the programming signal is at logic low level, the starting signal is at logic high level, the trimming code is at logic low level, and the output logic level signal is at low level.
The invention has the beneficial effects that: the fuse trimming circuit and the control method thereof can reduce the occupied area of a chip and reduce the cost, and do not need additional equipment.
Drawings
Fig. 1 is a schematic diagram illustrating a fuse trimming circuit according to an embodiment of the invention.
FIG. 2 is a circuit diagram of a programming control module circuit according to an embodiment of the invention.
Fig. 3 is a circuit diagram of a curing module circuit according to an embodiment of the invention.
Fig. 4 is a schematic diagram illustrating a fuse trimming circuit according to an embodiment of the invention.
Fig. 5 is a schematic diagram illustrating a fuse trimming circuit according to an embodiment of the invention.
Detailed Description
Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
For a further understanding of the invention, reference will now be made to the preferred embodiments of the invention by way of example, and it is to be understood that the description is intended to further illustrate features and advantages of the invention, and not to limit the scope of the claims.
The description in this section is for several exemplary embodiments only, and the present invention is not limited only to the scope of the embodiments described. It is within the scope of the present disclosure and protection that the same or similar prior art means and some features of the embodiments may be interchanged.
The steps in the embodiments in the specification are only expressed for convenience of description, and the implementation manner of the present application is not limited by the order of implementation of the steps.
"coupled" in this specification includes both direct and indirect connections, such as through some active device, passive device, or electrically conductive medium; but also may include connections through other active or passive devices, such as through switches, follower circuits, etc., that are known to those skilled in the art for achieving the same or similar functional objectives.
It should be noted that the relational terms such as first and second, and the like in the present invention are used solely to distinguish one entity or action from another entity or action without necessarily representing any actual relationship or order between the entities or actions. The drawings provided herein are for illustrative purposes only to show the basic concepts of the present invention, and not for the purpose of limiting the invention, but to show the components related to the present invention in terms of the number, shape and size of the components in actual implementation.
The invention discloses a fuse trimming circuit, and fig. 1 is a schematic composition diagram of the fuse trimming circuit according to an embodiment of the invention; referring to fig. 1, the fuse trimming circuit includes: the trimming control module 1, the trimming module 2 and the output circuit module 3.
The trimming control module 1 is used for providing a starting signal, a programming signal and a trimming code for the trimming module; in one embodiment, the trimming code has both a logic high level and a logic low level. The trimming module 2 is connected with the trimming control module 1 and used for controlling the programming starting and programming process according to the starting signal and the programming signal provided by the trimming control module 1; after the programming is finished, the corresponding resistance value changes, and the output logic level signal forms different values along with the difference of the signals of the trimming control module. In one embodiment, the default enable signal may be a logic high level without specific reference. The output circuit module 3 is connected to the trimming module 2 and is configured to output a corresponding output signal according to the signal output by the trimming module.
In an embodiment of the present invention, the trimming module 2 includes a programming control module 21 and a curing module 22; the programming control module 21 is configured to send a programming control signal to the curing module 22; the solidifying module 22 is used for completing the fuse blowing operation under the control of the programming control module 21, and the corresponding resistance value changes after the fuse blowing operation is completed. In an embodiment, an input terminal of the programming control module 21 receives the start signal and the programming signal output by the trimming control module 1.
In an embodiment of the present invention, the trimming module 2 needs to write a signal before starting trimming, and after the writing is finished, a signal that is needed to start the trimming code is normally output.
The key point of the invention is the trimming module 2, so that the circuit design is simpler and the key point is more prominent; in an embodiment of the present invention, the function of providing the programming signal, the start signal, and the trimming code is disposed in the trimming control module 1 (of course, the function of providing the programming signal, the start signal, and the trimming code may be disposed in other modules); that is, in an embodiment of the present invention, the trimming control module 1 is configured to control entry and exit of the programming mode, provide a start signal for the programming control module, and provide a trimming code command for the curing module. In an embodiment of the invention, the trimming control module 1 is used to control the start and the stop of the trimming module 2, the entering and the exiting of the programming mode, and whether the curing module 22 performs the fuse blowing operation.
In an embodiment, the curing module 22 receives the trimming code from the trimming control module 1, the programming signal is at a logic high level, the programming control module 21 enters the programming mode, the fuse in the curing module 22 is blown, and the output logic level signal is at a high level; when the programming signal is at a logic low level, the programming control module 21 exits the programming mode.
After the programming is finished, the programming signal of the trimming control module 1 is in a logic low level, and the programming control module 21 exits the programming mode, namely the programming signal goes through a process from a logic high level to a logic low level; at this time, the programming signal is at a logic low level, the start signal is at a logic high level, the trimming code is at a logic high level, and the output logic level signal is at a high level.
It should be noted that, after entering the programming mode, if the trimming code is at a logic low level, the curing module 22 does not perform the fuse blowing operation, and the output logic level signal is still at a high level; the write-burn mode is exited in this case, i.e.: the programming signal is at logic low level, the starting signal is at logic high level, the trimming code is at logic low level, and the output logic level signal is at low level.
FIG. 2 is a schematic circuit diagram of a programming control module according to an embodiment of the invention; referring to fig. 2, in an embodiment of the invention, the programming control module circuit includes a first inverter, a first nor gate, a second inverter, a second nor gate, a third inverter, a fourth inverter, a fifth inverter, a sixth inverter, a seventh inverter, a first P-channel MOS field effect transistor, a second P-channel MOS field effect transistor, a first N-channel MOS field effect transistor, a second N-channel MOS field effect transistor, a third P-channel MOS field effect transistor, a fourth P-channel MOS field effect transistor, a first resistor, and a first current source.
The enable signal TRIM _ ON is connected to an input terminal of the first inverter INV1, two inputs of the first NOR gate NOR1 are connected to an output terminal of the first inverter INV1 and the write signal EN _ PROG, respectively, an output terminal of the NOR1 is connected to an input terminal of the second inverter INV2, two inputs of the second NOR gate NOR2 are connected to an enable signal TRIM _ ON and the write signal EN _ PROG, respectively, an output terminal of the NOR2 is connected to an input terminal of the third inverter INV3, the fourth inverter INV4 is connected in series with the INV3, the INV4 outputs the first enable signal EN1, the fifth inverter INV5, the sixth inverter INV5 and the seventh inverter INV7 are connected in series, an input terminal of the INV5 is connected to the write signal, the INV7 outputs the second enable signal EN2, a gate of the first P-type channel MOS fet MP1 is connected to an output of the 1, a drain of the MP1 outputs the first bias signal ias, the second MOS fet 56 is connected to a drain terminal of the MOS 828653 and connected to a drain of the third channel MOS 1, the current source I1 is connected between MP2 and ground, the gate of the first N-channel MOS FET MN1 is connected with the output of INV2, the drain outputs the second bias signal NBIAS, the gate and the drain of the second N-channel MOS FET MN2 are connected with the drain, the drain of MP3 and the drain of MN1 are connected, the source of MN2 is connected with one end of a resistor R1, the other end of R1 and the source of MN1 are connected and grounded, the gate of the fourth P-channel MOS FET MP4 is connected with the source and is connected with the power supply VDD, the drain of MP4 is connected with the source of MN2, and the sources of MP1, MP2 and MP3 are connected and are connected with the power supply VDD. And the programming control module outputs a first enabling signal, a second enabling signal, a first biasing signal and a second biasing signal to control the curing module circuit according to the starting signal TRIM _ ON and the programming signal EN _ PROG, wherein the programming signal is at a high level in the programming mode, the programming mode is withdrawn after the programming is finished, and the programming signal is at a low level to control the curing circuit not to perform the programming operation any more. The effect of current source I1 is to prevent clamping of PBIAS by MP 2.
FIG. 3 is a schematic circuit diagram of a curing module according to an embodiment of the invention; the curing module circuit comprises an eighth phase inverter, a ninth phase inverter, a first NAND gate, a tenth phase inverter, an eleventh phase inverter, a twelfth phase inverter, a fifth P-type channel MOS field effect transistor, a sixth P-type channel MOS field effect transistor, a seventh P-type channel MOS field effect transistor, a third N-type channel MOS field effect transistor, a fourth N-type channel MOS field effect transistor and a FUSE FUSE.
An input end of an eighth inverter INV8 is connected to the programming signal EN _ PROG, an input end of a ninth inverter INV9 and INV8 are connected IN series, two input ends of a first NAND gate NAND1 are connected to outputs of the trimming codes TRIM _ IN and INV9, respectively, an output end of the NAND1 is connected to an input end of a tenth inverter INV10, an eleventh inverter IN11 and a twelfth inverter INV12 are connected IN parallel, input ends thereof are connected to an output of INV10, an output end thereof is connected to a gate of a seventh P-channel MOS field effect transistor MP7, a gate of a fifth P-channel MOS field effect transistor MP5 is connected to the second enable signal EN2, a drain of MP5 is connected to a drain of a fourth N-channel MOS field effect transistor MN4, a gate of MN4 is connected to the first enable signal EN1, a gate of a sixth P-channel MOS field effect transistor MP6 is connected to the first bias signal PBIAS, a drain of MP6 is connected to a drain of the third N-channel MOS field effect transistor MN3 and outputs a logic level of a gate of a second bias signal NBIAS 3, the source of MN3 is connected to one end of a FUSE FUSE, the other end of the FUSE is connected to the source of MN4 and to ground, and the sources of MP5, MP6 and MP7 are connected and to power supply VDD.
In the above embodiment, when the programming signal EN _ PROG is at the high level, the programming mode is entered; when the TRIM code TRIM _ IN is at a high level, the gate of the seventh P-channel mosfet MP7 is at a logic low level, MP7 is turned on, a large current flows through MP7 and into the FUSE, causing the FUSE to blow, changing from a small resistance value to a large resistance value; EN1 and EN2 are both logic low level, and output logic level signal TRIM _ OUT is high level;
when the TRIM code TRIM _ IN is at a low level, the gate of MP7 is at a logic high level, MP7 is turned off, PBIAS is at a logic high level, and thus MP6 is turned off; NBIAS is logic low, therefore MN3 is off, no current flows through FUSE, and the FUSE does not blow; however, both EN1 and EN2 are at a logic low level, so the output logic level signal TRIM _ OUT is still at a high level.
And after the programming is finished, the programming signal EN _ PROG changes to low level. When the TRIM code TRIM _ IN is at a high level, PBIAS is at a logic low level, MP6 is turned on, EN1 is at a logic low level, MN4 is turned off, EN2 is at a logic high level, and MP5 is turned off, so that the output logic level TRIM _ OUT is at a high level; when the trimming code TRIM _ IN is at a low level, EN2 is at a high level, MP5 is off, EN1 is at a low level, MN4 is off, NBIAS is at a high level, MN3 is on, PBIAS is at a low level, MP6 is on, MN3 and MP5 have the same aspect ratio, and when turned on, MN3 pulls down the output logic level TRIM _ OUT to a low level because the current flowing through the N-channel fet is greater than that flowing through the P-channel fet.
FIG. 4 is a schematic diagram illustrating a fuse trimming circuit according to an embodiment of the present invention; referring to fig. 4, in an embodiment of the invention, the output circuit module includes a first buffer circuit and a second buffer circuit, the first buffer circuit is formed by connecting a first inverter and a second inverter in series, and plays a role of shaping the TRIM _ OUT waveform; the second buffer circuit comprises three inverters, the input of the third inverter is connected with the output of the first buffer circuit, the fourth inverter and the fifth inverter are connected in parallel, the input of the fourth inverter is connected with the output of the third inverter, the output of the fourth inverter is a logic level signal, and the two inverters connected in parallel have lower output impedance, so that the driving capability of the circuit is enhanced.
FIG. 5 is a schematic diagram illustrating a fuse trimming circuit according to an embodiment of the present invention; referring to fig. 5, in an actual application of the present invention, a plurality of curing modules and output circuit modules can be combined in parallel according to specific situations, so as to implement a plurality of trimming operations at one time.
The invention also discloses a control method of the fuse trimming circuit, which comprises the following steps:
the trimming control module provides a starting signal, a programming signal and a trimming code to the trimming module, and the trimming code has two conditions of logic high level and logic low level;
the trimming module controls the programming starting and programming process according to the starting signal and the programming signal provided by the trimming control module; after the programming is finished, the corresponding resistance value changes, and the output logic level signal forms different values along with the difference of the signals of the trimming control module;
and the output circuit module outputs a corresponding output signal according to the signal output by the trimming module.
In an embodiment of the present invention, the curing module receives a trimming code from the trimming control module, and enters a programming mode when the programming signal is at a logic high level; if the trimming code is at logic high level, the fuse is blown, and the output logic level signal is at logic high level.
And after the programming is finished, the trimming control module writes a logic low level as a programming signal and exits from the programming mode, at the moment, the programming signal is a logic low level, the starting signal is a logic high level, the trimming code is a logic high level, and the output logic level signal is a high level.
After entering a programming mode, if the trimming code is a logic low level, the curing module does not perform fuse blowing operation, and the output logic level signal is still a high level; the write-burn mode is exited in this case, i.e.: the programming signal is at logic low level, the starting signal is at logic high level, the trimming code is at logic low level, and the output logic level signal is at low level.
In summary, the fuse trimming circuit and the control method thereof provided by the invention can reduce the chip occupation area and reduce the cost, and do not need additional equipment.
It should be noted that the present application may be implemented in software and/or a combination of software and hardware; for example, it may be implemented using Application Specific Integrated Circuits (ASICs), general purpose computers, or any other similar hardware devices. In some embodiments, the software programs of the present application may be executed by a processor to implement the above steps or functions. As such, the software programs (including associated data structures) of the present application can be stored in a computer-readable recording medium; such as RAM memory, magnetic or optical drives or diskettes, and the like. In addition, some steps or functions of the present application may be implemented using hardware; for example, as circuitry that cooperates with the processor to perform various steps or functions.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The description and applications of the invention herein are illustrative and are not intended to limit the scope of the invention to the embodiments described above. Effects or advantages referred to in the embodiments may not be reflected in the embodiments due to interference of various factors, and the description of the effects or advantages is not intended to limit the embodiments. Variations and modifications of the embodiments disclosed herein are possible, and alternative and equivalent various components of the embodiments will be apparent to those skilled in the art. It will be clear to those skilled in the art that the present invention may be embodied in other forms, structures, arrangements, proportions, and with other components, materials, and parts, without departing from the spirit or essential characteristics thereof. Other variations and modifications of the embodiments disclosed herein may be made without departing from the scope and spirit of the invention.
Claims (10)
1. A fuse trimming circuit, comprising: the trimming control module, the trimming module and the output circuit module;
the trimming control module is used for providing a starting signal, a programming signal and a trimming code for the trimming module;
the trimming module is connected with the trimming control module and used for controlling the programming starting and programming process according to the starting signal and the programming signal provided by the trimming control module; after the programming is finished, the corresponding resistance value changes, and the output logic level signal forms different values along with the difference of the signals of the trimming control module;
the output circuit module is connected with the trimming module and used for outputting corresponding output signals according to the signals output by the trimming module.
2. The fuse trimming circuit of claim 1, wherein:
the trimming module comprises a programming control module and a curing module;
the programming control module is used for sending a programming control signal to the curing module;
the curing module is used for completing fuse-blowing operation under the control of the programming control module, and the corresponding resistance value changes after the fuse-blowing operation is completed.
3. The fuse trimming circuit of claim 1, wherein:
the trimming control module is used for controlling the starting and closing of the trimming module, the entering and exiting of a programming mode and whether the curing module carries out fuse fusing operation or not; the trimming code provided by the trimming control module has two conditions of logic high level and logic low level.
4. The fuse trimming circuit of claim 2, wherein:
and the input end of the programming control module receives the starting signal and the programming signal output by the trimming control module.
5. The fuse trimming circuit of claim 2, wherein:
the curing module receives a trimming code from the trimming control module, and enters a programming mode when the programming signal is at a logic high level; if the trimming code is at a logic high level, the fuse wire is fused, and a logic level signal is output as a logic high level;
after programming, the trimming control module writes a logic low level as a programming signal and exits from the programming mode, at the moment, the programming signal is a logic low level, the starting signal is a logic high level, the trimming code is a logic high level, and then the output logic level signal is a high level;
after entering a programming mode, if the trimming code is a logic low level, the curing module does not perform fuse blowing operation, and the output logic level signal is still a high level; the write-burn mode is exited in this case, i.e.: the programming signal is at logic low level, the starting signal is at logic high level, the trimming code is at logic low level, and the output logic level signal is at low level.
6. The fuse trimming circuit of claim 2, wherein:
the programming control module circuit comprises a first phase inverter, a first NOR gate, a second phase inverter, a second NOR gate, a third phase inverter, a fourth phase inverter, a fifth phase inverter, a sixth phase inverter, a seventh phase inverter, a first P-type channel MOS field effect transistor, a second P-type channel MOS field effect transistor, a first N-type channel MOS field effect transistor, a second N-type channel MOS field effect transistor, a third P-type channel MOS field effect transistor, a fourth P-type channel MOS field effect transistor, a first resistor and a first current source;
the input end of the first phase inverter is connected with the starting signal, the two input ends of the second NOR gate are respectively connected with the starting signal and the programming signal, the output end of the fourth phase inverter outputs a first enabling signal, the output end of the seventh phase inverter outputs a second enabling signal, the drain end of the first P-type channel MOS field effect transistor outputs a first bias signal, and the drain end of the first N-type channel MOS field effect transistor outputs a second bias signal.
7. The fuse trimming circuit of claim 2, wherein:
the curing module circuit comprises an eighth phase inverter, a ninth phase inverter, a first NAND gate, a tenth phase inverter, an eleventh phase inverter, a twelfth phase inverter, a fifth P-type channel MOS field effect transistor, a sixth P-type channel MOS field effect transistor, a seventh P-type channel MOS field effect transistor, a third N-type channel MOS field effect transistor, a fourth N-type channel MOS field effect transistor and a FUSE;
the input of the eighth phase inverter is connected with the programming signal, the eighth phase inverter is connected with the ninth phase inverter in series, two ends of the first NAND gate are respectively connected with the output of the trimming code and the output of the ninth phase inverter, the grid of the fifth P-type channel MOS field effect transistor is connected with the second enabling signal, the grid of the sixth P-type channel MOS field effect transistor is connected with the first bias signal, the grid of the third N-type channel MOS field effect transistor is connected with the second bias signal, the grid of the fourth N-type channel MOS field effect transistor is connected with the first enabling signal, and the drain end of the fifth P-type channel MOS field effect transistor outputs the first logic level signal.
8. The fuse trimming circuit of claim 1, wherein:
the output circuit module comprises an inverter group, the input end of the output circuit module is connected with the first logic level signal, and the output end of the output circuit module is connected with the second logic level signal.
9. A control method of a fuse trimming circuit is characterized by comprising the following steps:
the trimming control module provides a starting signal, a programming signal and a trimming code to the trimming module, and the trimming code has two conditions of logic high level and logic low level;
the trimming module controls the programming starting and programming process according to the starting signal and the programming signal provided by the trimming control module; after the programming is finished, the corresponding resistance value changes, and the output logic level signal forms different values along with the difference of the signals of the trimming control module;
and the output circuit module outputs a corresponding output signal according to the signal output by the trimming module.
10. The control method according to claim 9, characterized in that:
the curing module receives a trimming code from the trimming control module, and enters a programming mode when the programming signal is at a logic high level; if the trimming code is at a logic high level, the fuse wire is fused, and a logic level signal is output as a logic high level;
after programming, the trimming control module writes a logic low level as a programming signal and exits from the programming mode, at the moment, the programming signal is a logic low level, the starting signal is a logic high level, the trimming code is a logic high level, and then the output logic level signal is a high level;
after entering a programming mode, if the trimming code is a logic low level, the curing module does not perform fuse blowing operation, and the output logic level signal is still a high level; the write-burn mode is exited in this case, i.e.: the programming signal is at logic low level, the starting signal is at logic high level, the trimming code is at logic low level, and the output logic level signal is at low level.
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| CN117176134A (en) * | 2023-08-30 | 2023-12-05 | 北京中科格励微科技有限公司 | Repair and adjustment circuit and repair and adjustment method for multiplexing pins |
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