CN110784178A - Broadband Injection Locked Frequency Multiplier - Google Patents

Abstract

The invention discloses a wideband injection-locked frequency multiplier, which adopts a double-injection structure and includes two harmonic generators and an injection-locked oscillator. Among them, the harmonic generator is used to generate the second and above harmonic signals, and the injection-locked oscillator is used to lock the harmonic signals generated by the harmonic generator. The formed transformers are coupled and connected; the two harmonic generators convert the input fundamental signal into two harmonic signals, which are then respectively coupled to the injection-locked oscillator through the transformer to achieve frequency doubling. Compared with the traditional structure, the broadband injection locking frequency multiplier of the present invention still has a wide locking range when the input power is small, and has the advantages of ultra-wide bandwidth, low input sensitivity, low power consumption, high integration and the like.

Description

Broadband Injection Locked Frequency Multiplier

technical field

The invention relates to a broadband injection locking frequency multiplier, belonging to the technical field of radio frequency and analog integrated circuits of microelectronics and solid state electronics.

Background technique

In recent years, wireless communication technology has developed rapidly, and the development of millimeter wave and terahertz frequency bands has become more and more hot. The design of wireless transceivers with high integration, high bandwidth and low power consumption has become very important. Wireless transceiver systems rely on reliable IF signals for better system performance. As an important part of the intermediate frequency signal generation chain, the frequency multiplier completes the function of multiplying the fundamental frequency.

In the use of IF signals, frequency multiplication measures need to be taken frequently to improve system performance. In the super-heterodyne receiver architecture or the double-conversion zero-IF transceiver architecture, two IF signals, one high and one low, need to be used. In transceivers, a phase-locked loop is usually used to provide a reliable and stable IF signal, but a single phase-locked loop has a limited bandwidth and can only provide a single IF signal. The phase loop is unreasonable in terms of chip area and power consumption, so it is necessary to multiply or divide the output of the phase-locked loop to flexibly adjust the IF frequency.

Next-generation 5G wireless communications, requiring MIMO transceivers supporting 28GHz, 37GHz and 39GHz, providing such a wide range of IF frequencies will be a formidable challenge. In the future, in the E-band (60-90GHz) and W-band (75GHz-110GHz), wider-band ultra-high-speed wireless communication will be realized. In this frequency range and above, the voltage-controlled oscillator is designed to obtain good phase noise and lower frequency. The power consumption of the frequency multiplier is very high, and the design is very difficult. The scheme of using the frequency multiplier to double the frequency of the lower frequency signal can reduce the design difficulty and obtain better phase noise. As a low-power design, the injection-locked frequency multiplier will make the The final power consumption is controlled in the lower range.

When the total phase shift of an ideal inverter reaches 360° at a certain frequency, if the Barkhausen criterion is satisfied, a resonant signal will be generated at this frequency. If an injection signal of suitable amplitude and frequency is selected and added to it, the resonant signal will is pulled to coincide with the injection signal, resulting in injection locking. The injection-locked doubler uses the push-push pair to generate the double frequency of the fundamental wave for injection, so that the signal resonates at the double frequency. The output signal power is basically obtained by resonance, so the injection-locked doubler has the characteristics of low power consumption. The injection-locked frequency tripler generates three times the frequency of the fundamental wave for injection, so that the signal resonates at three times the frequency, and also has the characteristics of low power consumption.

Literature “Li A, Zheng S, Yin J, et al.A 21–48GHz Subharmonic Injection-LockedFractional-N Frequency Synthesizer for Multiband Point-to-Point Backhaul Communications[J].IEEE Journal of Solid-State Circuits,2014,49( 8): 1785-1799.” uses a 6-order transformer design, which makes the injection-locked frequency multiplier have a high locking range. However, its 6th-order transformer adopts a 3-turn inductance design, and a flat gain cannot be obtained by injecting the frequency multiplied signal into the resonant cavity, so that it is easier to lock at one end of the locking range and difficult to lock at the other end.

Literature "Zhang J, Liu H, Zhao C, et al.A 22.8-to-43.2GHz tuning-lessinjection-locked frequency tripler using injection-current boosting with 76.4% locking range for multiband 5G applications [C] //Solid- state CircuitsConference.IEEE, 2018.” also uses a 6-order transformer design to achieve triple frequency injection locking. However, when the input power is reduced, the locking range will rapidly narrow.

SUMMARY OF THE INVENTION

The technical problem to be solved by the present invention is: aiming at the phenomenon that the traditional injection locking frequency multiplier has a wide locking range under high power input, but the locking range will be rapidly narrowed when the input power is reduced, a low input sensitivity is provided. The wide-band injection-locked frequency multiplier can maintain a wide locking range while the input power is reduced, and has the advantages of ultra-wide bandwidth, low input sensitivity, low power consumption, and high integration.

The present invention adopts the following technical solutions for solving the above-mentioned technical problems:

The broadband injection-locked frequency multiplier adopts a double-injection structure, including a first harmonic generator, a second harmonic generator and an injection-locked oscillator; the two harmonic generators are used to generate harmonic signals respectively, and the injection-locked oscillator Used to lock the harmonic signal generated by the harmonic generator; the first harmonic generator, the second harmonic generator and the injection locked oscillator are connected through the transformer coupling composed of their own internal inductance; two harmonic generators The input fundamental signal is converted into two harmonic signals, and then respectively coupled to the injection-locked oscillator through a transformer to achieve frequency multiplication.

The first harmonic generator includes a first coupled inductor, the second harmonic generator includes a second coupled inductor, the injection-locked oscillator includes a third coupled inductor, and the first, second and third coupled inductors form a transformer, Adjust the coupling coefficient between the first and second coupled inductors, the coupling coefficient between the first and third coupled inductors, and the coupling coefficient between the second and third coupled inductors to adjust the transimpedance gain and bandwidth of the frequency multiplier to ensure the performance of the frequency multiplier.

Preferably, when the broadband injection-locked frequency multiplier is used to achieve double frequency, the first harmonic generator generates a second harmonic signal, and the second harmonic generator generates a second harmonic signal. The first harmonic generator includes first and second transistors, a first coupled inductor and a first capacitor; the gate of the first transistor is connected to the positive input terminal, the gate of the second transistor is connected to the negative input terminal, and the source of the first transistor The electrode and the source of the second transistor are grounded, the drain of the first transistor and the drain of the second transistor are connected to one end of the first coupled inductor and one end of the first capacitor, the other end of the first coupled inductor is connected to the power supply, and the first capacitor The other end is grounded or a power supply; the first capacitance is one of the parasitic capacitance of the connected first coupling inductor, the parasitic capacitance of the output end of the harmonic generator, the parasitic capacitance of the first and second transistors, and the adjustable capacitance or several combinations. The second harmonic generator includes third and fourth transistors, a second coupled inductor and a second capacitor; the gate of the third transistor is connected to the positive input terminal, the gate of the fourth transistor is connected to the negative input terminal, and the source of the third transistor The electrode and the source of the fourth transistor are grounded, the drain of the third transistor and the drain of the fourth transistor are connected to one end of the second coupled inductor and one end of the second capacitor, the other end of the second coupled inductor is connected to the power supply, and the second capacitor The other end is grounded or the power supply; the second capacitance is one of the parasitic capacitance of the connected second coupling inductor, the parasitic capacitance of the output end of the harmonic generator, the parasitic capacitance of the third and fourth transistors, and the adjustable capacitance or several combinations.

Preferably, when the broadband injection-locked frequency multiplier is used to achieve frequency triple, the first harmonic generator generates a third harmonic signal, and the second harmonic generator generates a third harmonic signal. The first harmonic generator includes a first P-type transistor, a first N-type transistor, a first coupled inductor and a first capacitor; the gate of the first P-type transistor and the gate of the first N-type transistor are connected to the positive input terminal, The source of the first N-type transistor is grounded, the source of the first P-type transistor is connected to the power supply, the drain of the first P-type transistor is connected to one end of the first coupling inductor and one end of the first capacitor, and the drain of the first N-type transistor is connected connected to the other end of the first coupling inductor and the other end of the first capacitor; the first capacitor is the connected inductor, the parasitic capacitance of the output end of the harmonic generator, the parasitic capacitance of the first P-type and first N-type transistors, and One or a combination of adjustable capacitors. The second harmonic generator includes a second P-type transistor, a second N-type transistor, a second coupled inductor and a second capacitor; the gate of the second P-type transistor and the gate of the second N-type transistor are connected to the negative input terminal, The source of the second N-type transistor is grounded, the source of the second P-type transistor is connected to the power supply, the drain of the second P-type transistor is connected to one end of the second coupling inductor and one end of the second capacitor, and the drain of the second N-type transistor connected to the other end of the second coupling inductor and the other end of the second capacitor; the second capacitor is the connected inductor, the parasitic capacitance of the output end of the harmonic generator, the parasitic capacitance of the second P-type and second N-type transistors, and One or a combination of adjustable capacitors.

Preferably, the injection-locked oscillator includes a third coupled inductor, a third capacitor, a fifth transistor, a sixth transistor, and a current source; the center tap of the third coupled inductor is connected to one end of the current source, and the other end of the current source is connected to Power supply, one end of the third coupled inductor is connected to the drain of the fifth transistor, the gate of the sixth transistor, one end of the third capacitor and the positive output end, the other end of the third coupled inductor is connected to the drain of the sixth transistor, the fifth The gate of the transistor, the other end of the third capacitor and the negative output end, the source of the fifth transistor and the source of the sixth transistor are grounded; the third capacitor is the third coupling inductance, the parasitic capacitance of the connected transistor, and One or a combination of adjustable capacitors.

Preferably, the broadband injection-locked frequency multiplier may also include an input buffer and an output buffer, and the input buffer is connected to the input end of the core circuit composed of the first and second harmonic generators and the injection-locked oscillator, so The output buffer is connected to the output end of the core circuit; wherein the connection mode is direct coupling, transformer coupling or AC coupling.

The broadband injection-locked frequency multiplier of the present invention adopts a double injection structure, and the two harmonic generators and the injection-locked oscillator are respectively connected through the transformer coupling composed of their own inductances, and the coupling between the coupled inductances can be adjusted during circuit design. coefficient, select the appropriate coupling coefficient, so as to expand the transimpedance gain and bandwidth of the frequency multiplier, and ensure the good performance of the frequency multiplier. Compared with the prior art, the present invention has the following technical effects:

1. Solve the problem that the traditional injection locking frequency multiplier has a wide locking range under high power input, but the locking range will be rapidly narrowed when the input power decreases, and provide a wideband injection locking frequency multiplication with low input sensitivity The frequency multiplier still has a wide locking range when the input power is small.

2. The broadband injection-locked frequency multiplier of the present invention has the advantages of ultra-wide bandwidth, low input sensitivity, low power consumption, high integration and the like, can be widely used in millimeter wave/radio frequency transceivers, and has novelty and versatility.

Description of drawings

FIG. 1 is a schematic circuit diagram of an embodiment of a broadband injection-locked frequency multiplier of the present invention.

FIG. 2 is a structural block diagram of another embodiment of the broadband injection-locked frequency multiplier of the present invention.

FIG. 3 is a circuit diagram of an embodiment of the invention when the broadband injection-locked frequency multiplier realizes double frequency doubling.

FIG. 4 is a circuit diagram of an embodiment of the invention when the broadband injection-locked frequency multiplier realizes frequency triple.

Fig. 5 is the characteristic curve diagram of the transimpedance gain of the broadband injection-locked frequency multiplier of the present invention.

Detailed ways

Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, but not to be construed as a limitation of the present invention.

Example 1

Aiming at the problem that the traditional injection-locked frequency multiplier has a wide locking range under high power input, but the locking range is rapidly narrowed when the input power is reduced, the embodiment of the present invention adopts a double-injection structure, as shown in FIG. 1 , including The first and second two harmonic generators and an injection-locked oscillator; the harmonic generator is used to generate n-th harmonic signals (n=2, 3, 4...), and the injection-locked oscillator is used to lock the harmonic generation The two harmonic generators and an injection-locked oscillator are connected through the transformer coupling composed of their own internal inductors; the two harmonic generators convert the input fundamental signal into two harmonics The signals are then coupled to injection-locked oscillators through transformers, respectively, to achieve frequency doubling.

The first harmonic generator includes a first coupled inductor L1, the second harmonic generator includes a second coupled inductor L2, the injection locked oscillator includes a third coupled inductor L3, and the first, second and third coupled inductors form a transformer , the coupling coefficient between the first coupling inductance L1 and the second coupling inductance L2 is k12, the coupling coefficient between the first coupling inductance L1 and the third coupling inductance L3 is k13, and the coupling coefficient between the second coupling inductance L2 and the third coupling inductance L3 The coupling coefficient is k23. During circuit design, the transimpedance gain and bandwidth of the frequency doubler can be expanded by adjusting the coupling coefficients k12, k13, and k23 to appropriate values to ensure good performance of the frequency doubler.

Embodiment 2

The embodiment of the present invention adds an input buffer and an output buffer on the basis of the first embodiment. As shown in FIG. 2 , two harmonic generators and an injection-locked oscillator constitute the core circuit of the broadband injection-locked frequency multiplier. The broadband injection-locked frequency multiplier includes a core circuit, an input buffer and an output buffer, the input buffer is connected to the input end of the core circuit, and the output buffer is connected to the output end of the core circuit; the above connection methods can be direct coupling, transformer coupling or AC coupling.

Embodiment 3

The broadband injection-locked frequency multiplier disclosed in the embodiment of the present invention is a broadband injection-locked frequency multiplier that can realize double frequency doubling. Injection Locked Oscillator. The two harmonic generators include: common source stage first transistor M1 and second transistor M2, common source stage third transistor M3 and fourth transistor M4, first coupled inductor L1 and second coupled inductor L2, and first capacitor C1 and the second capacitor C2; the first transistor M1, the second transistor M2, the first coupled inductor L1, and the first capacitor C1 constitute the first harmonic generator, the third transistor M3, the fourth transistor M4, the second coupled inductor L2, The second capacitor C2 constitutes a second harmonic generator; the gate of the first transistor M1 is connected to the positive input terminal, the gate of the second transistor M2 is connected to the negative input terminal, the source of the first transistor M1 and the source of the second transistor M2 The electrodes are grounded, the drain of the first transistor M1 and the drain of the second transistor M2 are connected to one end of the first coupling inductor L1 and one end of the first capacitor C1, the other end of the first coupling inductor L1 is connected to the power supply, and the first capacitor C1 The other end is grounded or the power supply; the gate of the third transistor M3 is connected to the positive input terminal, the gate of the fourth transistor M4 is connected to the negative input terminal, the source of the third transistor M3 and the source of the fourth transistor M4 are grounded, and the third transistor M4 is connected to the ground. The drain of M3 and the drain of the fourth transistor M4 are connected to one end of the second coupled inductor L2 and one end of the second capacitor C2, the other end of the second coupled inductor L2 is connected to the power supply, and the other end of the second capacitor C2 is grounded or a power supply; The first capacitor C1 and the second capacitor C2 are one or a combination of a connection inductor, a parasitic capacitor at the output end of the harmonic generator, a parasitic capacitor of a transistor, and an adjustable capacitor. The injection-locked oscillator includes: a third coupled inductor L3, a third capacitor C3, a fifth transistor M5, a sixth transistor M6, and a current source; the center tap of the third coupled inductor L3 is connected to one end of the current source, and the other end of the current source is connected to Power supply, one end of the third coupling inductor L3 is connected to the drain of the fifth transistor M5, the gate of the sixth transistor M6, one end of the third capacitor C3 and the positive output end, and the other end of the third coupling inductor L3 is connected to the sixth transistor M6 The drain of the fifth transistor M5, the gate of the fifth transistor M5, the other end and the negative output end of the third capacitor C3, the source of the fifth transistor M5 and the source of the sixth transistor M6 are grounded; the third capacitor C3 is the third One or more combinations of the coupled inductor L3, the parasitic capacitance of the transistor, and the adjustable capacitor; the first coupled inductor L1, the second coupled inductor L2, and the third coupled inductor L3 constitute a transformer, and by adjusting the first coupled inductor L1 The coupling coefficient k12 between the second coupling inductance L2 and the second coupling inductance L2, the coupling coefficient k13 between the first coupling inductance L1 and the third coupling inductance L3, and the coupling coefficient k23 between the second coupling inductance L2 and the third coupling inductance L3, can make the frequency multiplication achieve good performance.

Embodiment 4

The broadband injection-locked frequency multiplier disclosed in the embodiment of the present invention is a broadband injection-locked frequency multiplier that can realize triple frequency. Injection Locked Oscillator. The two harmonic generators include: a first P-type transistor M1P and a second P-type transistor M2P, a first N-type transistor M1N and a second N-type transistor M2N, a first coupled inductor L1 and a second coupled inductor L2, and a first The capacitor C1 and the second capacitor C2; the first P-type transistor M1P, the first N-type transistor M1N, the first coupling inductor L1, and the first capacitor C1 constitute the first harmonic generator, the second P-type transistor M2P, the second N-type transistor P-type transistor M2N, second coupled inductor L2, and second capacitor C2 constitute a second harmonic generator; the gate of the first P-type transistor M1P and the gate of the first N-type transistor M1N are connected to the positive input terminal, the first N-type transistor M1P The source of the transistor M1N is grounded, the source of the first P-type transistor M1P is connected to the power supply, the drain of the first P-type transistor M1P is connected to one end of the first coupling inductor L1 and one end of the first capacitor C1, and the drain of M1N is connected to the first The other end of a coupling inductor L1 and the other end of the first capacitor C1; the gate of the second P-type transistor M2P and the gate of the second N-type transistor M2N are connected to the negative input terminal, and the source of the second N-type transistor M2N is grounded , the source of the second P-type transistor M2P is connected to the power supply, the drain of the second P-type transistor M2P is connected to one end of the second coupling inductor L2 and one end of the second capacitor C2, and the drain of the second N-type transistor M2N is connected to the second The other end of the coupling inductor L2 and the other end of the second capacitor C2; wherein the first capacitor C1 and the second capacitor C2 are the connected inductor, the parasitic capacitance of the output end of the harmonic generator, the parasitic capacitance of the P-type and N-type transistors, and One or a combination of adjustable capacitors. The injection-locked oscillator includes: an injection-locked oscillator, including a third coupled inductor L3, a third capacitor C3, a fifth transistor M5, a sixth transistor M6, and a current source; the center tap of the third coupled inductor L3 is connected to one end of the current source, The other end of the current source is connected to the power supply, one end of the inductor L3 is connected to the drain of the fifth transistor M5, the gate of the sixth transistor M6, one end of the third capacitor C3 and the positive output end, and the other end of the inductor L3 is connected to the sixth transistor M6 The drain of the fifth transistor M5, the gate of the fifth transistor M5, the other end and the negative output end of the third capacitor C3, the source of the fifth transistor M5 and the source of the sixth transistor M6 are grounded; the third capacitor C3 is the third One or more combinations of the coupled inductor L3, the parasitic capacitance of the transistor, and the adjustable capacitor; the first coupled inductor L1, the second coupled inductor L2, and the third coupled inductor L3 constitute a transformer, and by adjusting the first coupled inductor L1 The coupling coefficient k12 between the second coupling inductance L2 and the second coupling inductance L2, the coupling coefficient k13 between the first coupling inductance L1 and the third coupling inductance L3, and the coupling coefficient k23 between the second coupling inductance L2 and the third coupling inductance L3, can make the frequency multiplication achieve good performance.

To sum up, the broadband injection-locked frequency multiplier of the present invention adopts a double injection structure, which can effectively expand the transimpedance gain and bandwidth. As shown in Figure 5, the first harmonic generator and the injection-locked oscillator are coupled through a transformer, the coupling coefficient is k13, and the transimpedance gain characteristic curve is Z31; the second harmonic generator and the injection-locked oscillator are coupled through a transformer. , the coupling coefficient is k23, and the transimpedance gain characteristic curve is Z32. In the present invention, the overall transimpedance gain characteristic curve is Z31+Z32, and both the transimpedance gain and the bandwidth are significantly improved.

The above embodiments are only to illustrate the technical idea of the present invention, and cannot limit the protection scope of the present invention. Any modification made on the basis of the technical solution according to the technical idea proposed by the present invention falls within the protection scope of the present invention. Inside.

Claims (8)

1. The broadband injection locking frequency multiplier is characterized in that a double injection structure is adopted, and the broadband injection locking frequency multiplier comprises a first harmonic generator, a second harmonic generator and an injection locking oscillator; the two harmonic generators are respectively used for generating harmonic signals, and the injection locking oscillator is used for locking the harmonic signals generated by the harmonic generators; the first harmonic generator, the second harmonic generator and the injection locking oscillator are coupled and connected through transformers composed of inductors in the first harmonic generator, the second harmonic generator and the injection locking oscillator; the two harmonic generators convert the input fundamental wave signals into two paths of harmonic signals, and then the two paths of harmonic signals are respectively coupled to the injection locking oscillator through a transformer to realize frequency multiplication.

2. The wideband injection-locked frequency multiplier of claim 1, wherein the first harmonic generator comprises a first coupling inductor, the second harmonic generator comprises a second coupling inductor, the injection-locked oscillator comprises a third coupling inductor, the first, second and third coupling inductors form a transformer, and the transimpedance gain and bandwidth of the frequency multiplier are adjusted by adjusting the coupling coefficient between the first and second coupling inductors, the coupling coefficient between the first and third coupling inductors, and the coupling coefficient between the second and third coupling inductors to ensure the performance of the frequency multiplier.

3. The wideband injection-locked frequency multiplier of claim 1, wherein when the wideband injection-locked frequency multiplier is used to implement frequency doubling, the first harmonic generator generates a second harmonic signal, and the first harmonic generator comprises first and second transistors, a first coupling inductor, and a first capacitor; the grid electrode of the first transistor is connected with the positive electrode input end, the grid electrode of the second transistor is connected with the negative electrode input end, the source electrode of the first transistor and the source electrode of the second transistor are grounded, the drain electrode of the first transistor and the drain electrode of the second transistor are connected with one end of a first coupling inductor and one end of a first capacitor, the other end of the first coupling inductor is connected with a power supply, and the other end of the first capacitor is grounded or powered; the first capacitor is one or a combination of several of a parasitic capacitor of the first coupling inductor, a parasitic capacitor of the output end of the harmonic generator, parasitic capacitors of the first transistor and the second transistor, and an adjustable capacitor.

4. The wideband injection locked frequency multiplier of claim 1, wherein when the wideband injection locked frequency multiplier is used to implement frequency doubling, the second harmonic generator generates a second harmonic signal, and the second harmonic generator comprises third and fourth transistors, a second coupling inductor, and a second capacitor; the grid electrode of the third transistor is connected with the anode input end, the grid electrode of the fourth transistor is connected with the cathode input end, the source electrode of the third transistor and the source electrode of the fourth transistor are grounded, the drain electrode of the third transistor and the drain electrode of the fourth transistor are connected with one end of the second coupling inductor and one end of the second capacitor, the other end of the second coupling inductor is connected with the power supply, and the other end of the second capacitor is grounded or powered; the second capacitor is one or a combination of several of a parasitic capacitor of the second coupling inductor, a parasitic capacitor at the output end of the harmonic generator, parasitic capacitors of the third transistor and the fourth transistor, and an adjustable capacitor.

5. The wideband injection-locked frequency multiplier of claim 1, wherein when the wideband injection-locked frequency multiplier is used for implementing frequency tripling, the first harmonic generator generates a third harmonic signal, and the first harmonic generator comprises a first P-type transistor, a first N-type transistor, a first coupling inductor and a first capacitor; the grid electrode of the first P-type transistor and the grid electrode of the first N-type transistor are connected with the positive input end, the source electrode of the first N-type transistor is grounded, the source electrode of the first P-type transistor is connected with the power supply, the drain electrode of the first P-type transistor is connected with one end of the first coupling inductor and one end of the first capacitor, and the drain electrode of the first N-type transistor is connected with the other end of the first coupling inductor and the other end of the first capacitor; the first capacitor is one or a combination of several of a parasitic capacitor of the first coupling inductor, a parasitic capacitor of the output end of the harmonic generator, parasitic capacitors of the first P-type transistor and the first N-type transistor, and an adjustable capacitor.

6. The wideband injection-locked frequency multiplier of claim 1, wherein when the wideband injection-locked frequency multiplier is configured to implement frequency tripling, the second harmonic generator generates a third harmonic signal, and the second harmonic generator comprises a second P-type transistor, a second N-type transistor, a second coupling inductor, and a second capacitor; the grid electrode of the second P-type transistor and the grid electrode of the second N-type transistor are connected with the input negative terminal, the source electrode of the second N-type transistor is grounded, the source electrode of the second P-type transistor is connected with the power supply, the drain electrode of the second P-type transistor is connected with one end of the second coupling inductor and one end of the second capacitor, and the drain electrode of the second N-type transistor is connected with the other end of the second coupling inductor and the other end of the second capacitor; the second capacitor is one or a combination of several of a parasitic capacitor of the second coupling inductor, a parasitic capacitor at the output end of the harmonic generator, parasitic capacitors of the second P-type transistor and the second N-type transistor, and an adjustable capacitor.

7. The wideband injection-locked frequency multiplier of claim 1, wherein the injection-locked oscillator comprises a third coupling inductor, a third capacitor, a fifth transistor, a sixth transistor, and a current source; the center tap of the third coupling inductor is connected with one end of a current source, the other end of the current source is connected with a power supply, one end of the third coupling inductor is connected with the drain electrode of the fifth transistor, the grid electrode of the sixth transistor, one end of the third capacitor and the positive output end, the other end of the third coupling inductor is connected with the drain electrode of the sixth transistor, the grid electrode of the fifth transistor, the other end of the third capacitor and the negative output end, and the source electrode of the fifth transistor and the source electrode of the sixth transistor are grounded; the third capacitor is one or a combination of a parasitic capacitor of the third coupling inductor, parasitic capacitors of the fifth transistor and the sixth transistor, and an adjustable capacitor.

8. The wideband injection-locked frequency multiplier of claim 1, further comprising an input buffer coupled to an input of a core circuit comprising the first and second harmonic generators and the injection-locked oscillator, and an output buffer coupled to an output of the core circuit; the connection mode is direct coupling, transformer coupling or alternating current coupling.

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