CN110690168A - A method of manufacturing a liquid crystal display panel - Google Patents

Abstract

The present invention provides a method for manufacturing a liquid crystal display panel. From the bottom layer to the top layer, a common electrode layer, a light shielding layer, an organic insulating layer, a semiconductor layer, a gate insulating layer, a gate electrode, an interlayer insulating layer, a source electrode and a drain electrode are sequentially formed. electrode, the first insulating layer and the pixel electrode layer; the organic insulating layer protects the metal of the light-shielding layer, after removing the first metal layer in the pixel area, the organic insulating layer and the common electrode layer are baked at the same time, so that the organic insulating layer Simultaneous crystallization with the common electrode layer to protect the light-shielding layer under the organic insulating layer, avoid oxidation of the light-shielding layer during baking, and ensure that the common electrode layer in the pixel area has good light transmittance and resistivity after crystallization . The liquid crystal display panel of the present invention has a mask-reduced design, which is reduced to 7 masks compared with the existing 9-channel mask process, which can save costs and at the same time retain the electrical advantages of TFT devices.

Description

A method of manufacturing a liquid crystal display panel

technical field

The present invention relates to the technical field of liquid crystal panels, and in particular, to a method for manufacturing a liquid crystal display panel.

Background technique

Top-gate TFT devices have smaller Cgs (capacitance between gate and drain) and Cgd (capacitance between gate and source), and have lower power consumption compared to conventional bottom-gate TFT devices and good device stability, it is widely used in OLED compensation circuits and low-power display devices. However, the process of the top-gate TFT device requires 9 masks, which has obvious cost disadvantages.

SUMMARY OF THE INVENTION

The purpose of the present invention is to provide a method for manufacturing a liquid crystal display panel that saves costs and maintains the electrical advantages of a TFT device.

The present invention provides a method for manufacturing a liquid crystal display panel, comprising the following steps:

S1: sequentially depositing a stack structure of a common electrode layer and a first metal layer on the substrate;

S2: First, deposit an organic insulating layer on the basis of step S1; then use a semi-transparent mask to expose the organic insulating layer to form a first groove area in the pixel area and a contact hole in the terminal area. the second groove area and the first opening in the connection area between the pixel area and the terminal area;

S3: First, on the basis of step S2, perform the first etching and etch away the first metal layer under the first opening; then perform the second etching and etch away the first metal layer under the first opening the common electrode layer;

S4: performing a first ashing treatment on the organic insulating layer on the basis of step S3, so that the organic insulating layer in the first groove region and the organic insulating layer in the second groove region are removed;

S5: on the basis of step S4, the pixel area and the terminal area are respectively etched, and the first metal layer in the pixel area and the terminal area are respectively removed;

S6: on the basis of step S5, the organic insulating layer and the common electrode layer are baked together, and the crystallization of the organic insulating layer and the common electrode layer is performed simultaneously;

S7: On the basis of step S5, a TFT device with a top gate structure is formed first, and then a pixel electrode connected to the drain electrode of the TFT device is formed.

Preferably, in the step S2, the semi-transparent mask is respectively a semi-transparent area in the pixel area and the terminal area, and the connection area of the semi-transparent mask between the pixel area and the terminal area is a fully-transparent area.

Preferably, step S61 between steps S6 and S7 is also included:

S61 : performing a second ashing treatment on the organic insulating layer on the basis of step S6 , removing the organic insulating layer beyond both sides of the first metal layer, and forming the light shielding layer under the organic insulating layer on the first metal layer.

Preferably, step S7 includes the following steps:

S71: On the basis of step S61, chemical vapor deposition is used to form a film to form a buffer layer;

S72: forming a semiconductor layer on the basis of step S71;

S73: sequentially depositing an insulating material layer and a second metal layer on the basis of step S72, and etching the insulating material layer and the second metal layer respectively to form a gate insulating layer on the semiconductor and a gate insulating layer on the gate insulating layer grid;

S74: On the basis of step S73, first deposit an interlayer insulating layer, and then etch the interlayer insulating layer to form a second opening located in the terminal area and on the common electrode layer;

S75: depositing a third metal layer on the basis of step S74 and etching the third metal layer to form a source electrode and a drain electrode located in the second opening, wherein the source electrode and the drain electrode are located on both sides of the semiconductor respectively;

S76: on the basis of step S75, depositing a first insulating layer and etching the first insulating layer to form a third opening above the drain;

S77: On the basis of step S76, a transparent conductive material is used to deposit and form a pixel electrode layer, and the pixel electrode layer is in contact with the drain electrode through the third opening.

Preferably, in step S75, the source electrode is in contact with the common electrode layer.

Preferably, in step S71, the buffer layer is wrapped around the common electrode layer, the first metal layer, the organic insulating layer and the opening.

Preferably, in step S3, fluorine-free cupric acid is used for the first etching, and oxalic acid is used for the second etching.

Preferably, in step S5, fluorine-free cupric acid is used to etch the pixel region and the terminal region respectively.

Preferably, the material of the first metal layer is copper or aluminum or an alloy material.

The liquid crystal display panel of the present invention has a mask-reduced design, and is reduced to 7 masks compared with the existing 9-mask process, which can save costs and at the same time retain the electrical advantages of TFT devices.

Description of drawings

1 to 13 are schematic diagrams illustrating the manufacturing steps of the liquid crystal display panel of the present invention.

Detailed ways

Below in conjunction with the accompanying drawings and specific embodiments, the present invention will be further clarified. It should be understood that these embodiments are only used to illustrate the present invention and not to limit the scope of the present invention. Modifications of equivalent forms all fall within the scope defined by the appended claims of this application.

In order to keep the drawings concise, the drawings only schematically show the parts related to the present invention, and they do not represent its actual structure as a product. In addition, in order to make the drawings concise and easy to understand, in some drawings, only one of the components having the same structure or function is schematically shown, or only one of them is marked. As used herein, "one" not only means "only one", but also "more than one".

The present invention discloses a method for manufacturing a liquid crystal display panel, comprising the following steps:

S1: As shown in FIG. 1 , depositing a stacked structure of the common electrode layer 20 and the first metal layer 30 on the substrate 10;

The common electrode layer 20 is formed of a transparent conductive material, and the material of the first metal layer 30 is a single-layer metal such as copper or aluminum or a multi-layer metal.

S2: As shown in FIG. 2, first, a layer of organic insulating layer 40 is deposited on the basis of step S1; then a semi-transparent mask (not shown) is used to expose the organic insulating layer 40, and the semi-transparent mask is respectively The position of the contact hole between the pixel area 101 and the terminal area 102 is a semi-transparent area, and the connection area 103 between the pixel area 101 and the terminal area 102 of the semi-transparent mask is a fully-transparent area. 40 Perform exposure to form a first groove area 41 in the pixel area 101, a second groove area 42 in the terminal area 102, and a first opening 43 in the connection area 103, and the first opening 43 is located in the first above the metal layer 30;

The common electrode layer 20 close to the terminal area 101 is used as a light-shielding area of the TFT device through the connection area 103, the common electrode layer 20 close to the pixel area 101 is used to provide a common voltage, and the common electrode layer 20 of the terminal area 101 and the area close to the pixel area are used to provide a common voltage. The connection of the common electrode layers 20 of 101 together may result in abnormal characteristics of the TFT device.

Wherein, step S2 is the first mask process.

S3: As shown in FIG. 3(a), first, on the basis of step S2, fluorine-free cupric acid is used for the first etching and the first metal layer 30 located under the first opening 43 is etched away; then Use oxalic acid to perform the second etching and etch away the common electrode layer 20 located under the first opening 43, that is, make the first opening 43 located on the substrate 10 through two etchings;

S4: As shown in FIG. 4 , on the basis of step S3, perform a first ashing treatment (Ashing) on the organic insulating layer 40, so that the organic insulating layer 40 and the second groove area in the first groove area 41 are removed the organic insulating layer 40 within 42;

S5: As shown in FIG. 5, on the basis of step S4, fluorine-free cupric acid is used to etch the pixel area 101 and the terminal area 102 respectively and remove the first metal layer 30 in the pixel area 101 and the terminal area 102 respectively;

S6: On the basis of step S5, the organic insulating layer 40 and the common electrode layer 20 are baked together, and the crystallization of the organic insulating layer 40 and the common electrode layer 20 is carried out at the same time, so that a baking process can be saved. For the protection of the layer 40, the first metal layer 30 under the organic insulating layer 40 will not be oxidized;

S7: On the basis of step S6, a TFT device with a top-gate structure is formed first, and then a pixel electrode connected to the drain electrode of the TFT device is formed.

The liquid crystal display panel of the present invention is formed through the above steps.

Wherein, the manufacturing method of the liquid crystal display panel further includes step S61 between steps S6 and S7:

S61: on the basis of step S6, perform a second ashing treatment (Ashing) on the organic insulating layer 40, remove the organic insulating layer 40 beyond the two sides of the first metal layer 30, and form the first metal layer 30 on the organic insulating layer 40. The lower light shielding layer 31 eliminates the UnderCut (undercut) of the organic insulating layer 40;

The light shielding layer 31 serves as the light shielding metal layer of the semiconductor 60 .

Wherein, step S7 includes the following steps:

S71 : as shown in FIG. 7 , on the basis of step S61 , a buffer layer 50 is formed by low-speed CVD (chemical vapor deposition) film formation, and the thickness of the buffer layer 50 is not less than the thickness of the semiconductor layer 20 and the first metal layer 30 Sum;

The buffer layer 50 is wrapped around the common electrode layer 20 , the first metal layer 30 , the organic insulating layer 40 and the opening 43 .

S72: As shown in FIG. 8, on the basis of step S71, a semiconductor layer 60 formed of a metal oxide material is formed;

Wherein, the material of the semiconductor layer 60 can also be amorphous silicon, polycrystalline silicon, etc.; step S72 is the second mask process.

S73 : as shown in FIG. 9 , sequentially depositing an insulating material layer and a second metal layer on the basis of step S72 and etching the insulating material layer and the second metal layer respectively to form a gate insulating layer 70 on the semiconductor 60 and a gate 80 on the gate insulating layer 70;

Wherein, step S73 is the third mask process.

S74: As shown in FIG. 10(a), on the basis of step S73, an interlayer insulating layer 90 is first deposited, as shown in FIG. 10(b), and then the interlayer insulating layer 91 is etched to form a layer located in the terminal area the second opening 91 in 102 and on the common electrode layer 20;

Wherein, step S74 is the fourth mask process.

S75: As shown in FIG. 11, on the basis of step S74, a third metal layer is deposited and the third metal layer is etched to form a source electrode 111 and a drain electrode 112 located in the second opening 91, wherein the source electrode 111 and the drain electrode 112 are formed. The drain electrodes 112 are respectively located on both sides of the semiconductor 60; the source electrodes 111 are in contact with the common electrode layer 20, which contributes to the electrical stability of the TFT device;

Wherein, step S75 is the fifth mask process.

S76 : as shown in FIG. 12 , on the basis of step S75 , depositing a first insulating layer 120 and etching the first insulating layer 120 to form a third opening 121 located above the drain electrode 112 ;

Wherein, step S76 is the sixth mask process.

S77 : as shown in FIG. 13 , on the basis of step S76 , a transparent conductive material is used to deposit and form the pixel electrode layer 130 , and the pixel electrode layer 130 is in contact with the drain electrode 112 through the third opening 121 .

Wherein, step S77 is the seventh mask process.

The present invention sequentially forms the common electrode layer 20 , the light shielding layer 31 , the organic insulating layer 40 , the semiconductor layer 60 , the gate insulating layer 70 , the gate electrode 80 , the interlayer insulating layer 90 , the source electrode 111 and the drain electrode 112 from the bottom layer to the top layer. , the first insulating layer 120 and the pixel electrode layer 130 .

The common electrode layer 20 and the light shielding layer 31 are formed by continuous film formation, and then the organic insulating layer 40 is exposed, etched and peeled off by using a semi-transparent mask (not shown in the figure), and the common electrode layer is outside the pixel area 101 20 and the light-shielding layer 31 have a double-layer structure, and the pixel region 101 has a single-layer structure of the common electrode layer 20 .

In the present invention, the organic insulating layer 40 is used to protect the metal of the light shielding layer 31. After removing the first metal layer 30 in the pixel area 101, the organic insulating layer 40 and the common electrode layer 40 are baked at the same time, so that the organic insulating layer 40 and the common electrode layer 40 are baked at the same time. The common electrode layer 40 is simultaneously crystallized, so as to protect the light shielding layer 31 under the organic insulating layer 40, avoid oxidation of the light shielding layer 31 during baking, and ensure that the common electrode layer 40 of the pixel region 101 has good transparency after crystallization. light rate and resistivity.

The source electrode of the present invention is in contact with the common electrode layer, which contributes to the electrical stability of the TFT device.

The liquid crystal display panel of the present invention has a mask-reduced design, and is reduced to 7 masks compared with the existing 9-mask process, which can save costs and at the same time retain the electrical advantages of TFT devices.

The preferred embodiments of the present invention are described in detail above, but the present invention is not limited to the specific details of the above-mentioned embodiments. Within the scope of the technical concept of the present invention, various equivalent transformations (such as quantity, shape, etc.) can be performed on the technical solutions of the present invention. , position, etc.), these equivalent transformations all belong to the protection scope of the present invention.

Claims (9)

1. A method for manufacturing a liquid crystal display panel, comprising the steps of: S1: sequentially depositing a stack structure of a common electrode layer and a first metal layer on the substrate; S2: First, deposit an organic insulating layer on the basis of step S1; then use a semi-transparent mask to expose the organic insulating layer to form a first groove area in the pixel area and a contact hole in the terminal area. the second groove area and the first opening in the connection area between the pixel area and the terminal area; S3: First, on the basis of step S2, perform the first etching and etch away the first metal layer under the first opening; then perform the second etching and etch away the first metal layer under the first opening the common electrode layer; S4: performing a first ashing treatment on the organic insulating layer on the basis of step S3, so that the organic insulating layer in the first groove region and the organic insulating layer in the second groove region are removed; S5: on the basis of step S4, the pixel area and the terminal area are respectively etched, and the first metal layer in the pixel area and the terminal area are respectively removed; S6: on the basis of step S5, the organic insulating layer and the common electrode layer are baked together, and the crystallization of the organic insulating layer and the common electrode layer is performed simultaneously; S7: On the basis of step S5, a TFT device with a top gate structure is formed first, and then a pixel electrode connected to the drain electrode of the TFT device is formed. 2 . The liquid crystal display panel according to claim 1 , wherein in the step S2 , the semi-transparent mask is respectively a semi-transparent area in the pixel area and the terminal area, and the semi-transparent mask is in the pixel area and the terminal area. 3 . The connection area between the areas is a fully transparent area. 3. The liquid crystal display panel according to claim 1, further comprising a step S61 between steps S6 and S7: S61 : performing a second ashing treatment on the organic insulating layer on the basis of step S6 , removing the organic insulating layer beyond both sides of the first metal layer, and forming the light shielding layer under the organic insulating layer on the first metal layer. 4. The liquid crystal display panel according to claim 3, wherein step S7 comprises the following steps: S71: On the basis of step S61, chemical vapor deposition is used to form a film to form a buffer layer; S72: forming a semiconductor layer on the basis of step S71; S73: sequentially depositing an insulating material layer and a second metal layer on the basis of step S72, and etching the insulating material layer and the second metal layer respectively to form a gate insulating layer on the semiconductor and a gate insulating layer on the gate insulating layer grid; S74: On the basis of step S73, first deposit an interlayer insulating layer, and then etch the interlayer insulating layer to form a second opening located in the terminal area and on the common electrode layer; S75: depositing a third metal layer on the basis of step S74 and etching the third metal layer to form a source electrode and a drain electrode located in the second opening, wherein the source electrode and the drain electrode are located on both sides of the semiconductor respectively; S76: on the basis of step S75, depositing a first insulating layer and etching the first insulating layer to form a third opening above the drain; S77: On the basis of step S76, a transparent conductive material is used to deposit and form a pixel electrode layer, and the pixel electrode layer is in contact with the drain electrode through the third opening. 5 . The liquid crystal display panel of claim 4 , wherein in step S75 , the source electrode is in contact with the common electrode layer. 6 . 6 . The liquid crystal display panel according to claim 4 , wherein in step S71 , the buffer layer is wrapped around the common electrode layer, the first metal layer, the organic insulating layer and the opening. 7 . 7 . The liquid crystal display panel according to claim 4 , wherein in step S3 , fluorine-free cupric acid is used for the first etching, and oxalic acid is used for the second etching. 8 . 8 . The liquid crystal display panel according to claim 4 , wherein in step S5 , fluorine-free cupric acid is used to etch the pixel region and the terminal region respectively. 9 . 9 . The liquid crystal display panel according to claim 1 , wherein the material of the first metal layer is copper or aluminum or an alloy material. 10 .

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