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CN108538736A - 半导体封装件的制造方法 - Google Patents

半导体封装件的制造方法 Download PDF

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Publication number
CN108538736A
CN108538736A CN201810171606.XA CN201810171606A CN108538736A CN 108538736 A CN108538736 A CN 108538736A CN 201810171606 A CN201810171606 A CN 201810171606A CN 108538736 A CN108538736 A CN 108538736A
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CN
China
Prior art keywords
microprotrusion
semiconductor chip
even surface
semiconductor
package part
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201810171606.XA
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English (en)
Inventor
折笠诚
清家英之
堀川雄平
阿部寿之
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Corp
Original Assignee
TDK Corp
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Filing date
Publication date
Application filed by TDK Corp filed Critical TDK Corp
Publication of CN108538736A publication Critical patent/CN108538736A/zh
Pending legal-status Critical Current

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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

本发明提供一种半导体封装件的制造方法，该半导体封装件是具有基板、形成于基板上的导电部和形成于导电部的微凸起的半导体芯片层叠多片而得到的半导体封装件，其中，该制造方法具备：平滑面形成工序，在微凸起上形成平滑面；叠层工序，通过在一个半导体芯片的微凸起上重叠另一个半导体芯片的微凸起，从而将半导体芯片层叠三片以上；接合工序，通过将微凸起加热使其熔融，经由该微凸起将半导体芯片彼此接合，在叠层工序中，在一个半导体芯片和另一个半导体芯片中的、至少一个微凸起上形成平滑面，一个微凸起在平滑面上与另一个微凸起接触。

Description

半导体封装件的制造方法
技术领域
本发明涉及半导体封装件的制造方法。
背景技术
一直以来，在半导体封装件的三维安装中，使用引线接合(wire bonding)进行半导体芯片和半导体芯片、或插入件的连接。替代该引线接合，开发了经由贯通电极和凸起将半导体芯片彼此连接的三维安装技术。贯通电极要求标准上为短的连接线长(例如50μm)，且将电极间相连的凸起也要求微细的凸起。与这种低于50μm的凸起间距相对应的技术被称作微凸起。如美国专利第9136159号说明书，通过将半导体芯片和半导体芯片用贯通电极和微凸起连接，从而能够极大地缩短半导体芯片间的配线长度。因此，能够降低伴随微细化而增大的配线延迟时间。
发明内容
在此，半导体芯片和半导体芯片的叠层通过倒装片安装来进行。但是，在将半导体芯片和半导体芯片叠层多片来进行接合时，产生半导体芯片间的错位等问题。
本发明是鉴于这样的情况而完成的，其目的在于，提供一种能够位置精度高地将半导体芯片和半导体芯片接合的半导体封装件的制造方法。
本发明的一个方面提供一种半导体封装件的制造方法，该半导体封装件是具有基板、形成于基板上的导电部和形成于导电部的微凸起的半导体芯片叠层多片而得到的半导体封装件，该制造方法具备：平滑面形成工序，在微凸起上形成平滑面；叠层工序，通过在一个半导体芯片的微凸起上重叠另一个半导体芯片的微凸起，从而将半导体芯片叠层三片以上；接合工序，通过将微凸起加热使其熔融，经由该微凸起将半导体芯片彼此接合，在叠层工序中，在一个半导体芯片和另一个半导体芯片中的至少一个微凸起上形成平滑面，一个微凸起在平滑面上与另一个微凸起接触。
在该半导体封装件的制造方法中，在叠层工序中，在一个半导体芯片和另一个半导体芯片中的至少一个微凸起上形成平滑面，一个微凸起通过平滑面与另一个微凸起接触。这样，通过利用平滑面使相互的微凸起重合，从而能够将一个半导体芯片和另一个半导体芯片位置精度高地叠层。由此，即使在将三片以上的多个半导体芯片叠层的情况下，也能够以相互的半导体芯片之间的位置精度高的状态进行叠层。通过在这样的状态下进行接合工序，从而能够将半导体芯片和半导体芯片位置精度高地接合。
在叠层工序中，对于所有的半导体芯片，使相互的微凸起在未接合的状态下重合，在接合工序中，通过一次的加热使所有的微凸起一并熔融，将所有的半导体芯片一并接合。由此，能够防止微凸起一次熔融而接合的接合部被反复加热。因此，能够防止接合部的强度降低。
也可以是，一个半导体芯片的微凸起、及另一个半导体芯片的微凸起均包含Sn，在接合工序中，在还原气氛内使一个半导体芯片的微凸起以及另一个半导体芯片的微凸起熔融。由此，形成于相互的微凸起的表面的氧化膜被还原而除去。另外，因为相互的微凸起含有Sn，所以伴随熔融而相互混合并一体化。随之，通过液化了的微凸起的表面张力的作用来修正一个半导体芯片和另一个半导体芯片之间的错位(自调整效果)。
也可以是，平滑面形成工序具备加热工序，在惰性气氛内使还原性气体流入配置有半导体芯片的空间，以微凸起的熔点以上的温度进行加热，在加热工序中，可以在微凸起上载置压力赋予部件。在加热工序中，在惰性气氛内使还原性气体流入配置有半导体芯片的空间而进行加热。由此，形成于微凸起的表面的氧化膜被还原而被除去。另外，在加热工序中，通过以微凸起的熔点以上的温度进行加热，微凸起熔融而具有流动性。在此，在加热工序中，在微凸起上载置有压力赋予部件。因此，伴随微凸起熔融而具有流动性，通过压力赋予部件的压力，微凸起以压溃的方式变形。通过该变形，在微凸起内产生流动，空隙在微凸起内流动。由此，在微凸起内流动的空隙从该微凸起内被排出到外部。进而，熔融的微凸起内、被压力赋予部件按压的部分伴随该压力赋予部件的形状而形成为平滑面。
根据本发明，能够提供一种可以将半导体芯片和半导体芯片位置精度高地接合的半导体封装件的制造方法。
附图说明
图1是表示半导体封装件的一个实施方式的概略截面图。
图2是表示半导体封装件的制造方法的步骤的流程图。
图3A及图3B是表示叠层有半导体芯片的情况的概略截面图。
图4A是表示叠层有半导体芯片的情况的概略截面图，图4B是表示将半导体芯片彼此接合的情况的概略截面图。
图5是表示实行平滑面形成工序之前的微凸起、及实行平滑面形成工序之后的微凸起的概略截面图。
图6是表示平滑面形成工序(空隙除去工序)的步骤的流程图。
图7A～图7G是表示平滑面形成工序(空隙除去工序)的步骤的概略截面图。
图8A～图8G是表示变形例的平滑面形成工序(空隙除去工序)的步骤的概略截面图。
图9是表示加热炉内的温度和压力的曲线图的图表。
图10是表示实施例及比较例的试验结果的表。
符号说明
1……半导体芯片、2……叠层体、11……基板、12……导电部、13……微凸起、13a……平滑面、21……压力赋予部件、22……空隙、23……氧化膜、26……衬垫。
具体实施方式
以下，参照附图详细说明本发明的一个方面的半导体封装件的制造方法的优选实施方式。此外，在以下的说明中，对同一要素或具有同一功能的要素使用同一符号，并省略重复的说明。
图1是表示半导体封装件的一个实施方式的概略截面图。如图1所示，半导体封装件100具备将三片以上(在此为三片)的半导体芯片1叠层而构成的叠层体2、经由焊锡球3与叠层体2电连接的有机基板4、通过由模制树脂覆盖安装于有机基板4上的叠层体2而形成的模制部6。此外，模制部6的内部空间以填埋叠层体2的半导体芯片1之间的方式被填充有底部填充材料7。在本实施方式中，叠层体2通过将半导体芯片1A、半导体芯片1B、及半导体芯片1C在上下方向上叠层而构成。半导体芯片1A和半导体芯片1B经由通过使微凸起熔融而接合的接合部8进行接合。半导体芯片1C和半导体芯片1B经由通过使微凸起熔融而接合的接合部8进行接合。
例如，如图4A所示，接合前的半导体芯片1具有基板11、形成于基板11上的导电部12、形成于导电部12的微凸起13。基板11由例如硅(Si)芯片等半导体芯片、硅(Si)插入件等构成。此外，在半导体芯片1A及半导体芯片1C上，仅在一个主面上形成有导电部12。在半导体芯片1B上，在两个主面上形成有导电部12。另外，形成于半导体芯片1B的两个主面上的导电部12经由沿基板11的厚度方向延伸的通孔电极19而相互连接。
导电部12在基板11的主面上形成有多个。导电部12以规定的间距在基板11的主面上排列。导电部12具备形成于基板11的主面上的电极焊盘14、和形成于电极焊盘14的上表面的势垒金属层16。此外，基板11的主面中、未形成导电部12的部分由绝缘层17覆盖(参照图5)。作为势垒金属层16的构成材料，可使用例如Ni及Ni化合物(例如NiP)等。作为绝缘层17的构成材料，可使用例如SiO、SiN、聚酰亚胺等。
微凸起13形成于导电部12的势垒金属层16上。微凸起13可以含有Sn、Ag、Cu、Ag-Cu、Bi、In等作为构成材料，也可以使用这些中的任意两个以上的材料得到的合金。特别是，微凸起13也可以含有Sn作为主成分。微凸起13例如也可以通过镀敷法来形成。或者，微凸起13可以通过使用由焊锡合金构成的微小球而形成，也可以印刷膏体而形成。此外，将从上观察时的直径小于50μm的凸起称作微凸起。
如图5所示，微凸起13在刚刚形成于基板11上之后具有球面。通过对这种微凸起13实施规定的处理，从而在微凸起13上形成平滑面13a。平滑面13a由在微凸起13的上端部沿水平方向扩展的平面构成。此外，后面会叙述作为用于形成平滑面13a的处理内容的一例。微凸起13的高度、即平滑面13a和导电部12的上表面之间的尺寸可以在5～50μm的范围内设定。
接下来，参照图2～图9说明本实施方式的半导体封装件100的制造方法。
如图2所示，首先，实行通过在基板11上形成微凸起13而准备半导体芯片1的半导体芯片准备工序(步骤S1)。由此，准备半导体芯片1A、1B、1C。但是，在该阶段，在微凸起13上未形成平滑面13a。
接下来，实行在微凸起13上形成平滑面13a的平滑面形成工序(步骤S2)。另外，平滑面形成工序S2也相当于从微凸起13的内部除去空隙22的空隙除去工序。
在此，参照图6说明平滑面形成工序(空隙除去工序)S2的详细的内容。
如图6及图7A所示，实行相对于微凸起13设置压力赋予部件21的压力赋予部件设置工序(步骤S20)。这样，在载置了压力赋予部件21的状态下，将半导体芯片1配置到加热炉的内部。此外，在以后的说明中，适宜参照图9所示的加热炉内的温度和压力的曲线图进行说明。此外，图9中，实线表示加热炉内的温度，虚线表示加热炉内的压力。
作为载置于微凸起13上的压力赋予部件21的构成材料，优选采用不与微凸起13发生反应的材料。例如，作为压力赋予部件21的构成材料，可采用Si、SiO2、SiN等。另外，压力赋予部件21的主面中、与微凸起13相接的主面21a优选作为平面构成。例如，在主面21a上形成有突起等的情况下，因为与微凸起13钩挂，所以在除去压力赋予部件21时不易脱落。压力赋予部件21对微凸起13赋予的压力优选仅为压力赋予部件21自身的自重。具体而言，压力优选为每单位微凸起的截面积为0.0005μg/μm2以上且0.1μg/μm2以下。例如，如果通过倒装片安装那样的方法来控制压力赋予部件21产生的压力、或高度，则在微凸起13从固体向液体变化时(从图7B向图7C变化时)作用于压力赋予部件21的压力降低，因此，在压力赋予部件21的位置产生错位。会对如微凸起13那样小的凸起以极小的错位过剩地作用压力。
接下来，实行将配置了半导体芯片1的加热炉的空间减压的减压工序(步骤S21)。在减压工序S21中，将加热炉内抽真空，形成减压气氛。残留于加热炉内的氧成为使微凸起13氧化的原因。因此，优选将加热炉内排气至大气压状态(1.01×105Pa～1×103Pa以下，特别是5Pa以下)的减压状态。由此，加热炉内的压力降低(参照图9的图表P1的部分)。向这种减压气氛的加热炉内导入惰性气体。由此，加热炉内的压力上升(参照图9的图表P2的部分)。惰性气体在使加热炉内上升至微凸起13的熔融温度以上(熔点以上)的温度域时，防止微凸起13表面的进一步的氧化，并实现微凸起13的熔融，作为加热炉内的热媒介起作用。作为这种惰性气体，可以使用例如氮(N2)气或氩(Ar)气等。
接下来，实行在惰性气氛内对加热炉流入还原性气体，并以微凸起13的熔点以上的温度加热的加热工序(步骤S22)。加热工序S22是在向加热炉内导入了惰性气体之后、或者与导入惰性气体大致同时实行。在加热工序S22中，以规定的升温速度(例如35～45℃/分钟)将加热炉内升温，使导入了惰性气体的状态的加热炉内的温度上升至微凸起13的熔点以上的温度域。例如，在由Sn-Ag-Cu合金构成凸起的情况下，熔点虽然根据合金的组成而不同，但大致为220～230℃，因此，使加热炉内的温度上升至这种温度以上的温度域。
还原性气体的导入优选在氧化膜23开始还原反应的温度的前后实施。一边将加热炉内的温度(图9的温度T1)维持在开始还原反应的温度以上，一边继续供给适宜的温度和流量的还原性气体。由此，能够将存在于微凸起13的表面的氧化膜23还原除去。作为还原性气体，例如可以应用羧酸(甲酸)。作为羧酸的例子，可举出甲酸、乙酸、丙烯酸、丙酸等低级羧酸。在使用甲酸作为还原气体的情况下，优选在加热炉内的温度成为110℃左右时导入甲酸。即使在开始还原反应的温度以下导入甲酸，反应也不进行，而如果温度过高，由于是在残留着表面的氧化膜23的状态下加热微凸起13，因此，空隙22内部的压力上升。当在空隙22的内部的压力过量提高的状态下除去氧化膜23时，空隙22的压力被一次性释放，液化了的微凸起13也可能会飞散。因此，也可以在开始还原反应的温度T1下维持规定时间，在氧化膜23被充分除去的阶段将加热炉的温度维持在微凸起13的熔点以上的温度T2(参照图9)。
一旦微凸起13熔融，空隙22被除去，并形成了平滑面13a，则实行将加热炉的温度降温的降温工序(步骤S23)。具体而言，在被维持在微凸起13的熔融温度以上的温度T2的加热炉内将微凸起13暴露在甲酸中规定时间(例如0.5～3分钟)后，将导入到加热炉内的甲酸抽真空排出。在将加热炉内的甲酸排气后、或者进行甲酸的排气的同时，以规定的降温速度(例如-5～-40℃/分钟)将加热炉内降温。此外，图9中，在加热炉的温度下降之前进行抽真空。但是，即使加热炉内的温度降温至熔融的凸起以某种程度固化的温度域，也可以向加热炉内导入氮气或氩气等惰性气体而恢复至大气压。
通过实行上述那样的加热工序S22及降温工序S23，如图7B～图7G所示，能从微凸起13中除去空隙22，并在微凸起13上形成平滑面13a。即，通过在还原性气体的气氛内进行加热，从而可将形成于微凸起13的表面的氧化膜23还原而除去(参照图7B)。而且，通过以微凸起13的熔点以上的温度进行加热，微凸起13会熔融。由此，通过压力赋予部件21的压力，微凸起13以压溃的方式变形。由此，根据压力赋予部件21的主面21a的形状，在微凸起13形成与平滑面13a相对应的形状(参照图7C～图7F)。另外，通过将熔融的微凸起13向压力赋予部件21按压而流动，从而微凸起13内的空隙22上升，被排出到外部(参照图7C～图7F)。通过加热炉的温度恢复，微凸起13被冷却而固化。由此，在微凸起13上形成平滑面13a(参照图7G)。
返回图2，对于各半导体芯片1的平滑面形成工序S2结束后，实行在一个半导体芯片1的微凸起13上重叠另一个半导体芯片1的微凸起13，由此能够实行叠层三片以上的半导体芯片1的叠层工序(步骤S3)。在本实施方式中，在叠层工序S3中，在一个半导体芯片1和另一个半导体芯片1的微凸起13上形成有平滑面13a。而且，一个半导体芯片1的微凸起13以平滑面13a与另一微凸起13相接触。在叠层工序S3中，对于所有的半导体芯片1，以彼此的微凸起13不接合的状态进行重合。
具体而言，如图3A及图3B所示，在最下的半导体芯片1C的微凸起13上重叠半导体芯片1B的微凸起13。此时，在半导体芯片1C的微凸起13的平滑面13a上载置半导体芯片1B的微凸起13的平滑面13a。另外，半导体芯片1C的微凸起13和半导体芯片1B的微凸起13为彼此不接合而只是简单接触的状态。
接下来，如图3B及图4A所示，在从下数第二个半导体芯片1B的微凸起13上重叠最上的半导体芯片1C的微凸起13。此时，在半导体芯片1B的微凸起13的平滑面13a上载置半导体芯片1C的微凸起13的平滑面13a。另外，半导体芯片1B的微凸起13和半导体芯片1C的微凸起13为彼此不接合而只是简单接触的状态。
叠层工序S3结束后，实行通过加热微凸起13使其熔融，经由该微凸起13将半导体芯片1彼此接合的接合工序(步骤S4)。在接合工序S4中，通过一次的加热将所有的微凸起13一并熔融，将所有的半导体芯片1一并接合。另外，在接合工序S4中，在还原气氛内使各半导体芯片1的微凸起13熔融。
具体而言，如图4A所示，将经由微凸起13叠层了半导体芯片1A、1B、1C的状态的叠层体配置于加热炉内。然后，通过用加热炉加热该叠层体，叠层体内的所有的微凸起13熔融，并且彼此接触的微凸起13被一并接合。由此，如图4B所示，半导体芯片1A、1B、1C经由两个微凸起13熔融而相互结合的接合部8接合。
在接合工序S4结束后，实行制作半导体封装件100的半导体封装件制作工序(步骤S5)。在半导体封装件制作工序S5中，将在接合工序S5得到的叠层体2与有机基板4连接，同时，由模制部6覆盖叠层体2。如上，完成半导体封装件100，图2所示的制造方法结束。
接着，对本实施方式的半导体封装件100的制造方法的作用及效果进行说明。
在半导体封装件100的制造方法中，在加热工序S22中，在惰性气氛内使还原性气体流入配置有半导体芯片1的空间而进行加热。由此，形成于微凸起13的表面的氧化膜23被还原而除去。另外，通过以微凸起13的熔点以上的温度进行加热，微凸起13熔融，由此具有流动性。在此，在加热工序S22中，在微凸起13上载置压力赋予部件21。因此，伴随微凸起13熔融而具有流动性，微凸起13因压力赋予部件21的压力而以压溃的方式变形。通过该变形，在微凸起13内产生流动，空隙22在微凸起13内流动。由此，在微凸起13内流动的空隙22从该微凸起13内排出到外部而被除去。如上，能够容易地除去微凸起13内的空隙22。
作为还原性气体，也可以应用羧酸。由此，能够良好地除去微凸起13表面的氧化膜23。
就压力赋予部件21的重量而言，在微凸起13的每单位截面积，也可以为0.0005μg/μm2以上且0.1μg/μm2以下。由此，压力赋予部件21能够对微凸起13赋予用于除去空隙22的适宜的压力。
在半导体封装件100的制造方法中，在叠层工序S3中，在一个半导体芯片1和另一个半导体芯片1中的至少一个微凸起13上形成平滑面13a，一个微凸起13以平滑面13a与另一个微凸起13接触。这样，通过利用平滑面13a使相互的微凸起13重合，从而能够将一个半导体芯片1和另一个半导体芯片1位置高精度地叠层。由此，即使在将三片以上的多个半导体芯片1叠层的情况下，也能够以相互的半导体芯片1之间的位置精度高的状态进行叠层。通过在这样的状态下实行接合工序S4，能够将半导体芯片1和半导体芯片1位置精度高地接合。
在叠层工序S3中，对于所有的半导体芯片1，将相互的微凸起13以不接合的状态重合，在接合工序S4中，也可以通过一次的加热使所有的微凸起13一并熔融，将所有的半导体芯片1一并接合。由此，能够防止微凸起13一次熔融而接合的接合部8被重复加热。因此，能够防止接合部8的强度降低。
一个半导体芯片1的微凸起13、及另一个半导体芯片1的微凸起13均含有Sn，在接合工序S4中，也可以在还原气氛内使一个半导体芯片1的微凸起13、及另一个半导体芯片1的微凸起13熔融。由此，形成于相互的微凸起13的表面的氧化膜23被还原而除去。另外，因为相互的微凸起13含有Sn，所以伴随熔融而相互混合并一体化。随之，通过液化的微凸起13的表面张力的作用，修正一个半导体芯片1和另一个半导体芯片1之间的错位(自调整效果)。
平滑面形成工序S2具备在惰性气氛内使还原性气体流入配置有半导体芯片1的空间，并通过以微凸起13的熔点以上的温度进行加热而除去微凸起13的表面的氧化膜23的加热工序S22，在加热工序S22中，也可以在微凸起13上载置压力赋予部件21。在加热工序S22中，通过在惰性气氛内使还原性气体流入配置有半导体芯片1的空间，以微凸起13的熔点以上的温度进行加热，从而除去了微凸起13的表面的氧化膜23。由此，在形成于微凸起13的表面的氧化膜23被还原而被除去的同时，该微凸起13熔融，从而具有流动性。在此，在加热工序S22中，在微凸起13上载置有压力赋予部件21。因此，伴随微凸起13熔融而具有流动性，微凸起13因压力赋予部件21的压力而以压溃的方式变形。通过该变形，在微凸起13内产生流动，空隙22在微凸起13内流动。由此，在微凸起13内流动的空隙22从该微凸起13内排出到外部而被除去。进一步，熔融的微凸起13内、被压力赋予部件21按压的部分伴随该压力赋予部件21的形状而作为平滑面13a形成。
本发明不限于上述的实施方式。
例如，如图8所示，在基板11上配置具有一定厚度的衬垫26，压力赋予部件21也可以被压入至与衬垫26接触。由此，因为通过衬垫26止挡压力赋予部件21，所以能够防止微凸起13过度压溃。例如，在加热前，在微凸起13的两侧配置衬垫26，在微凸起13上载置压力赋予部件21(参照图8A)。在该状态下用还原气氛加热，除去氧化膜(参照图8B)。而且，当使微凸起13熔融时，压力赋予部件21下降，与衬垫26的上表面接触(参照图8C)。由此，压力赋予部件21被衬垫26支撑，不会进一步下降。另一方面，在熔融的微凸起13内，因压力赋予部件21的影响而产生流动，空隙22上升而被除去(参照图8D～图8G)。
另外，在上述的实施方式中，下侧的半导体芯片1的微凸起13具有平滑面13a，上侧的半导体芯片1的微凸起13具有平滑面13a。因此，在下侧的微凸起13的平滑面13a上载置上侧的微凸起13的平滑面13a。但是，也可以仅在上侧的微凸起13和下侧的微凸起13的任一方形成平滑面13a，而在另一方不形成平滑面13a。
此外，在微凸起13的平滑面形成工序中，也可以利用任何方法形成平滑面13a。例如，也可以通过对微凸起13进行研磨，形成平滑面13a。但是，在通过研磨形成平滑面13a的情况下，可能会产生对微凸起13及导电部12作用力所致的损伤。另一方面，如上述的实施方式，在使用压力赋予部件21形成平滑面13a的情况下，能够抑制对微凸起13及导电部12的损伤。
[实施例]
接下来，对本发明的实施例进行说明。但是，本发明不限于以下的实施例。
(实施例1～4)
作为实施例1，制造了具有如下微凸起的半导体芯片。首先，通过电解镀敷法对基板进行了镀Cu、镀Ni、及镀Sn。将其配置于加热炉内之后，调整加热炉内的气氛压，调整向加热炉供给的氮或甲酸气的浓度及流量。由此，镀膜熔融，并制作了形成有微凸起的半导体芯片的样品。镀Cu层的高度为17μm，镀Ni层的高度为3μm，微凸起的高度为15μm，微凸起的直径为35μm。准备了该样品和压力赋予部件。压力赋予部件是具有SiO2膜的Si晶片。以SiO2面与微凸起相接的方式将Si晶片载置于微凸起上。就压力赋予部件的重量而言，每单位微凸起的截面积为0.0005μg/μm2。此外，未设置图8所示的那种衬垫。在将载置有压力赋予部件的状态的半导体芯片配置于加热炉内后，将加热炉内抽真空至5Pa以下。调整之后的加热炉内的气氛压，调整向加热炉供给的氮或甲酸气的浓度、及流量。具体而言，以升温速度45℃/min、预热195℃(6分钟)、最大260℃(1分钟)的条件进行了加热。微凸起对压力赋予部件赋予压力，形成了平滑面。准备具有这种微凸起的半导体芯片，将三片半导体芯片叠层并相互接合。此外，接合时的回流次数设为1次，在大气中进行了回流。以这样得到的半导体芯片的叠层体作为实施例1。
在将半导体芯片彼此接合时，以在氮及甲酸的气氛中进行了回流的情况作为实施例2。以将半导体芯片的叠层片数设为5片的情况作为实施例3。以将半导体芯片的叠层片数设为5片，并将半导体芯片彼此接合时，在氮及甲酸的气氛中进行回流的情况作为实施例4。实施例2～4的其它条件与实施例1完全相同。
(比较例1～7)
以将未形成平滑面的微凸起重合的情况作为比较例1。以将半导体芯片的叠层片数设为5片，并将未形成平滑面的微凸起重合的情况作为比较例2。比较例1、2的其它条件与实施例1完全相同。
(评价)
为了评价微凸起的搭载精度，在将第三片半导体芯片重叠时，测定了第一片和第二片半导体芯片的微凸起的中心的错位。对于实施例1～4及比较例1、2中的、错位小于5μm的情况，在图10的“叠层精度”上表示“○”，对于错位为5μm以上的情况，在图10的“叠层精度”上表示“×”。为了测定微凸起的剥离模式，将接合后的基板和基板剥离。对于实施例1～4及比较例1、2中的、在微凸起的内部破断的情况，在图10的“凸起剥离模式”上表示“○”，对于在微凸起和镀Ni层的界面剥离、或产生裂纹的情况，在图10的“凸起剥离模式”上表示“×”。为了进行接合精度的评价，测定熔融接合后的微凸起的中心的偏移。对于实施例1～4及比较例1、2中的、偏移小于5μm的情况，在图10的“接合精度”上表示“○”，对于偏移为5μm以上且10μm以下的情况，在图10的“接合精度”上表示“Δ”，对于偏移大于10μm的情况，在图10的“接合精度”上表示“×”。
比较例1中，在将第三片芯片重叠时，之下的芯片会偏移。即，确认到比较例1中叠层精度低，因此接合精度也降低。在比较例2中，通过一片一片地接合，叠层的精度、接合精度也提高。但是，在比较例2中确认到，通过重复回流，Ni和Sn的合金层生长，接合部的强度会降低。在实施例1中确认到，因为微凸起具有平滑面，所以在重叠时偏移少，接合精度也得以提高。在实施例2中确认到，通过在还原气氛内进行回流，将氧化膜除去，并通过熔融的Sn的表面张力带来的自调整的效果，接合精度进一步提高。在实施例3、4中，因为将回流次数进行一次，所以接合部的强度降低少。

Claims (4)

1.一种半导体封装件的制造方法，其中，
所述半导体封装件是具有基板、形成于所述基板上的导电部和形成于所述导电部的微凸起的半导体芯片叠层多片得到的半导体封装件，
所述制造方法具备：
平滑面形成工序，在所述微凸起上形成平滑面；
叠层工序，通过在一个所述半导体芯片的所述微凸起上重叠另一个所述半导体芯片的所述微凸起，从而将所述半导体芯片叠层三片以上；
接合工序，通过将所述微凸起加热使其熔融，经由该微凸起将所述半导体芯片彼此接合，
在所述叠层工序中，在一个所述半导体芯片和另一个所述半导体芯片中的至少一个所述微凸起上形成所述平滑面，一个所述微凸起在所述平滑面上与另一个所述微凸起接触。
2.根据权利要求1所述的半导体封装件的制造方法，其中，
在所述叠层工序中，对于所有的所述半导体芯片，使相互的所述微凸起在未接合的状态下重合，
在所述接合工序中，通过一次的加热使所有的所述微凸起一并熔融，并将所有的所述半导体芯片一并接合。
3.根据权利要求1所述的半导体封装件的制造方法，其中，
一个所述半导体芯片的所述微凸起、以及另一个所述半导体芯片的所述微凸起均包含Sn，
在所述接合工序中，在还原气氛内使一个所述半导体芯片的所述微凸起以及另一个所述半导体芯片的所述微凸起熔融。
4.根据权利要求1所述的半导体封装件的制造方法，其中，
所述平滑面形成工序具备加热工序：对配置有所述半导体芯片的空间在惰性气氛内使还原性气体流入，并以所述微凸起的熔点以上的温度进行加热，
在所述加热工序中，在所述微凸起上载置压力赋予部件。
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