CN104599711B - Embedded storage chip, EMBEDDED AVIONICS and its programme upgrade method - Google Patents
Embedded storage chip, EMBEDDED AVIONICS and its programme upgrade method Download PDFInfo
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- CN104599711B CN104599711B CN201510022880.7A CN201510022880A CN104599711B CN 104599711 B CN104599711 B CN 104599711B CN 201510022880 A CN201510022880 A CN 201510022880A CN 104599711 B CN104599711 B CN 104599711B
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Abstract
The present invention relates to a kind of embedded storage chip, including body, the first interface contact being arranged on body, intrinsic control integrated-circuit die and Nand Flash storage integrated-circuit die is encapsulated in, the Nand Flash storage integrated-circuit dies and first interface contact electrically connect with control integrated-circuit die respectively；The control integrated-circuit die is provided with SPI interface, SPI interface contact is additionally provided with the body, the SPI interface contact electrically connects with the SPI interface, including at least 6 power line, ground wire, DOL Data Output Line, Data In-Line, chip select line, clock line contacts.Above-mentioned embedded storage chip, SPI interface is set up on control integrated-circuit die, external electronic device code data required when can be started by SPI interface quick obtaining, so that external electronic device no longer needs to configure a SPI Nor Flash memory chip in addition, the production cost of external electronic device is reduced.
Description
Technical field
The present invention relates to storage device, more particularly to a kind of embedded storage chip, EMBEDDED AVIONICS and its journey
Sequence upgrade method.
Background technology
Existing EMBEDDED AVIONICS such as intelligent watch, Intelligent bracelet etc., function is more and more, but accommodates internal circuit
Space truly have limit, and product, increasingly towards lightening, the direction of miniaturization is developed, therefore to the integrated level of embedded chip
It is required that more and more higher, and existing embedded storage chip is when in use, is required for still further configuring a SPI Nor Flash
Memory chip starts the programs such as code to store some, so, due to embedded storage chip and SPI Nor Flash internal memories
Chip is required for occupying certain area on a printed circuit, therefore the further miniaturization to electronic product causes limit
System.And because the EMBEDDED AVIONICSs such as the intelligent watch, Intelligent bracelet need to use two kinds of storage chips, it is inevitable also to push away
The cost of the high EMBEDDED AVIONICS.
The content of the invention
Based on this, it is necessary to further minimized to EMBEDDED AVIONICS for existing embedded storage chip structure
The problem of causing limitation, there is provided a new embedded storage chip.
In addition, it there is a need to the program liter that a kind of new EMBEDDED AVIONICS and the EMBEDDED AVIONICS are provided
Level method.
A kind of embedded storage chip, including body, it is encapsulated in intrinsic control integrated-circuit die and NandFlash
Store integrated-circuit die, and the first interface contact being arranged on body, the control integrated-circuit die is provided with the
One interface, the Nand Flash storage integrated-circuit dies electrically connect with the control integrated-circuit die, and described first connects
Mouth connects to be electrically connected with the first interface, and the embedded storage chip also includes the second interface contact being arranged on body,
The control integrated-circuit die is additionally provided with second interface, and the second interface contact electrically connects with the second interface, institute
It is SPI interface to state second interface, and the second interface contact is SPI interface contact, and the second interface contact comprises at least electricity
6 source line, ground wire, DOL Data Output Line, Data In-Line, chip select line, clock line contacts；The integrated electricity of Nand Flash storages
Road crystal grain marks off the memory space that a part of memory space starts code as external electronic device；The control integrated circuit
Crystal grain includes being used to support the SPI interface support module of SPI interface communication protocol and for quick response external electronic device
The quick response module of data required for it starts is obtained from SPI interface.
In a specific embodiment, the quick response module includes being used to analyze external electronic device operation platform
Platform Analysis unit and for according to the external electronic device operation platform confirm external electronic device start when it is each
Code data when walking required code data, and the external electronic device being started needed for next step is in advance from described
The pre- memory cell of code for reading and being cached in control integrated-circuit die internal memory in Nand Flash storage integrated-circuit dies.
In a specific embodiment, the second interface contact also includes state maintaining line contact and write-protect line
Contact.
In a specific embodiment, the first interface is SD interface, and the first interface contact connects for SD interface
Point, the first interface contact comprise at least power line, ground wire, data wire 0, data wire 1, data wire 2, data wire 3, clock
Eight line, order wire contacts.
In a specific embodiment, the first interface is USB interface, and the first interface contact is USB interface
Contact, the first interface contact comprise at least four power line, ground wire, correction data line, negative data line contacts.
In a specific embodiment, the first interface is eMMC interfaces, and the first interface contact connects for eMMC
Mouthful contact, the first interface contact comprise at least power line 1, power line 2, ground wire, clock line, order wire, reset line, 8
14 contacts of data wire.
In a specific embodiment, 30 contacts are provided with the body of the embedded storage chip, except first
Outside interface contact and second interface contact, in addition to core power line contact and the power cord point of reservation, remaining contact are
Temporarily without using stick contact.
In a specific embodiment, the size of the embedded storage chip length is 8mm*8mm*0.8mm,
The tolerance dimension of length and width is positive and negative 0.1mm, and high tolerance dimension is positive and negative 0.01mm.
In a specific embodiment, the size of the embedded storage chip length is 8mm*7.5mm*
0.8mm, the tolerance dimension of length and width is positive and negative 0.1mm, and high tolerance dimension is positive and negative 0.01mm.
In a specific embodiment, 30 contacts are uniform between two parties in the body surface in the way of 5 rows 6 arrange
Distribution, the contact are circular pad contact either spherical contact or dome shaped contact, radius 0.6mm, wherein the 1st row connect
O'clock it is 6mm to the distance of the 6th row contact, the distance of the 1st row contact to the 5th row contact is 4.8mm, the distance of two neighboring contact
For 1.2mm.
A kind of EMBEDDED AVIONICS, including embedded storage chip described above.
A kind of programme upgrade method of EMBEDDED AVIONICS, the EMBEDDED AVIONICS include described above embedded
Storage chip, methods described comprise the following steps：ROMPaq is copied to NandFlash storages integrated electricity by first interface
The memory space that road crystal grain provides, upgrading.
The programme upgrade method of above-mentioned embedded storage chip, EMBEDDED AVIONICS and EMBEDDED AVIONICS, lead to
Cross and a SPI interface is set on control integrated-circuit die, and mark off the portion of Nand Flash storage integrated-circuit dies
Memory space is divided to be used for the startup code for storing external electronic device, by the Platform Analysis unit point for controlling integrated-circuit die
The platform of external electronic device operation is analysed, so that it is determined that external electronic device each step needs the code data loaded when starting,
And code data when external electronic device is started in advance needed for next step is stored in integrated-circuit die from Nand Flash
Read and be cached in the internal memory of control integrated-circuit die, so as to ensure to control integrated-circuit die can be outside quick response
Electronic equipment from SPI interface obtain its startup when required data so that external electronic device only needs to use an insertion
Formula storage chip, various store functions are can be achieved with, so as to reduce the area of external electronic device printed circuit board (PCB) occupancy, be easy to
The miniaturization of external electronic device；Meanwhile it is not required to using embedded electronic chip provided by the invention, the external electronic device
A SPI Nor Flash memory chip is additionally used again, so as to further reduce the hardware of external electronic device
Cost；Further, because the embedded storage chip possesses first interface, therefore the embedded storage chip is used
External electronic device, the Nand Flash to can be copied ROMPaq by first interface and store integrated-circuit die
The memory space of offer, copy upgrading is carried out, the side upgraded relative to traditional SPI Nor Flash memory chips by burning
Formula, greatly facilitate the use of domestic consumer.
Brief description of the drawings
Fig. 1 is the electrical block diagram of embedded storage chip in one embodiment；
Fig. 2 is the pad distribution schematic diagram of embedded storage chip in one embodiment；
Fig. 3 is the composition schematic diagram for controlling integrated-circuit die in one embodiment in embedded storage chip；
Fig. 4 is the physical dimension schematic diagram of embedded storage chip in one embodiment.
Embodiment
In order to make the purpose , technical scheme and advantage of the present invention be clearer, it is right below in conjunction with drawings and Examples
The present invention is further elaborated.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, and
It is not used in the restriction present invention.
Fig. 1 is the electrical block diagram of embedded storage chip in one embodiment；Fig. 2 is embedded in one embodiment
The pad distribution schematic diagram of formula storage chip.As depicted in figs. 1 and 2, the embedded storage chip 10, including body 105, encapsulation
Control integrated-circuit die 101 and Nand Flash storage integrated-circuit dies 102 in body 105, and it is arranged on this
First interface contact 103 on body, the control integrated-circuit die 101 are provided with first interface, and the Nand Flash are deposited
Storage integrated-circuit die 102 electrically connects 101 with the control integrated-circuit die, the first interface contact 103 and described the
One interface electrically connects, and the embedded storage chip 10 also includes the second interface contact 104 being arranged on the body 105,
The control integrated-circuit die 101 is additionally provided with second interface, the second interface contact and second interface electrical connection,
The second interface is SPI interface, and the second interface contact 104 is SPI interface contact, the second interface contact 104 to
Include power line (SPI-VCC), ground wire (GND), DOL Data Output Line (SPI-DO), Data In-Line (SPI-DI), chip select line less
(SPI-CS), 6 contacts of clock line (SPI-CLK).
The Nand Flash storages integrated-circuit die 102 marks off a part of memory space as external electronic device
Start the memory space of code.
In the present invention, the external electronic device refers to that embedded electronic of intelligent watch, Intelligent bracelet, tablet personal computer
Equipment.
Specifically, as shown in figure 3, the control integrated-circuit die 101 includes being used to support SPI interface communication protocol
SPI interface support module 1011, and obtain data required for it starts from SPI interface for quick response external electronic device
Quick response module 1012.
The quick response module 1012 includes being used for the Platform Analysis unit for analyzing external electronic device operation platform
1012a, and each step institute during for determining that the external electronic device starts according to the external electronic device operation platform
The code data and code data when external electronic device is started needed for next step needed is deposited from the Nand Flash in advance
The pre- memory cell of code for reading and being cached in the internal memory of control integrated-circuit die 101 in storage integrated-circuit die 102
1012b.By Platform Analysis unit 1012a and the pre- memory cell 1012b of code setting, can ensure to control integrated-circuit die
101 quick response external electronic devices obtain its code data required for starting from SPI interface.
Specifically, internal memory of the size of the startup code data cached every time according to the control integrated-circuit die 101
Size determine, the caching codes of 8k sizes can be such as cached every time, when the code data of the 8k sizes of caching is read from internal memory
After going out, the startup code data of next 8k sizes is then cached.
In a specific embodiment, as shown in Fig. 2 the second interface contact 104 also connects including state maintaining line
Point (SPI-HOLD) and write-protect line contact (SPI-WP).
In a specific embodiment, as shown in Fig. 2 the first interface is SD interface, the first interface contact
103 be SD interface contact, and the first interface contact 103 comprises at least power line (VCCSD), ground wire (GND), data wire 0
(SDD0), data wire 1 (SDD1), data wire 2 (SDD2), data wire 3 (SDD3), clock line (SDCLK), order wire (SDCMD)
Eight contacts.
In a specific embodiment, not shown in figure, the first interface is USB interface, and the first interface connects
Point 103 is USB interface contact, and the first interface contact 103 comprises at least power line, ground wire, correction data line, negative data line four
Individual contact.
In a specific embodiment, not shown in figure, the first interface is eMMC interfaces, and the first interface connects
Point 103 is eMMC interface contacts, and the first interface contact 103 comprises at least power line 1, power line 2, ground wire, clock line, life
Make line, reset line, 8 data wires, 14 contacts.
In a specific embodiment, as shown in Fig. 2 being provided with the body 105 of the embedded storage chip 10
30 contacts, in addition to first interface contact 103 and second interface contact 104, in addition to core power line contact (VDDK) and
The power cord point (VCCS) of reservation, remaining contact for temporarily without using stick contact (DNU).
In a specific embodiment, as shown in figure 4, the size of the embedded storage chip length is 8mm*
8mm*0.8mm(mm：Millimeter millimeters), the tolerance dimension of length and width is positive and negative 0.1mm, and high tolerance dimension is positive and negative
0.01mm.Certain embedded storage chip can also be other sizes, herein not limiting the present invention.
In a specific embodiment, as shown in figure 4,30 contacts by 5 rows 6 arrange in the way of in described body surface
Face is uniformly distributed between two parties, and the contact is circular pad contact either spherical contact or dome shaped contact, radius 0.6mm,
The distance of wherein the 1st row contact to the 6th row contact is 6mm, and the distance of the 1st row contact to the 5th row contact is 4.8mm, adjacent two
The distance of individual contact is 1.2mm.Certainly, the contact can also be other shapes, herein not limiting the present invention.
In another specific embodiment, the size of the embedded storage chip length can also be 8mm*
7.5mm*0.8mm, the tolerance dimension of length and width is positive and negative 0.1mm, and high tolerance dimension is positive and negative 0.01mm.
Above-mentioned embedded storage chip, by setting a SPI interface on control integrated-circuit die, and mark off
The part memory space of Nand Flash storage integrated-circuit dies is used for the startup code for storing external electronic device, passes through control
The platform of the Platform Analysis element analysis external electronic device operation of integrated-circuit die processed, so that it is determined that external electronic device is every
The code data when code data that loads is needed when one step starts, and in advance starting external electronic device needed for next step from
Read and be cached in the internal memory of control integrated-circuit die in Nand Flash storage integrated-circuit dies, so as to ensure to control
Integrated-circuit die can quick response external electronic device from SPI interface obtain its startup when required data so that it is outer
Portion's electronic equipment only needs to use an embedded storage chip, can be achieved with various store functions, so as to reduce external electrical
The area that equipment printed circuit board (PCB) takes, is easy to the miniaturization of external electronic device；Meanwhile using provided by the invention embedded
Electronic chip, the external electronic device need not additionally use a SPI Nor Flash memory chip again, so as to enter
The hardware cost of the reduction external electronic device of one step；Further, connect because the embedded storage chip possesses first
Mouthful, therefore using the external electronic device of the embedded storage chip, can be copied to ROMPaq by first interface
The memory space that the Nand Flash storages integrated-circuit die provides, carries out copy upgrading, relative to traditional SPI Nor
Flash memory chip greatly facilitates the use of domestic consumer by way of burning upgrading.
The present invention also provides a kind of EMBEDDED AVIONICS, and the EMBEDDED AVIONICS includes described above embedded
Storage chip.
EMBEDDED AVIONICS provided by the invention, due to a SPI Nor Flash storage need not be separately configured again
Chip, its hardware cost can not only be substantially reduced, additionally it is possible to easily facilitate the Miniaturization Design of its structure.
The present invention also provides a kind of programme upgrade method of EMBEDDED AVIONICS, more than the EMBEDDED AVIONICS includes
Described embedded storage chip, this method comprise the following steps：ROMPaq is copied to Nand by first interface
The memory space that Flash storage integrated-circuit dies provide, upgrading.
The programme upgrade method of EMBEDDED AVIONICS provided by the invention, by the way of copy upgrades, relative to biography
The mode of SPI Nor Flash memory chips of uniting burning upgrading, greatly facilitates the use of domestic consumer.
Embodiment described above only expresses the several embodiments of the present invention, and its description is more specific and detailed, but simultaneously
Therefore the limitation to the scope of the claims of the present invention can not be interpreted as.It should be pointed out that for one of ordinary skill in the art
For, without departing from the inventive concept of the premise, various modifications and improvements can be made, these belong to the guarantor of the present invention
Protect scope.Therefore, the protection domain of patent of the present invention should be determined by the appended claims.
Claims (9)
1. a kind of embedded storage chip, including body, it is encapsulated in intrinsic control integrated-circuit die and Nand Flash
Store integrated-circuit die, and the first interface contact being arranged on body, the control integrated-circuit die is provided with the
One interface, the Nand Flash storage integrated-circuit dies electrically connect with the control integrated-circuit die, and described first connects
Mouth contact electrically connects with the first interface, it is characterised in that the embedded storage chip also includes being arranged on body
Second interface contact, the control integrated-circuit die are additionally provided with second interface, the second interface contact and described second
Interface electrically connects, and the second interface is SPI interface, and the second interface contact is SPI interface contact, and the second interface connects
Point is including at least 6 power line, ground wire, DOL Data Output Line, Data In-Line, chip select line, clock line contacts；The Nand
Flash storage integrated-circuit dies mark off the memory space that a part of memory space starts code as external electronic device；
The control integrated-circuit die includes being used to support the SPI interface support module of SPI interface communication protocol and for quick
The quick response module of data required for response external electronic equipment from SPI interface acquisition；
The quick response module includes being used to analyze the Platform Analysis unit of external electronic device operation platform and for root
Code data when confirming that external electronic device starts according to the external electronic device operation platform required for each step, and by institute
State code data when external electronic device starts needed for next step and store integrated-circuit die from the Nand Flash in advance
The middle pre- memory cell of code for reading and being cached in control integrated-circuit die internal memory.
2. embedded storage chip according to claim 1, it is characterised in that the second interface contact also includes state
Keep line contact and write-protect line contact.
3. embedded storage chip according to claim 1, it is characterised in that the first interface is SD interface, described
First interface contact is SD interface contact, the first interface contact comprise at least power line, ground wire, data wire 0, data wire 1,
Eight data wire 2, data wire 3, clock line, order wire contacts；Or
The first interface is USB interface, and the first interface contact is USB interface contact, and the first interface contact is at least
Including four power line, ground wire, correction data line, negative data line contacts；Or
The first interface is eMMC interfaces, and the first interface contact is eMMC interface contacts, and the first interface contact is extremely
Include power line 1, power line 2, ground wire, clock line, order wire, reset line, 8 data wires, 14 contacts less.
4. according to the embedded storage chip described in claim any one of 1-3, it is characterised in that the embedded storage chip
Body on be provided with 30 contacts, in addition to first interface contact and second interface contact, in addition to core power line contact with
And retain power cord point, remaining contact for temporarily without using stick contact.
5. embedded storage chip according to claim 4, it is characterised in that the embedded storage chip length
Size be 8mm*8mm*0.8mm, the wherein tolerance dimension of length and width is positive and negative 0.1mm, and high tolerance dimension is positive and negative
0.01mm。
6. embedded storage chip according to claim 4, it is characterised in that the embedded storage chip length
Size be 8mm*7.5mm*0.8mm, the wherein tolerance dimension of length and width is positive and negative 0.1mm, and high tolerance dimension is positive and negative
0.01mm。
7. according to the embedded storage chip described in any one of claim 5 or 6, it is characterised in that 30 contacts press 5 rows
6 row modes be uniformly distributed between two parties in the body surface, the contact be circular pad contact be either spherical contact or
For dome shaped contact, radius 0.6mm, wherein the distance of the 1st row contact to the 6th row contact is 6mm, the 1st row contact to the 5th row
The distance of contact is 4.8mm, and the distance of two neighboring contact is 1.2mm.
8. a kind of EMBEDDED AVIONICS, it is characterised in that the EMBEDDED AVIONICS is included as any in claim 1-7
Embedded storage chip described in.
9. a kind of programme upgrade method of EMBEDDED AVIONICS, it is characterised in that the EMBEDDED AVIONICS is such as right
It is required that the EMBEDDED AVIONICS described in 8, methods described comprise the following steps：ROMPaq is copied to by first interface
The memory space that Nand Flash storage integrated-circuit dies provide, upgrading.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201510022880.7A CN104599711B (en) | 2015-01-16 | 2015-01-16 | Embedded storage chip, EMBEDDED AVIONICS and its programme upgrade method |
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| CN201510022880.7A CN104599711B (en) | 2015-01-16 | 2015-01-16 | Embedded storage chip, EMBEDDED AVIONICS and its programme upgrade method |
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Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108256269B (en) * | 2018-02-23 | 2022-06-28 | 晶晨半导体(上海)股份有限公司 | Processor chip and printed circuit board |
| CN113312071A (en) * | 2021-06-10 | 2021-08-27 | 山东英信计算机技术有限公司 | SSD device firmware upgrading method and related device |
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| US6088755A (en) * | 1997-06-04 | 2000-07-11 | Sony Corporation | External storage apparatus which can be connected to a plurality of electronic devices having different types of built-in interface without using a conversion adapter |
| CN201000623Y (en) * | 2007-01-16 | 2008-01-02 | 忆正存储技术(深圳)有限公司 | Dual-interface flash memory card |
| CN101814058A (en) * | 2010-03-17 | 2010-08-25 | 苏州国芯科技有限公司 | Commonly-used storing device |
| CN102662689A (en) * | 2012-03-15 | 2012-09-12 | 青岛海信传媒网络技术有限公司 | Method and system for upgrading embedded software based on USB interface |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP2624082B1 (en) * | 2012-01-31 | 2014-03-19 | Sick Ag | Mobile data storage |
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2015
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|---|---|---|---|---|
| US6088755A (en) * | 1997-06-04 | 2000-07-11 | Sony Corporation | External storage apparatus which can be connected to a plurality of electronic devices having different types of built-in interface without using a conversion adapter |
| CN201000623Y (en) * | 2007-01-16 | 2008-01-02 | 忆正存储技术(深圳)有限公司 | Dual-interface flash memory card |
| CN101814058A (en) * | 2010-03-17 | 2010-08-25 | 苏州国芯科技有限公司 | Commonly-used storing device |
| CN102662689A (en) * | 2012-03-15 | 2012-09-12 | 青岛海信传媒网络技术有限公司 | Method and system for upgrading embedded software based on USB interface |
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Address after: 518057 A, B, C, D, E, F1, 8 Building, Financial Services Technology Innovation Base, No. 8 Kefa Road, Nanshan District, Shenzhen City, Guangdong Province Patentee after: Shenzhen jiangbolong electronic Limited by Share Ltd Address before: 518057 A, B, C, D, E, F1, 8th floor, Kefa Road Financial Base, Nanshan District, Shenzhen City, Guangdong Province Patentee before: Shenzhen jiangbolong Electronic Co., Ltd. |