CN104112711A - 共平面型氧化物半导体tft基板的制作方法 - Google Patents
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- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
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Abstract
本发明提供一种共平面型氧化物半导体TFT基板的制作方法,包括:步骤1、提供基板(1);步骤2、形成栅极(2);步骤3、沉积栅极绝缘层(3);步骤4、在栅极绝缘层(3)上形成光阻层(4);步骤5、对光阻层(4)进行分区域曝光、显影,形成通孔(41)、数个凹陷部(42);步骤6、去除所述通孔(41)下方的栅极绝缘层(3);步骤7、去除光阻层(4)的数个凹陷部(42)下方的光阻层(4);步骤8、在栅极绝缘层(3)与剩余的光阻层(4’)上沉积第二金属层(5);步骤9、去除剩余的光阻层(4’)及沉积于其上的第二金属层(5),形成源/漏极(51);步骤10、沉积并图案化氧化物半导体层(6);步骤11、沉积并图案化保护层(7)。
Description
技术领域
本发明涉及显示技术领域,尤其涉及一种共平面型氧化物半导体TFT基板的制作方法。
背景技术
平面显示器件具有机身薄、省电、无辐射等众多优点,得到了广泛的应用。现有的平面显示器件主要包括液晶显示器件(Liquid Crystal Display,LCD)及有机电致发光显示器件(Organic Light Emitting Display,OLED)。
有机电致发光显示器件由于同时具备自发光,不需背光源、对比度高、厚度薄、视角广、反应速度快、可用于挠曲性面板、使用温度范围广、构造及制程较简单等优异特性,被认为是下一代平面显示器的新兴应用技术。
在OLED大尺寸面板生产中,氧化物半导体由于具有较高的电子迁移率,而且相比低温多晶硅(LTPS),氧化物半导体制程简单,与非晶硅制程相容性较高,且与高世代生产线兼容而得到了广泛的应用。
目前,氧化物半导体薄膜晶体管(TFT)基板的常用结构为具有蚀刻阻挡层(ESL)的结构,但该结构本身存在一些问题,如蚀刻均一性难以控制,需要多加一道光罩及光刻制程,栅极与源/漏极交叠,存储电容较大,难以达到高分辨率等。
相比于具有蚀刻阻挡层的结构,共平面型(Coplanar)氧化物半导体TFT基板结构更为合理,更具有量产前途。现有的共平面型氧化物半导体TFT基板的制作方法如图1至图5所示,包括如下步骤:
步骤1、在基板100上沉积第一金属层,并通过光刻制程使第一金属层图案化,形成栅极200;
步骤2、在基板100及栅极200上沉积栅极绝缘层300,并通过光刻制程使其图案化;
步骤3、在栅极绝缘层300上沉积第二金属层,并通过光刻制程使第二金属层图案化,形成源/漏极400;
步骤4、在源/漏极400上沉积并通过光刻制程图案化,形成氧化物半导体层500;
步骤5、在氧化物半导体层500及源/漏极400上沉积并通过光刻制程图案化,形成保护层600。
该共平面型氧化物半导体TFT基板的制作方法存在一定的弊端,主要表现在所述栅极200、栅极绝缘层300、源/漏极400、氧化物半导体层500、保护层600等每一层结构的形成均需要通过一道光刻制程,而每一道光刻制程包括成膜、黄光、蚀刻、剥离等制程工序,其中黄光制程又包括涂光刻胶、曝光、显影,且每一道黄光制程需要一光罩,造成工序流程较长,生产效率较低;所需的光罩数量较多,生产成本较高;而工序越多,累积的良率问题也越凸显。
发明内容
本发明的目的在于提供一种共平面型氧化物半导体TFT基板的制作方法,通过该方法能够减少黄光制程,缩短工序流程与产品生产周期、提高生产效率与产品良率,提升产品的竞争力,并减少所需的光罩数量,降低生产成本。
为实现上述目的,本发明提供一种共平面型氧化物半导体TFT基板的制作方法,包括如下步骤:
步骤1、提供一基板;
步骤2、在基板上沉积并图案化第一金属层,形成栅极;
步骤3、在栅极与基板上沉积栅极绝缘层,使该栅极绝缘层完全覆盖栅极与基板;
步骤4、在栅极绝缘层上形成一定厚度的光阻层;
步骤5、对光阻层进行分区域曝光、显影;
对光阻层对应欲形成于栅极绝缘层内的连通孔的区域进行全曝光,显影后形成通孔;对光阻层对应欲形成源/漏极的区域进行半曝光,显影后形成数个凹陷部;对光阻层的其余区域不进行曝光;
步骤6、通过蚀刻去除所述通孔下方的栅极绝缘层,形成栅极绝缘层内的连通孔,以露出连通孔下方的栅极;
步骤7、去除光阻层的数个凹陷部下方的光阻层,以露出所述数个凹陷部下方的栅极绝缘层;
步骤8、在栅极绝缘层与剩余的光阻层上沉积第二金属层,该第二金属层填充连通孔并与栅极进行连接;
步骤9、去除剩余的光阻层及沉积于其上的第二金属层,以形成源/漏极;
步骤10、在源/漏极与栅极绝缘层上沉积并图案化氧化物半导体层;
步骤11、在氧化物半导体层与源/漏极上沉积并图案化保护层。
所述图案化通过光刻实现。
所述步骤5中采用半色调工艺对光阻层进行分区域曝光。
所述步骤5中光阻层的凹陷部的深度H大于欲形成的源/漏极的厚度。
所述步骤6中采用干法蚀刻去除所述通孔下方的栅极绝缘层。
所述步骤7中采用氧气灰化工艺去除光阻层的数个凹陷部下方的光阻层。
所述步骤8中采用物理气相沉积法在栅极绝缘层与剩余的光阻层上沉积第二金属层。
所述步骤9中使用剥离液剥离去除剩余的光阻层及沉积于其上的部分第二金属层,以形成源/漏极。
所述步骤10中的氧化物半导体层的材料为IGZO。
本发明的有益效果:本发明的共平面型氧化物半导体TFT基板的制作方法,通过采用半色调工艺对光阻层进行分区域曝光、显影,采用剥离工艺去除剩余的光阻层及沉积于其上的第二金属层,实现了仅用一道光罩、一道黄光制程形成栅极绝缘层与源/漏极。相比现有的共平面型氧化物半导体TFT基板的制作方法,本发明的共平面型氧化物半导体TFT基板的制作方法减少了黄光制程,缩短了工序流程与产品生产周期、提高了生产效率与产品良率,提升了产品的竞争力,并减少了所需的光罩数量,降低了生产成本。
附图说明
为了能更进一步了解本发明的特征以及技术内容,请参阅以下有关本发明的详细说明与附图,然而附图仅提供参考与说明用,并非用来对本发明加以限制。
附图中,
图1为现有的共平面型氧化物半导体TFT基板的制作方法步骤1的示意图;
图2为现有的共平面型氧化物半导体TFT基板的制作方法步骤2的示意图;
图3为现有的共平面型氧化物半导体TFT基板的制作方法步骤3的示意图;
图4为现有的共平面型氧化物半导体TFT基板的制作方法步骤4的示意图;
图5为现有的共平面型氧化物半导体TFT基板的制作方法步骤5的示意图;
图6为本发明共平面型氧化物半导体TFT基板的制作方法的流程图;
图7为本发明共平面型氧化物半导体TFT基板的制作方法的步骤2的示意图;
图8为本发明共平面型氧化物半导体TFT基板的制作方法的步骤3的示意图;
图9为本发明共平面型氧化物半导体TFT基板的制作方法的步骤4的示意图;
图10为本发明共平面型氧化物半导体TFT基板的制作方法的步骤5的示意图;
图11为本发明共平面型氧化物半导体TFT基板的制作方法的步骤6的示意图;
图12为本发明共平面型氧化物半导体TFT基板的制作方法的步骤7的示意图;
图13为本发明共平面型氧化物半导体TFT基板的制作方法的步骤8的示意图;
图14为本发明共平面型氧化物半导体TFT基板的制作方法的步骤9的示意图;
图15为本发明共平面型氧化物半导体TFT基板的制作方法的步骤10的示意图;
图16为本发明共平面型氧化物半导体TFT基板的制作方法的步骤11的示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果,以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图6,为本发明共平面型氧化物半导体TFT基板的制作方法的流程图,该方法包括如下步骤:
步骤1、提供一基板1。
具体的,所述基板1为透明基板,优选的,所述基板1为玻璃基板。
步骤2、请参阅图7,在基板1上沉积并图案化第一金属层,形成栅极2。
具体的,所述图案化通过光刻实现。
步骤3、请参阅图8,在栅极2与基板1上沉积栅极绝缘层3,使该栅极绝缘层3完全覆盖栅极2与基板1。
步骤4、请参阅图9,在栅极绝缘层3上形成一定厚度的光阻层4。
具体的,所述光阻层4通过涂覆光刻胶形成。需要特别说明的是,为保证在后续步骤9中形成的源\漏极51具有合适的厚度,所述光阻层4的厚度要足够厚。
步骤5、请参阅图10,对光阻层4进行分区域曝光、显影。
具体的,采用半色调(Half–tone)工艺对光阻层4对应欲形成于栅极绝缘层3内的连通孔31的区域进行全曝光,显影后形成通孔41;对光阻层4对应欲形成源/漏极51的区域进行半曝光,显影后形成数个凹陷部42;对光阻层4的其余区域不进行曝光,保留光阻层4的初始厚度,且所述光阻层4的凹陷部42的深度H大于欲形成的源/漏极51的厚度。
该步骤5仅使用一道光罩、一道黄光制程即定义出了栅极绝缘层3与源/漏极51分别所需对应的图案。
步骤6、请参阅图11,通过干法蚀刻去除所述通孔41下方的栅极绝缘层3,形成栅极绝缘层3内的连通孔31,以露出连通孔31下方的栅极2,从而完成栅极绝缘层3的图案化。
步骤7、请参阅图12,采用氧气灰化工艺(O2Ashing)去除光阻层4的数个凹陷部42下方的光阻层4,以露出所述数个凹陷部42下方的栅极绝缘层3。
该步骤7去除了光阻层4的数个凹陷部42下方的光阻层4,后续步骤9中形成的源/漏极51即位于所露出的栅极绝缘层3上。在去除光阻层4的数个凹陷部42下方的光阻层4的同时,所述光阻层4的其余区域的部分厚度也被去除,剩余的光阻层4’的厚度相应减小。
步骤8、请参阅图13,采用物理气相沉积(PVD)法在栅极绝缘层3与剩余的光阻层4’上沉积第二金属层5,该第二金属层5填充连通孔31并与栅极2进行连接。
步骤9、请参阅图14,去除剩余的光阻层4’及沉积于其上的第二金属层5,完成第二金属层5的图案化,以形成源/漏极51。
具体的,在该步骤9中,使用剥离液剥离去除剩余的光阻层4’及沉积于其上的第二金属层5。值得一提的是,由于剥离液溶解光阻但并不溶解金属,造成剥离液中含有金属杂质,使用滤网过滤掉剥离液中的金属,使得剥离液能够循环使用。
步骤10、请参阅图15,在源/漏极51与栅极绝缘层3上沉积并图案化氧化物半导体层6。
具体的,所述氧化物半导体层6的材料为铟镓锌氧化物(IGZO)。
所述图案化通过光刻实现。
步骤11、请参阅图16,在氧化物半导体层6与源/漏极51上沉积并图案化保护层7,完成共平面型氧化物半导体TFT基板的制作。
具体的,所述图案化通过光刻实现。
本发明的共平面型氧化物半导体TFT基板的制作方法,通过采用半色调工艺对光阻层进行分区域曝光、显影,采用剥离工艺去除剩余的光阻层及沉积于其上的第二金属层,实现了仅用一道光罩、一道黄光制程形成栅极绝缘层与源/漏极。相比现有的共平面型氧化物半导体TFT基板的制作方法,本发明的共平面型氧化物半导体TFT基板的制作方法减少了黄光制程,缩短了工序流程与产品生产周期、提高了生产效率与产品良率,提升了产品的竞争力,并减少了所需的光罩数量,降低了生产成本。
以上所述,对于本领域的普通技术人员来说,可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形,而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。
Claims (9)
1.一种共平面型氧化物半导体TFT基板的制作方法,其特征在于,包括如下步骤:
步骤1、提供一基板(1);
步骤2、在基板(1)上沉积并图案化第一金属层,形成栅极(2);
步骤3、在栅极(2)与基板(1)上沉积栅极绝缘层(3),使该栅极绝缘层(3)完全覆盖栅极(2)与基板(1);
步骤4、在栅极绝缘层(3)上形成一定厚度的光阻层(4);
步骤5、对光阻层(4)进行分区域曝光、显影;
对光阻层(4)对应欲形成于栅极绝缘层(3)内的连通孔(31)的区域进行全曝光,显影后形成通孔(41);对光阻层(4)对应欲形成源/漏极(51)的区域进行半曝光,显影后形成数个凹陷部(42);对光阻层(4)的其余区域不进行曝光;
步骤6、通过蚀刻去除所述通孔(41)下方的栅极绝缘层(3),形成栅极绝缘层(3)内的连通孔(31),以露出连通孔(31)下方的栅极(2);
步骤7、去除光阻层(4)的数个凹陷部(42)下方的光阻层(4),以露出所述数个凹陷部(42)下方的栅极绝缘层(3);
步骤8、在栅极绝缘层(3)与剩余的光阻层(4’)上沉积第二金属层(5),该第二金属层(5)填充连通孔(31)并与栅极(2)进行连接;
步骤9、去除剩余的光阻层(4’)及沉积于其上的第二金属层(5),以形成源\漏极(51);
步骤10、在源/漏极(51)与栅极绝缘层(3)上沉积并图案化氧化物半导体层(6);
步骤11、在氧化物半导体层(6)与源\漏极(51)上沉积并图案化保护层(7)。
2.如权利要求1所述的共平面型氧化物半导体TFT基板的制作方法,其特征在于,所述图案化通过光刻实现。
3.如权利要求1所述的共平面型氧化物半导体TFT基板的制作方法,其特征在于,所述步骤5中采用半色调工艺对光阻层(4)进行分区域曝光。
4.如权利要求1所述的共平面型氧化物半导体TFT基板的制作方法,其特征在于,所述步骤5中光阻层(4)的凹陷部(42)的深度H大于欲形成的源\漏极(51)的厚度。
5.如权利要求1所述的共平面型氧化物半导体TFT基板的制作方法,其特征在于,所述步骤6中采用干法蚀刻去除所述通孔(41)下方的栅极绝缘层(3)。
6.如权利要求1所述的共平面型氧化物半导体TFT基板的制作方法,其特征在于,所述步骤7中采用氧气灰化工艺去除光阻层(4)的数个凹陷部(42)下方的光阻层(4)。
7.如权利要求1所述的共平面型氧化物半导体TFT基板的制作方法,其特征在于,所述步骤8中采用物理气相沉积法在栅极绝缘层(3)与剩余的光阻层(4’)上沉积第二金属层(5)。
8.如权利要求1所述的共平面型氧化物半导体TFT基板的制作方法,其特征在于,所述步骤9中使用剥离液剥离去除剩余的光阻层(4’)及沉积于其上的部分第二金属层(5),以形成源\漏极(51)。
9.如权利要求1所述的共平面型氧化物半导体TFT基板的制作方法,其特征在于,所述步骤10中的氧化物半导体层(6)的材料为IGZO。
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KR1020177003562A KR20170028429A (ko) | 2014-07-22 | 2014-08-15 | 공면형 산화물 반도체 tft 기판의 제작방법 |
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