CN103985638A - Low temperature polycrystalline silicon thin film transistor, preparation method thereof, and display device - Google Patents

Abstract

The invention discloses a low-temperature polysilicon thin-film transistor, its preparation method and a display device, wherein the preparation method of the low-temperature polysilicon thin-film transistor comprises sequentially manufacturing a buffer layer, an active layer, a gate insulating layer and a gate on a substrate, forming a source Drain region; deposition of interlayer dielectric layer, patterned to form contact holes in source and drain regions; simultaneous ion activation and hydrogenation treatment; deposition of source and drain metal layers, and patterning to obtain source and drain. Since the ion activation and hydrogenation treatment are carried out simultaneously, the manufacturing process can be shortened, thereby reducing the heat cost and time cost of device fabrication. Ion activation and hydrogenation treatment are carried out after the contact hole is formed. Nitrogen plasma treatment can effectively repair the dangling bonds inside and on the interface of the polysilicon film, and improve the interface characteristics of the polysilicon film. Therefore, the activation efficiency and hydrogenation effect of ions can be improved, thereby effectively improving the performance of the device. Electrical properties such as mobility and on/off ratio.

Description

A low-temperature polysilicon thin film transistor, its manufacturing method and display device

technical field

The invention relates to the field of display technology, in particular to a low-temperature polysilicon thin film transistor, a preparation method thereof, and a display device.

Background technique

Low Temperature Poly-silicon Thin Film Transistor (LTPS TFT) has been widely used in Active Matrix Organic Light Emitting Diode (AMOLED) due to its high mobility and stability. , Active Matrix Liquid Crystal Display (AMLCD for short) and other displays.

The preparation process of this low-temperature polysilicon thin film transistor is generally to deposit an amorphous silicon layer on the substrate, and then melt and crystallize the amorphous silicon by heat treatment to form a polysilicon layer with a grain structure, and then use the polysilicon layer as the thin film transistor. In the channel layer, silicon oxynitride is used as the gate insulating layer, metal is used as the gate, and then the source and drain are formed by self-aligned ion implantation using the metal gate as a mask, and finally the production of the polysilicon thin film transistor is completed. During the preparation process of the polysilicon thin film transistor, the lattice damage of the polysilicon will be caused after ion implantation, and a subsequent activation process is required to activate the implanted ions and repair the lattice damage of the polysilicon layer. In addition, there are dangling bonds in unbonded orbitals at the interface between the polysilicon film and the gate oxide layer, which is a very important factor for the increase of the interface state density of the polysilicon grain boundary, resulting in a decrease in carrier mobility and an increase in the threshold voltage. Display device performance In order to solve the degradation problem, the follow-up process also needs to passivate the defects inside and at the interface of the polysilicon film through a hydrogenation process.

The commonly used activation method in the prior art is to perform rapid thermal annealing after the interlayer dielectric layer. This method usually requires heating the substrate to above 600 degrees. This high temperature process is likely to cause deformation of the glass substrate and cause cracks in the interlayer insulating layer. Therefore, the characteristics of the thin film transistor are seriously affected. The most commonly used method of hydrogenation process in the prior art is to anneal in a hydrogen atmosphere after the thin film transistor (Thin Film Transistor, TFT for short) or heat treatment with a silicon nitride film as a hydrogen source to diffuse hydrogen to the gate oxide layer and polysilicon. layer. Because these methods usually need to enter the active layer through multi-layer films, the diffusion distance of hydrogen is very long. In order to fully hydrogenate, it takes a long time for heat treatment, which increases the process cost and time. At the same time, the long-term heat treatment will have a certain impact on the TFT device, especially when the size of the TFT is large, the impact is even greater.

In summary, the preparation of low-temperature polysilicon thin film transistors in the prior art requires a multi-step heat treatment process, including ion activation after the interlayer dielectric layer and hydrogenation treatment after the TFT is fabricated. The commonly used activation methods are rapid thermal annealing, hydrogenation, etc. The treatment is to carry out annealing for a long time after the device is completed, which makes the thermal cost and time cost of the low-temperature polysilicon thin film transistor higher, and the improvement of the electrical characteristics of the device will also be limited.

Contents of the invention

(1) Technical problems to be solved

The technical problem to be solved by the invention is how to reduce the manufacturing cost of the low-temperature polysilicon thin film transistor and improve the performance of the device.

(2) Technical solution

In order to solve the above-mentioned technical problems, the present invention provides a method for preparing a low-temperature polysilicon thin film transistor, comprising:

S1. Fabricate a buffer layer, an active layer, a gate insulating layer and a gate in sequence on the base substrate to form source and drain regions;

S2, depositing an interlayer dielectric layer, and forming contact holes in the source and drain regions after patterning;

S3, performing ion activation and hydrogenation treatment simultaneously;

S4. Depositing a source-drain metal layer, and obtaining a source electrode and a drain electrode through patterning.

Further, step S1 specifically includes:

S11, depositing a buffer layer on the base substrate;

S12, depositing an amorphous silicon layer on the buffer layer, and crystallizing the amorphous silicon layer to become polysilicon, and then patterning the polysilicon to form an active layer;

S13, depositing and forming a gate insulating layer on the active layer;

S14, depositing a gate metal layer on the gate insulating layer, and forming a gate through patterning treatment;

S15 , forming source and drain regions by ion implantation.

Further, the formation of the buffer layer, the amorphous silicon layer and the gate insulation layer are all made by plasma enhanced chemical vapor deposition.

Further, the crystallization treatment is performed using excimer laser annealing equipment.

Further, the material of the gate metal layer and the source-drain metal layer is one of molybdenum, aluminum, and titanium, or a composite material composed of any two or more of molybdenum, aluminum, and titanium.

Further, the ions implanted during the ion implantation are boron ions or phosphorus ions.

Further, the buffer layer is a composite thin film of silicon oxide and silicon nitride.

Further, the interlayer dielectric layer is a composite thin film of silicon oxide and silicon nitride.

Further, step S3 specifically includes:

Low temperature annealing is performed simultaneously with nitrogen plasma treatment.

Further, the temperature of the low-temperature annealing is 350-500° C., and the time of the low-temperature annealing is 20-40 minutes.

In order to solve the above-mentioned technical problems, the present invention also provides a low-temperature polysilicon thin film transistor obtained by adopting the above-mentioned method for preparing a low-temperature polysilicon thin film transistor. The low-temperature polysilicon thin film transistor includes a buffer layer, an active layer, a gate insulating layer, Gate, interlevel dielectric layer, source and drain.

In order to solve the above-mentioned technical problems, the present invention also provides a display device comprising the above-mentioned low-temperature polysilicon thin film transistor.

(3) Beneficial effects

A method for preparing a low-temperature polysilicon thin film transistor provided by an embodiment of the present invention specifically includes sequentially manufacturing a buffer layer, an active layer, a gate insulating layer, and a gate on a substrate to form a source-drain region; depositing an interlayer dielectric layer, The contact holes of the source and drain regions are formed through patterning treatment; ion activation and hydrogenation treatment are performed at the same time; the source and drain metal layers are deposited, and the source and drain electrodes are obtained through patterning treatment. On the one hand, because the ion activation and hydrogenation treatment are combined into one process and performed simultaneously, the manufacturing process of the low-temperature polysilicon thin film transistor can be shortened, thereby reducing the heat cost and time cost of device fabrication. On the other hand, ion activation and hydrogenation treatment are performed after the contact hole is formed, which greatly shortens the path of ion activation and hydrogenation. Nitrogen plasma treatment can effectively repair the dangling bonds inside and at the interface of the polysilicon film, and improve the interface characteristics of the polysilicon film, so it can improve the ion The activation efficiency and hydrogenation effect can effectively improve the electrical characteristics of the device such as mobility and switching ratio.

Description of drawings

FIG. 1 is a flow chart of the steps of a method for preparing a low-temperature polysilicon thin film transistor provided in Embodiment 1 of the present invention;

FIG. 2 is a flow chart of specific steps of step S1 in Embodiment 1 of the present invention.

Detailed ways

The specific implementation manners of the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. The following examples are used to illustrate the present invention, but are not intended to limit the scope of the present invention.

Embodiment one

Embodiment 1 of the present invention provides a method for preparing a low-temperature polysilicon thin film transistor. The flow chart of the steps is shown in FIG. 1 , and specifically includes the following steps:

Step S1 , sequentially manufacturing a buffer layer, an active layer, a gate insulating layer and a gate on the base substrate to form source and drain regions.

Step S2, depositing an interlayer dielectric layer, and forming contact holes in the source and drain regions through patterning.

Step S3, performing ion activation and hydrogenation treatment at the same time.

Step S4, depositing a source-drain metal layer, and obtaining a source electrode and a drain electrode through patterning.

Compared with the existing low-temperature polysilicon thin-film transistor preparation method, the above-mentioned preparation method combines the ion activation process and the hydrogenation process that were originally carried out twice into one process, which can shorten the entire low-temperature polysilicon thin film transistor manufacturing process and avoid two The process is carried out separately. In the ion activation process, the substrate substrate is deformed due to the high temperature process, and it can also avoid the cracks in the interlayer insulating layer from affecting the characteristics of the device. It also no longer requires a long time for heat treatment when the hydrogenation process is carried out alone, saving time and heat sources.

Further, step S1 in this embodiment is to sequentially fabricate a buffer layer, an active layer, a gate insulating layer, and a gate on the base substrate to form a source-drain region. The step flow is shown in FIG. 2 , and specifically includes the following steps:

Step S11 , depositing a buffer layer on the base substrate.

Step S12 , depositing an amorphous silicon layer on the buffer layer, and crystallizing the amorphous silicon layer to become polysilicon, and then patterning the polysilicon to form an active layer.

Step S13 , depositing and forming a gate insulating layer on the active layer.

Step S14 , depositing a gate metal layer on the gate insulating layer, and forming a gate through patterning treatment.

Step S15 , forming source and drain regions by ion implantation.

Further, the formation of the buffer layer, the amorphous silicon layer and the gate insulating layer in the above steps S11 to S14 are all made by plasma enhanced chemical vapor deposition (Plasma Enhanced Chemical Vapor Deposition, referred to as PECVD).

Further, the crystallization treatment in this embodiment is performed using excimer laser annealing equipment. The crystallization of polysilicon thin film is a method of making polysilicon thin film, which transforms disorderly arranged atoms into short-range ordered atoms through thermal annealing, photoannealing, high-energy atom irradiation, etc., that is, the amorphous structure becomes polycrystalline structure .

Crystallization methods specifically include solid phase crystallization and laser crystallization. Solid-phase crystallization means that the crystallization temperature is lower than the crystallization temperature of amorphous solid after melting, including doped or non-doped solid-phase crystallization, metal-induced crystallization, and microwave-induced crystallization. Doped or non-doped solid-phase crystallization process is simple, but the required temperature is high, need to reach 600 ~ 1000 ℃, metal-induced crystallization will cause the polysilicon thin film transistor produced to contain metal atoms due to metal pollution, microwave-induced crystallization The use of microwaves to act on the amorphous silicon film to crystallize it requires microwave generating equipment, and the cost is relatively high. Laser crystallization is to instantly hit the laser beam on the amorphous silicon film to make it melt and crystallize at high temperature. Because the time is very short, the temperature of the substrate has not changed, that is, the temperature remains unchanged, and there will be no change due to the substrate substrate. If the temperature is too high, problems such as deformation will occur, so as to avoid damage to the substrate. In this embodiment, the excimer laser annealing equipment is used to irradiate the amorphous silicon film on the substrate with an excimer laser beam for a short time to recrystallize it into a polysilicon film.

Further, the material of the gate metal layer and the source-drain metal layer in this embodiment is one of molybdenum, aluminum, and titanium, or a composite material composed of any two or more of molybdenum, aluminum, and titanium.

Further, the implanted ions during the ion implantation are boron (B) ions or phosphorous (P) ions. The ion implantation is that after the B ion beam or P ion beam irradiates the solid material, the speed is slowly reduced by the resistance of the solid material, and finally stays in the solid material.

Further, the buffer layer is a composite thin film of silicon oxide and silicon nitride.

Further, in this embodiment, the interlayer dielectric layer is a composite thin film of silicon oxide and silicon nitride.

Further, step S3 specifically includes:

Low temperature annealing is performed simultaneously with nitrogen plasma treatment. Ion activation and hydrogenation are carried out immediately after the formation of the contact holes, without a time interval in between, that is, they are carried out simultaneously in a one-step process.

The temperature of the low temperature annealing is 350-500° C., and the time of the low temperature annealing is 20-40 minutes.

To sum up, using the method for preparing low-temperature polysilicon thin-film transistors provided in this embodiment, on the one hand, because the ion activation and hydrogenation processes are combined into one step at the same time, the manufacturing process of low-temperature polysilicon thin-film transistors can be shortened, thereby reducing the thermal cost of device manufacturing and time cost. On the other hand, the ion activation and hydrogenation process is carried out after the contact hole is formed, which greatly shortens the path of ion activation and hydrogenation. At the same time, nitrogen plasma treatment can effectively repair the dangling bonds inside and at the interface of the polysilicon film and improve the interface characteristics of the polysilicon film, so it can improve The activation efficiency and hydrogenation effect of ions can effectively improve the electrical characteristics of the device such as mobility and switching ratio.

Embodiment two

Embodiment 2 of the present invention also provides a low-temperature polysilicon thin-film transistor obtained by adopting the method for preparing a low-temperature polysilicon thin-film transistor in Embodiment 1. The low-temperature polysilicon thin-film transistor includes a buffer layer, an active layer, a gate insulating layer, a gate, an interlayer Dielectric layer, source and drain.

The low-temperature polysilicon thin film transistor in this embodiment can also achieve the beneficial effects of the first embodiment above, so details will not be repeated here.

Embodiment three

Embodiment 3 of the present invention also provides a display device, including the low-temperature polysilicon thin film transistor in Embodiment 2. The display device can be any product or component with a display function such as an array substrate, a liquid crystal panel, an electronic paper, an OLED panel, a mobile phone, a tablet computer, a television set, a monitor, a notebook computer, a digital photo frame, and a navigator.

The above embodiments are only used to illustrate the present invention, but not to limit the present invention. Those of ordinary skill in the relevant technical field can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, all Equivalent technical solutions also belong to the category of the present invention, and the scope of patent protection of the present invention should be defined by the claims.

Claims (12)

1. a preparation method for low-temperature polysilicon film transistor, is characterized in that, comprising:

S1, on underlay substrate, make successively resilient coating, active layer, gate insulation layer and grid, form source and drain areas;

S2, deposition interlayer dielectric layer, through the contact hole of patterned process formation source and drain areas;

S3, carry out ion-activated and hydrogenation treatment simultaneously;

S4, sedimentary origin leak metal level, obtain source electrode and drain electrode through graphical treatment.

2. the preparation method of low-temperature polysilicon film transistor as claimed in claim 1, is characterized in that, step S1 specifically comprises:

S11, on underlay substrate, deposit resilient coating;

S12, above resilient coating deposited amorphous silicon layer, and make amorphous silicon layer be treated as polysilicon through crystallization, then polysilicon is carried out to patterned process form active layer;

S13, above active layer deposition form gate insulation layer;

S14, above gate insulation layer, deposit gate metal layer, form grid through patterned process;

S15, form source and drain areas by Implantation.

3. the preparation method of low-temperature polysilicon film transistor as claimed in claim 2, is characterized in that, forms the equal using plasma of resilient coating, amorphous silicon layer and gate insulation layer and strengthens chemical vapour deposition technique making.

4. the preparation method of low-temperature polysilicon film transistor as claimed in claim 2, is characterized in that, described crystallization is processed and adopted quasi-molecule laser annealing equipment to process.

5. the preparation method of low-temperature polysilicon film transistor as claimed in claim 2, is characterized in that, the material that metal level is leaked in gate metal layer and source is one of molybdenum, aluminium, titanium, or is the composite materials that form more than both arbitrarily in molybdenum, aluminium, titanium.

6. the preparation method of low-temperature polysilicon film transistor as claimed in claim 2, is characterized in that, the ion injecting when described Implantation is boron ion or phosphonium ion.

7. the preparation method of the low-temperature polysilicon film transistor as described in any one in claim 1-6, is characterized in that, described resilient coating is silica and silicon nitride laminated film.

8. the preparation method of the low-temperature polysilicon film transistor as described in any one in claim 1-6, is characterized in that, described interlayer dielectric layer is silica and silicon nitride laminated film.

9. the preparation method of low-temperature polysilicon film transistor as claimed in claim 1, is characterized in that, step S3 specifically comprises:

When carrying out plasma pretreatment, carry out process annealing.

10. the preparation method of low-temperature polysilicon film transistor as claimed in claim 9, is characterized in that, stress relief annealed temperature is 350-500 DEG C, and the stress relief annealed time is 20-40 minute.

11. 1 kinds of low-temperature polysilicon film transistors that adopt the preparation method of the low-temperature polysilicon film transistor described in claim 1-10 any one to obtain, it is characterized in that, described low-temperature polysilicon film transistor comprises resilient coating, active layer, gate insulation layer, grid, interlayer dielectric layer, source electrode and drain electrode.

12. 1 kinds of display devices, is characterized in that, comprise the low-temperature polysilicon film transistor described in claim 11.