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CN101436549A - 铜核层多层封装基板的制作方法 - Google Patents

铜核层多层封装基板的制作方法 Download PDF

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Publication number
CN101436549A
CN101436549A CNA2008103051989A CN200810305198A CN101436549A CN 101436549 A CN101436549 A CN 101436549A CN A2008103051989 A CNA2008103051989 A CN A2008103051989A CN 200810305198 A CN200810305198 A CN 200810305198A CN 101436549 A CN101436549 A CN 101436549A
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China
Prior art keywords
layer
substrate
copper core
circuit
build
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CNA2008103051989A
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CN101436549B (zh
Inventor
林文强
王家忠
陈振重
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Bridge Semiconductor Corp
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Bridge Semiconductor Corp
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    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps
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Abstract

一种铜核层多层封装基板的制作方法，系以一铜核基板为基础，开始制作单面、多层封装基板。其结构包括一具高刚性支撑的铜板，且此铜板的一面具增层线路，另一面则不具任何球侧图案。其各增层线路及置晶侧与球侧连接方式是以多个电镀盲、埋孔所导通。本发明封装基板的特色在于，具有高密度增层线路以提供电子组件相连时所需的绕线，同时并以该铜板提供足够刚性使封装制程可更为简易。藉此，使用本发明所制造的多层封装基板，可依实际需求形成具该铜核基板支撑的铜核层多层封装基板，并可有效达到改善超薄核层基板板弯翘问题、及简化传统增层线路板制作流程，进而提高封装体接合基板时的可靠度。

Description

铜核层多层封装基板的制作方法
技术领域
本发明有关于一种铜核层多层封装基板的制作方法，尤指一种以铜核基板为基础，开始制作的单面、多层封装基板的制作方法，于其中，该多层封装基板的结构包括一具高刚性支撑的铜板，且此铜板的一面具增层线路，另一面则不具任何球侧图案。
背景技术
在一般多层封装基板的制作上，其制作方式通常系由一核心基板开始，经过钻孔、电镀金属、塞孔及双面线路制作等方式，完成一双面结构的内层核心板，之后再经由一线路增层制程完成一多层封装基板。如图18所示，其系为一有核层封装基板的剖面示意图。首先，准备一核心基板50，其中，该核心基板50系由一具预定厚度的芯层501及形成于此芯层501表面的线路层502所构成，且该芯层501中形成有多个电镀导通孔503，可藉以连接该芯层501表面的线路层502。
接着如图19～图22所示，对该核心基板50实施线路增层制程。首先，于该核心基板50表面形成一第一介电层51，且该第一介电层51表面并形成有多个第一开口52，以露出该线路层502；之后，以无电电镀与电镀等方式于该第一介电层51外露表面形成一晶种层53，并于该晶种层53上形成一图案化阻层54，且其图案化阻层54中并有多个第二开口55，以露出部分欲形成图案化线路的晶种层53；接着，利用电镀方式于该第二开口55中形成一第一图案化线路层56及多个导电盲孔57，并使其第一图案化线路层56得以透过该多个导电盲孔57与该核心基板50的线路层502做电性导通，然后再进行移除该图案化阻层54与蚀刻，待完成后系形成一第一线路增层结构5a。同样地，该法系可于该第一线路增层结构5a的最外层表面再运用相同方式形成一第二介电层58及一第二图案化线路层59的第二线路增层结构5b，以逐步增层方式形成一多层封装基板。然而，此种制作方法有布线密度低、层数多及流程复杂等缺点。
另外，亦有利用厚铜金属板当核心材料的方法，可于经过蚀刻及塞孔等方式完成一内层核心板后，再经由一线路增层制程以完成一多层封装基板。如图23～图25所示，其系为另一有核层封装基板的剖面示意图。首先，准备一核心基板60，该核心基板60是由一具预定厚度的金属层利用蚀刻与树脂塞孔601以及钻孔与电镀通孔602等方式形成的单层铜核心基板60；之后，利用上述线路增层方式，于该核心基板60表面形成一第一介电层61及一第一图案化线路层62，藉此构成一具第一线路增层结构6a。该法亦与上述方法相同，系可再利用一次线路增层方式于该第一线路增层结构6a的最外层表面形成一第二介电层63及一第二图案化线路层64，藉此构成一具第二线路增层结构6b，以逐步增层方式形成一多层封装基板。然而，此种制作方法不仅其铜核心基板制作不易，且亦与上述方法相同，具有布线密度低及流程复杂等缺点。故，一般已用者系无法符合使用者于实际使用时所需。
发明内容
本发明所要解决的技术问题是，针对现有技术不足，提供一种布线密度高，并可有效改善超薄核层基板板弯翘问题、及简化传统增层线路板制作流程，进而达到提高封装体接合基板时可靠度(Board Level Reliability)的铜核层多层封装基板的制作方法。
为解决上述技术问题，本发明所采用的技术方案是：一种铜核层多层封装基板的制作方法，至少包含下列步骤：
(A)提供一铜核基板；
(B)于该铜核基板的第一面上形成一第一介电层及一第一金属层；
(C)于该第一金属层及该第一介电层上形成多个第一开口，并显露部分铜核基板第一面；
(D)于多个第一开口中及该第一金属层上形成一第二金属层；
(E)分别于该第二金属层上形成一第一阻层，以及于该铜核基板的第二面上形成一完全覆盖状的第二阻层，于其中，该第一阻层上形成多个第二开口，系显露部分第二金属层；
(F)移除该第二开口下方的第二金属层及第一金属层，并形成一第一线路层；
(G)移除该第一阻层及该第二阻层，完成一具有铜核基板支撑并具电性连接的单层增层线路基板，并可选择直接进行步骤(H)或步骤(I)；
(H)于该单层增层线路基板上进行一置晶侧与球侧线路层制作：在该第一线路层表面形成一第一防焊层，并且在该第一防焊层上形成多个第三开口，以显露该第一线路层作为电性连接垫的部分；接着于该铜核基板的第二面上形成一第三阻层，并于多个第三开口中形成一第一阻障层；最后再移除该第三阻层，完成一具有完整图案化的置晶侧线路层与已图案化但仍完全电性短路的球侧线路层；以及
(I)于该单层增层线路基板上进行一线路增层结构制作：在该第一线路层及该第一介电层表面形成一第二介电层，并且在该第二介电层上形成多个第四开口，以显露部分第一线路层；接着于该第二介电层与多个第四开口表面形成一第一晶种层，再分别于该第一晶种层上形成一第四阻层，以及于该铜核基板的第二面上形成一完全覆盖状的第五阻层，并于该第四阻层上形成多个第五开口，以显露部分第一晶种层，之后于该第五开口中已显露的第一晶种层上形成一第三金属层；最后移除该第四阻层、该第五阻层及该第一晶种层，以在该第二介电层上形成一第二线路层，完成一具有铜核基板支撑并具电性连接的双层增层线路基板；并可继续本步骤(I)增加线路增层结构，形成具更多层的封装基板，亦或直接至该步骤(H)进行置晶侧与球侧线路层制作。
与现有技术相比，本发明所具有的有益效果为：使用本发明铜核层多层封装基板的制作方法，可形成具铜核基板支撑的且具高密度的铜核层多层封装基板，并可有效达到改善超薄核层基板板弯翘问题、及简化传统增层线路板制作流程，进而达到提高封装体接合基板时的可靠度(Board Level Reliability)。
另外，本发明以铜核基板为基础，开始制作单面、多层封装基板，其结构包括一具高刚性支撑的铜板，且此铜板的一面具增层线路，另一面则不具任何球侧图案，于其中，各增层线路及置晶侧与球侧连接方式是以多个电镀盲、埋孔所导通。
且，本发明具有高密度增层线路以提供电子组件相连时所需的绕线，同时，以铜板提供足够的刚性使封装制程可更为简易。
附图说明
图1，系本发明的制作流程示意图。
图2，系本发明一实施例的多层封装基板(一)剖面示意图
图3，系本发明一实施例的多层封装基板(二)剖面示意图。
图4，系本发明一实施例的多层封装基板(三)剖面示意图。
图5，系本发明一实施例的多层封装基板(四)剖面示意图。
图6，系本发明一实施例的多层封装基板(五)剖面示意图。
图7，系本发明一实施例的多层封装基板(六)剖面示意图。
图8，系本发明一实施例的多层封装基板(七)剖面示意图。
图9，系本发明一实施例的多层封装基板(八)剖面示意图。
图10，系本发明一实施例的多层封装基板(九)剖面示意图。
图11，系本发明一实施例的多层封装基板(十)剖面示意图。
图12，系本发明一实施例的多层封装基板(十一)剖面示意图。
图13，系本发明一实施例的多层封装基板(十二)剖面示意图。
图14，系本发明一实施例的多层封装基板(十三)剖面示意图。
图15，系本发明一实施例的多层封装基板(十四)剖面示意图。
图16，系本发明一实施例的多层封装基板(十五)剖面示意图。
图17，系本发明一实施例的多层封装基板(十六)剖面示意图。
图18，系已用有核层封装基板的剖面示意图。
图19，系已用实施线路增层(一)剖面示意图。
图20，系已用实施线路增层(二)剖面示意图。
图21，系已用实施线路增层(三)剖面示意图。
图22，系已用实施线路增层(四)剖面示意图。
图23，系另一已用有核层封装基板的剖面示意图。
图24，系另一已用的第一线路增层结构剖面示意图。
图25，系另一已用的第二路增层结构剖面示意图。
标号说明：
步骤(A)～(I)11～19
单层增层线路基板2
双层增层线路基板3
多层封装基板4
铜核基板20
第一介电层21
第一金属层22
第一开口23
第二金属层24
第一、二阻层25、26
第二开口27
第一线路层28
第二介电层29
第三开口30
第一晶种层31
第三、四阻层32、33
第四开口34
第三金属层35
第二线路层36
第一防焊层37
第五开口38
第五阻层39
第一阻障层40
第一、二线路增层结构5a、5b
第一、二线路增层结构6a、6b
核心基板50
芯层501
线路层502
电镀导通孔503
第一介电层51
第一开口52
晶种层53
图案化阻层54
第二开口55
第一图案化线路层56
导电盲孔57
第二介电层58
第二图案化线路层59
核心基板60
树脂塞孔601
电镀通孔602
第一介电层61
第一图案化线路层62
第二介电层63
第二图案化线路层64
具体实施方式
请参阅图1所示，系为本发明的制作流程示意图。如图所示：本发明系一种铜核层多层封装基板的制作方法，其至少包括下列步骤：
(A)提供铜核基板11：提供一铜核基板，其中，该铜核基板为一不含介电层材料的铜板；
(B)形成第一介电层及第一金属层12：于该铜核基板的第一面上直接压合一第一介电层及一第一金属层，亦或先采取贴合该第一介电层后，再形成该第一金属层；
(C)形成多个第一开口13：以镭射钻孔方式于该第一金属层及该第一介电层上形成多个第一开口，并显露部分铜核基板第一面，其中，多个第一开口可先做开铜窗(Conformal Mask)后，再经由镭射钻孔方式形成，亦或以直接镭射钻孔(LASER Direct)方式形成；
(D)形成第二金属层14：以无电电镀与电镀方式于多个第一开口中及该第一金属层上形成一第二金属层；
(E)形成第一、二阻层及多个第二开口15：分别于该第二金属层上形成一第一阻层，以及于该铜核基板的第二面上形成一完全覆盖状的第二阻层，于其中，并以曝光及显影方式在该第一阻层上形成多个第二开口，以显露部分第二金属层；
(F)形成第一线路层16：以蚀刻方式移除该第二开口下方的第二金属层及第一金属层，并形成一第一线路层；
(G)完成具有铜核基板支撑并具电性连接的单层增层线路基板17：以剥离方式移除该第一阻层及该第二阻层。至此，完成一具有铜核基板支撑并具电性连接的单层增层线路基板，并可选择直接进行步骤(H)或步骤(I)；
(H)进行置晶侧与球侧线路层制作18：于该单层增层线路基板上进行一置晶侧与球侧线路层制作，于其中，在该第一线路层表面形成一第一防焊层，并以曝光及显影方式在该第一防焊层上形成多个第三开口，以显露该第一线路层作为电性连接垫的部分。接着于该铜核基板的第二面上形成一第三阻层，并于多个第三开口中形成一第一阻障层，最后再以剥离方式移除该第三阻层。至此，完成一具有完整图案化的置晶侧线路层与已图案化但仍完全电性短路的球侧线路层，其中，该第一、二阻障层可为电镀镍金、无电镀镍金、电镀银或电镀锡中择其一；以及
(I)进行线路增层结构制作19：于该单层增层线路基板上进行一线路增层结构制作，于其中，在该第一线路层及该第一介电层表面形成一第二介电层，并以镭射钻孔方式在该第二介电层上形成多个第四开口，以显露部分第一线路层。接着以无电电镀与电镀方式于该第二介电层与多个第四开口表面形成一第一晶种层，再分别于该第一晶种层上形成一第四阻层，以及于该铜核基板的第二面上形成一完全覆盖状的第五阻层，并利用曝光及显影方式于该第四阻层上形成多个第五开口，以显露部分第一晶种层，之后再以电镀方式于该第五开口中已显露的第一晶种层上形成一第三金属层，最后以剥离方式移除该第四阻层及该第五阻层，并以蚀刻方式移除该第一晶种层，以在该第二介电层上形成一第二线路层。至此，又再增加一层线路增层结构，完成一具有铜核基板支撑并具电性连接的双层增层线路基板。并可继续本步骤(I)增加线路增层结构，形成具更多层的封装基板，亦或直接至该步骤(H)进行置晶侧与球侧线路层制作，其中，多个第四开口可先做开铜窗后，再经由镭射钻孔方式形成，亦或系以直接镭射钻孔方式形成。
于其中，上述该第一～五阻层系以贴合、印刷或旋转涂布所为的干膜或湿膜的高感旋光性光阻；该第一、二介电层可为环氧树脂绝缘膜(Ajinomoto Build-up Film，ABF)、苯环丁烯(Benzocyclo-buthene，BCB)、双马来亚酰胺-三氮杂苯树脂(BismaleimideTriazine，BT)、环氧树脂板(FR4、FR5)、聚酰亚胺(Polyimide，PI)、聚四氟乙烯(Poly(tetra-floroethylene)，PTFE)或环氧树脂及玻璃纤维所组成之一。
请参阅图2～图8所示，系分别为本发明一实施例的多层封装基板(一)剖面示意图、本发明一实施例的多层封装基板(二)剖面示意图、本发明一实施例的多层封装基板(三)剖面示意图、本发明一实施例的多层封装基板(四)剖面示意图、本发明一实施例的多层封装基板(五)剖面示意图、本发明一实施例的多层封装基板(六)剖面示意图、及本发明一实施例的多层封装基板(七)剖面示意图。如图所示：本发明于一较佳实施例中，先提供一铜核基板20，并于该铜核基板20的第一面上压合一第一介电层21及一第一金属层22，并以镭射钻孔方式在该第一金属层22与该第一介电层21上形成多个第一开口23，以显露其下的铜核基板20第一面。之后，再以无电电镀与电镀方式于多个第一开口23内及该第一金属层22表面形成一第二金属层24，其中，该第一、二金属层(22、24)皆为铜，且该第二金属层24系作为与该第一金属层22的电性连接用。
接着，分别于该第二金属层24上贴合一高感旋光性高分子材料的第一阻层25，以及于该铜核基板20的第二面上贴合一高感旋光性高分子材料的第二阻层26。并以曝光及显影方式于该第一阻层25上形成多个第二开口27，以显露其下的第二金属层24。之后系以蚀刻方式移除该第二开口27下的第一、二金属层(22、24)，以形成一第一线路层28，最后移除该第一、二阻层(25、26)。至此，完成一具有铜核基板支撑并具电性连接的单层增层线路基板2。
请参阅图9～图13所示，分别为本发明一实施例的多层封装基板(八)剖面示意图、本发明一实施例的多层封装基板(九)剖面示意图、本发明一实施例的多层封装基板(十)剖面示意图、本发明一实施例的多层封装基板(十一)剖面示意图、及本发明一实施例的多层封装基板(十二)剖面示意图。如图所示：在本发明较佳实施例中，系先行进行线路增层结构的制作。首先于该第一线路层28与第一介电层21上贴压合一为环氧树脂绝缘膜材料的第二介电层29，之后，以镭射钻孔方式于该第二介电层29上形成多个第三开口30，以显露其下的第一线路层28，并在该第二介电层29及该第三开口30表面以无电电镀与电镀方式形成一第一晶种层31。之后分别于该第一晶种层31上贴合一高感旋光性高分子材料的第三阻层32，以及于该铜核基板20的第二面上贴合一高感旋光性高分子材料的第四阻层33，接着利用曝光及显影方式于该第三阻层32上形成多个第四开口34，然后再于多个第四开口34中电镀一第三金属层35，最后移除该第三、四阻层(32、33)，并再以蚀刻方式移除显露的第一晶种层31，以形成一第二线路层36。至此，又再增加一层线路增层结构，完成一具有铜核基板支撑并具电性连接的双层增层线路基板3，于其中，该第一晶种层31与该第三金属层35皆为金属铜。
请参阅图14～图17所示，系分别为本发明一实施例的多层封装基板(十三)剖面示意图、本发明一实施例的多层封装基板(十四)剖面示意图、本发明一实施例的多层封装基板(十五)剖面示意图、及本发明一实施例的多层封装基板(十六)剖面示意图。如图所示：之后，在本发明较佳实施例中系接着进行置晶侧与球侧线路层的制作。首先于该第二线路层36表面涂覆一层绝缘保护用的第一防焊层37，然后以曝光及显影方式于该第一防焊层37上形成多个第五开口38，以显露其线路增层结构作为电性连接垫。接着，于该铜核基板20的第二面上贴合一高感旋光性高分子材料的第五阻层39，之后于多个第五开口38上形成一第一阻障层40，最后再移除该第五阻层。至此，完成一具铜核层支撑的多层封装基板4，其中，该第一阻障层40为镍金层；至于球侧的电性接垫，则于封装制程完成后，先于该铜核基板20的第二面形成阻层，再移除部分的铜核基板20后形成。
由上述可知，本发明系以铜核基板为基础，开始制作单面、多层封装基板，其结构包括一具高刚性支撑的铜板，且此铜板的一面具增层线路，另一面则不具任何球侧图案。于其中，各增层线路及置晶侧与球侧连接方式系以多个电镀盲、埋孔所导通。因此，本发明封装基板的特色在于具有高密度增层线路以提供电子组件相连时所需的绕线，同时，并以铜板提供足够的刚性使封装制程可更为简易。虽然各线路在封装制程完成前于电性上完全短路，但封装制程完成后则可利用光学微影与蚀刻方式移除部分铜板，进而可使电性独立并形成柱状接脚。藉此，使用本发明具高密度的增层线路封装基板方法所制造的多层封装基板，系可依实际需求形成具铜核基板支撑的铜核层多层封装基板，并可有效达到改善超薄核层基板板弯翘问题、及简化传统增层线路板制作流程，进而达到提高封装体接合基板时的可靠度(BoardLevel Reliability)的目的。
综上所述，本发明系一种铜核层多层封装基板的制作方法，可有效改善已用的种种缺点，以具有高密度增层线路提供电子组件相连时所需的绕线，同时，并以铜板提供足够的刚性使封装制程可更为简易。藉此，使用本发明所制造的多层封装基板，可依实际需求形成具铜核基板支撑的铜核层多层封装基板，并可有效达到改善超薄核层基板板弯翘问题、及简化传统增层线路板制作流程，以达到提高封装体接合基板时的可靠度，进而使本发明的产生能更进步、更实用、更符合使用者所须，确已符合发明专利申请要件，爰依法提出专利申请。
惟以上所述，仅为本发明的较佳实施例而已，当不能以此限定本发明实施范围；故，凡依本发明权利要求书及说明书内容所作的简单的等效变化与修饰，皆应仍属本发明专利涵盖范围内。

Claims (11)

  1. 【权利要求1】一种铜核层多层封装基板的制作方法，其特征在于至少包含下列步骤：
    (A)提供一铜核基板；
    (B)于该铜核基板的第一面上形成一第一介电层及一第一金属层；
    (C)于该第一金属层及该第一介电层上形成多个第一开口，并显露部分铜核基板第一面；
    (D)于多个第一开口中及该第一金属层上形成一第二金属层；
    (E)分别于该第二金属层上形成一第一阻层，以及于该铜核基板的第二面上形成一完全覆盖状的第二阻层，该第一阻层上形成多个第二开口，系显露部分第二金属层；
    (F)移除该第二开口下方的第二金属层及第一金属层，并形成一第一线路层；
    (G)移除该第一阻层及该第二阻层，完成一具有铜核基板支撑并具电性连接的单层增层线路基板，并可选择直接进行步骤(H)或步骤(I)；
    (H)于该单层增层线路基板上进行一置晶侧与球侧线路层制作：在该第一线路层表面形成一第一防焊层，并且在该第一防焊层上形成多个第三开口，以显露该第一线路层作为电性连接垫的部分；接着于该铜核基板的第二面上形成一第三阻层，并于多个第三开口中形成一第一阻障层；最后再移除该第三阻层，完成一具有完整图案化的置晶侧线路层与已图案化但仍完全电性短路的球侧线路层；以及
    (I)于该单层增层线路基板上进行一线路增层结构制作：在该第一线路层及该第一介电层表面形成一第二介电层，并且在该第二介电层上形成多个第四开口，以显露部分第一线路层；接着于该第二介电层与多个第四开口表面形成一第一晶种层，再分别于该第一晶种层上形成一第四阻层，以及于该铜核基板的第二面上形成一完全覆盖状的第五阻层，并于该第四阻层上形成多个第五开口，以显露部分第一晶种层，之后于该第五开口中已显露的第一晶种层上形成一第三金属层；最后移除该第四阻层、该第五阻层及该第一晶种层，以在该第二介电层上形成一第二线路层，完成一具有铜核基板支撑并具电性连接的双层增层线路基板；并可继续本步骤(I)增加线路增层结构，形成具更多层的封装基板，亦或直接至该步骤(H)进行置晶侧与球侧线路层制作。
  2. 【权利要求2】根据权利要求1所述的铜核层多层封装基板的制作方法，其特征在于，该铜核基板为一不含介电层材料的铜板。
  3. 【权利要求3】根据权利要求1所述的铜核层多层封装基板的制作方法，其特征在于，该步骤(B)以直接压合该第一介电层及该第一金属层于其上，或系采取贴合该第一介电层后，再形成该第一金属层。
  4. 【权利要求4】根据权利要求1所述的铜核层多层封装基板的制作方法，其特征在于，该第一、二介电层为环氧树脂绝缘膜、苯环丁烯、双马来亚酰胺-三氮杂苯树脂、环氧树脂板、聚酰亚胺、聚四氟乙烯或环氧树脂及玻璃纤维所组成之一。
  5. 【权利要求5】根据权利要求1所述的铜核层多层封装基板的制作方法，其特征在于，多个第一、四开口是先做开铜窗后，再经由镭射钻孔的方式形成，亦或以直接镭射钻孔方式形成。
  6. 【权利要求6】根据权利要求1所述的铜核层多层封装基板的制作方法，其特征在于，该第二、三金属层及该第一晶种层的形成方式为无电电镀与电镀。
  7. 【权利要求7】根据权利要求1所述的铜核层多层封装基板的制作方法，其特征在于，该第一～五阻层是以贴合、印刷或旋转涂布所为的干膜或湿膜的高感旋光性光阻。
  8. 【权利要求8】根据权利要求1所述的铜核层多层封装基板的制作方法，其特征在于，多个第二、三及五开口以曝光及显影方式形成。
  9. 【权利要求9】根据权利要求1所述的铜核层多层封装基板的制作方法，其特征在于，该步骤(F)移除该第一、二金属层及该步骤(I)移除该第一晶种层的方法为蚀刻。
  10. 【权利要求10】根据权利要求1所述的铜核层多层封装基板的制作方法，其特征在于，该第一～五阻层的移除方法为剥离。
  11. 【权利要求11】根据权利要求1所述的铜核层多层封装基板的制作方法，其特征在于，该第一、二阻障层为电镀镍金、无电镀镍金、电镀银或电镀锡中一种。
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