CN101118881A - Method for manufacturing pixel structure - Google Patents

Abstract

The invention relates to a manufacturing method of a pixel structure, which comprises the following steps. First, a substrate is provided, and a gate is formed on the substrate. Then, a gate dielectric layer is formed on the substrate to cover the gate. Then, a semiconductor layer is formed on the gate dielectric layer, a first mask exposing a portion of the semiconductor layer is provided over the semiconductor layer, and a portion of the semiconductor layer is removed by laser irradiation to form a channel layer. And forming a source electrode and a drain electrode on the channel layer at two sides of the grid electrode. Then, a patterned passivation layer is formed to cover the channel layer and expose the drain. And finally, forming a conductive layer to cover the patterned protective layer and the exposed drain electrode, and patterning the conductive layer through the patterned protective layer to form a pixel electrode.

Description

How to make pixel structure

technical field

The present invention relates to a method for manufacturing a pixel structure, and in particular to a method for manufacturing a pixel structure using a laser ablation process to manufacture a semiconductor layer.

Background technique

A display is a communication interface between people and information, and flat-panel displays are currently the main development trend. There are mainly the following types of flat-panel displays: organic electroluminescence display, plasma display panel, and thin film transistor liquid crystal display. Among them, thin film transistor liquid crystal display is the most widely used. Generally speaking, a thin film transistor liquid crystal display is mainly composed of a thin film transistor array substrate, a color filter array substrate and a liquid crystal layer. Wherein, the thin film transistor array substrate includes a plurality of scan lines (scan lines), a plurality of data lines (data lines) and a plurality of pixel structures (pixel units) arranged in an array, and each pixel structure is respectively connected to the corresponding scan lines and data lines. electrical connection.

1A-1G are schematic diagrams of a manufacturing method of a conventional pixel structure. First, please refer to FIG. 1A , a substrate 10 is provided, and a gate 20 is formed on the substrate 10 through a first photomask manufacturing process. Next, referring to FIG. 1B , a gate dielectric layer 30 is formed on the substrate 10 to cover the gate 20 . Then, referring to FIG. 1C , a channel layer 40 above the gate 20 is formed on the gate dielectric layer 30 through a second photomask fabrication process. Generally speaking, the channel layer 40 is made of amorphous silicon. After that, referring to FIG. 1D , a source 50 and a drain 60 are formed on a part of the channel layer 40 and a part of the gate dielectric layer 30 through a third photomask manufacturing process. It can be seen from FIG. 1D that the source electrode 50 and the drain electrode 60 respectively extend from two sides of the channel layer 40 to the gate dielectric layer 30 and expose a part of the channel layer 40 . Next, referring to FIG. 1E , a protection layer 70 is formed on the substrate 10 to cover the gate insulating layer 30 , the channel layer 40 , the source 50 and the drain 60 . Then, referring to FIG. 1F , the passivation layer 70 is patterned through a fourth photomask manufacturing process to form a contact hole H in the passivation layer 70 . It can be seen from FIG. 1F that the contact hole H in the passivation layer 70 will expose a part of the drain 60 . After that, referring to FIG. 1G , a pixel electrode 80 is formed on the passivation layer 70 through the fourth photomask manufacturing process. As can be seen from FIG. 1G , the pixel electrode 80 is electrically connected to the drain electrode 60 through the contact hole H. After the pixel electrode 80 is fabricated, the pixel structure 90 is fabricated.

Based on the above, the existing pixel structure 90 is mainly manufactured through five mask manufacturing processes. In other words, the pixel structure 90 needs to be manufactured using five masks with different patterns. Since the manufacturing cost of the photomask is very expensive, and each photomask manufacturing process needs to use a photomask with different patterns, therefore, if the number of photomask manufacturing processes cannot be reduced, the manufacturing cost of the pixel structure 90 cannot be reduced.

In addition, as the size of TFT liquid crystal display panels increases, the size of the photomask used to manufacture the TFT array substrate will also increase accordingly, and the large-sized photomask will be more expensive in terms of manufacturing cost, making the pixel structure 90 Manufacturing costs cannot be effectively reduced.

Contents of the invention

The invention relates to a manufacturing method of a pixel structure, which is suitable for reducing the manufacturing cost.

In order to specifically describe the content of the present invention, a method for manufacturing a pixel structure is proposed here. Firstly, a substrate is provided, and a gate is formed on the substrate. Next, a gate dielectric layer is formed on the substrate to cover the gate. Then, a semiconductor layer is formed on the gate dielectric layer. Then, a first mask is provided on the semiconductor layer, and the first mask exposes a part of the semiconductor layer. Next, a laser is used to irradiate the semiconductor layer through the first mask to remove a part of the semiconductor layer exposed by the first mask to form a channel layer. After that, a source and a drain are formed on the channel layer on both sides of the gate, wherein the gate, the channel layer, the source and the drain form a thin film transistor. Next, a patterned protection layer is formed on the thin film transistor to cover the channel layer and expose the drain. Then a conductive layer is formed to cover the patterned protective layer and the exposed drain, and the conductive layer is patterned through the patterned protective layer to form a pixel electrode.

In the manufacturing method of the pixel structure of the present invention, it also includes baking the patterned protective layer after forming the patterned protective layer, so that the patterned protective layer has a mushroom-shaped (mushroom) top surface, wherein the patterned protective layer The top surface of the mushroom is slightly larger than its bottom surface.

In the manufacturing method of the pixel structure of the present invention, in the above-mentioned method of forming the gate, in one embodiment, for example, a first metal layer is firstly formed on the substrate. Next, the first metal layer is patterned to form a gate. In another embodiment, the method for forming the gate is, for example, first forming a first metal layer on the substrate. Then, a second mask is provided on the first metal layer, and the second mask exposes part of the first metal layer. Then, a laser is used to irradiate the first metal layer through the second mask, so as to remove a part of the first metal layer exposed by the second mask.

In the manufacturing method of the pixel structure of the present invention, the method of forming the source and the drain is, for example, firstly forming a second metal layer on the channel layer and the gate dielectric layer, and then patterning the second metal layer to form the source and the drain.

In the manufacturing method of the pixel structure of the present invention, the patterning protection layer includes forming on part of the gate dielectric layer.

In the manufacturing method of the pixel structure of the present invention, the method of forming the patterned protective layer is, in one embodiment, for example, forming a protective layer on the gate dielectric layer and the thin film transistor after forming the thin film transistor. Next, the protective layer is patterned again. In another embodiment, the method of forming the patterned protective layer is, for example, forming a protective layer on the gate dielectric layer and the thin film transistor after forming the thin film transistor. Then, a third mask is provided on the protective layer, and the third mask exposes a part of the protective layer. Then, a laser is used to irradiate the protective layer through the third mask, so as to remove a part of the protective layer exposed by the third mask.

In the manufacturing method of the pixel structure of the present invention, the method for forming the conductive layer includes forming an indium tin oxide layer or an indium zinc oxide layer by sputtering.

In the method for fabricating the pixel structure of the present invention, the laser energy irradiated on the semiconductor layer is, for example, between 10 and 500 mJ/cm ² . In addition, the wavelength of the laser is, for example, between 100 nm and 400 nm.

In the manufacturing method of the pixel structure of the present invention, the mushroom-shaped top surface of the patterned protective layer includes that the top surface of the patterned protective layer is slightly larger than the bottom surface thereof.

In the manufacturing method of the pixel structure of the present invention, it further includes removing the patterned protection layer after forming the pixel electrode.

In the manufacturing method of the pixel structure of the present invention, it also includes forming a lower capacitor electrode while forming a gate, and forming an upper capacitor electrode while forming a source electrode and a drain electrode, wherein the lower capacitor electrode and the upper capacitor electrode form a storage capacitor.

The present invention completes the patterning of the conductive layer while forming the conductive layer by patterning the appropriate pattern of the protective layer to form the pixel electrode. Therefore, compared with the existing pixel structure manufacturing method, the manufacturing process steps can be simplified and light The production cost of the cover. In addition, when making the semiconductor layer, the mask used in the laser lift-off process is simpler than the existing photomask, so the cost of the mask used in the laser lift-off process is relatively low.

Description of drawings

1A-1G are schematic diagrams of a manufacturing method of a conventional pixel structure.

2A to 2G are schematic diagrams of a manufacturing method of a pixel structure of the present invention.

3A to 3C are schematic diagrams of a laser lift-off manufacturing method for forming a gate.

4A-4C are schematic diagrams of a manufacturing method for forming a source electrode and a drain electrode.

5A to 5C are schematic diagrams of a fabrication method for forming a patterned protective layer.

6A to 6H are schematic diagrams of another manufacturing method of a pixel structure of the present invention.

Figure number:

10, 200: Substrate

20, 212: grid

30: First dielectric layer

40, 232: channel layer

50, 242: source

60, 244: Drain

70: Second dielectric layer

80, 282: pixel electrode

90: Pixel structure

210: first metal layer

216: Bottom capacitor electrode

220: gate dielectric layer

230: semiconductor layer

240: second metal layer

246: Upper capacitor electrode

250: photoresist layer

260: thin film transistor

270: protective layer

272: Patterned protective layer

280: conductive layer

280A, 280B: Partial conductive layer

C: storage capacitor

L: Laser

H: contact hole

M: mushroom-shaped top surface

S1: first mask

S2: second mask

S3: Third mask

Detailed ways

In order to make the above-mentioned features and advantages of the present invention more comprehensible, preferred embodiments will be described in detail below together with the accompanying drawings.

first embodiment

2A to 2G are schematic diagrams of a manufacturing method of a pixel structure of the present invention. Referring to FIG. 2A , firstly, a substrate 200 is provided, and the material of the substrate 200 is hard or soft materials such as glass and plastic. Next, a gate 212 is formed on the substrate 200 . In this embodiment, it also includes forming the lower capacitor electrode 216 while forming the gate 212 .

Next, referring to FIG. 2B , a gate dielectric layer 220 is formed on the substrate 200 to cover the gate 212 and the lower capacitor electrode 216, wherein the gate dielectric layer 220 is, for example, formed by chemical vapor deposition (CVD) or other suitable film deposition techniques, and the material of the gate dielectric layer 220 is, for example, a dielectric material such as silicon oxide, silicon nitride, or silicon oxynitride. Next, a semiconductor layer 230 is formed on the gate dielectric layer 220 . In this embodiment, the material of the semiconductor layer 230 is, for example, amorphous silicon (amorphous silicon) or other semiconductor materials.

Next, referring to FIG. 2C , a first mask S1 is provided above the semiconductor layer 230 , and the first mask S1 exposes a portion of the semiconductor layer 230 . Next, a laser L is used to irradiate the semiconductor layer 230 through the first mask S1 to remove a portion of the semiconductor layer 230 exposed by the first mask S1 to form a channel layer 232 . Specifically, the semiconductor layer 230 irradiated by the laser light L will absorb the energy of the laser light L and be ablated from the surface of the gate dielectric layer 220, leaving the semiconductor layer 230 covered by the first mask S1 to form a channel Layer 232. Specifically, the energy of the laser L used to lift off the semiconductor layer 230 is, for example, between 10 and 500 mJ/cm ² . In addition, the wavelength of the laser light L is, for example, between 100 nm and 400 nm. The characteristic that the semiconductor layer 230 absorbs and strips specific laser light, while the underlying gate dielectric layer 220 hardly absorbs, can avoid damage to the surface of the bottom gate dielectric layer 220 by the traditional etching process, so that the storage capacitor can be better Charge storage capacity, and thus better display quality.

Referring to FIG. 2D , a source 242 and a drain 244 are formed on the channel layer 232 on both sides of the gate 212 , wherein the gate 212 , the channel layer 232 , the source 242 and the drain 244 form a thin film transistor 260 . In addition, in other embodiments, an ohmic contact layer (not shown) may be formed on the surface of the semiconductor layer 230 (shown in FIG. 2B ), and then part of the ohmic contact layer (not shown) may be removed by an etching process ( not shown). For example, ion doping can be used to form an N-type doped region on the surface of the semiconductor layer 230 (shown in FIG. 2B ), so as to reduce the gap between the channel layer 232 and the source electrode 242 and the channel layer 232. The contact resistance with the drain 244. In addition, in this embodiment, while forming the source electrode 242 and the drain electrode 244 , it also includes forming the upper capacitor electrode 246 , as shown in FIG. 2D . Wherein, the lower capacitor electrode 216 and the upper capacitor electrode 246 form a storage capacitor C to maintain good display quality.

Next, referring to FIG. 2E , a patterned protective layer 272 is formed on the thin film transistor 260 to cover the channel layer 232 and expose the drain 244 . As shown in FIG. 2E , in this embodiment, the area where the patterned protection layer 272 is formed includes part of the gate dielectric layer 272. The material of the patterned protection layer 272 can be, for example, organic resin such as acrylic resin or photosensitive resin. Dielectric materials can also be composed of inorganic dielectric materials such as silicon oxide, silicon nitride or silicon oxynitride, and the method of forming the patterned protective layer 272 is, for example, by photoresist coating or other suitable thin films Formed by deposition techniques such as chemical vapor deposition. Next, please continue referring to FIG. 2E , using the patterned protective layer 272 and the second metal layer 240 as a mask, an etching process is performed to remove part of the gate dielectric layer 220 and expose the gate pad (not shown) at the same time. shown) on the first metal layer 210 (not shown).

Then, referring to FIG. 2F, a conductive layer 280 is formed to cover the patterned protective layer 272 and the exposed drain 244. The method for forming the conductive layer 280 is, for example, to form an indium tin oxide layer or an indium zinc oxide layer by sputtering. oxide layer. Since the patterned passivation layer 272 serving as the bottom layer of the conductive layer 280 has an appropriate thickness, two electrically insulated conductive layers 280A and 280B are formed when the conductive layer 280 is formed. In detail, the designer can properly control the thickness of the underlying patterned protective layer 272, and utilize the anisotropic characteristics of the film deposition process of the conductive layer 280 to make the conductive layer 280 adapt to the thickness drop of the underlying patterned protective layer 272, A discontinuous two-part conductive layer 280A and 280B is formed. A part of the conductive layer 280A is formed on the patterned protective layer 272 , and another part of the conductive layer 280B is formed on the substrate 200 and the drain 244 . Wherein, a portion of the conductive layer 280B connected to the drain electrode 244 constitutes the pixel electrode 282 . It is worth noting that, unlike the prior art, this embodiment utilizes the design of the patterned protective layer 272 to simultaneously pattern the conductive layer 280 to complete the fabrication of the pixel electrode 282. Therefore, the present invention can reduce one photomask fabrication process, And reduce the complexity of the manufacturing process.

Generally speaking, after the pixel electrode 282 is formed, the patterned protective layer 272 can be removed, as shown in FIG. 2G . The method of removing the patterned protective layer 272 is, for example, using a stripping liquid on the surface of the patterned protective layer 272 and the conductive layer 280, so that the bottom surface of the patterned protective layer 272 is removed from the surface of the thin film transistor 260 or the gate due to the intrusion of the stripping liquid. The surface of the electrical layer 220 is peeled off.

In addition, the above-mentioned method of forming the gate 212 can be fabricated by using a laser lift-off fabrication process, for example. 3A to 3C are schematic diagrams of a laser lift-off manufacturing method for forming a gate. Referring to FIG. 3A , a first metal layer 210 is first formed on the substrate 200 . Referring next to FIG. 3B , a second mask S2 is provided above the first metal layer 210 , and the second mask S2 exposes a portion of the first metal layer 210 . Then, the laser L is used to irradiate the first metal layer 210 through the second mask S2 to remove the part of the first metal layer 210 exposed by the second mask S2. Finally, as shown in FIG. 3C , the remaining first metal layer 210 constitutes the gate 212 and the lower capacitor electrode 216 . In another embodiment, the method of forming the gate 212 may also be to first form a first metal layer 210 on the substrate 220 . Then the first metal layer 210 is patterned to form the gate 212 and the lower capacitor electrode 216 . The first metal layer 210 is formed, for example, by sputtering, evaporation or other thin film deposition techniques, and the patterning of the first metal layer 210 is, for example, performed by a lithographic etching process.

In addition, FIGS. 4A-4C are schematic diagrams of a manufacturing method for forming the source electrode 242 and the drain electrode 244 . Referring to FIG. 4A , a second metal layer 240 is first formed on the channel layer 232 and the gate dielectric layer 220 . Next, referring to FIG. 4B , the second metal layer 240 is patterned. Specifically, for example, a photoresist layer 250 is formed on the channel layer 232 on both sides of the gate 212, and an etching process is performed using the photoresist layer 250 as a mask to remove the uncoated photoresist layer 250. covering the second metal layer 240 . After removing the photoresist layer 250 , as shown in FIG. 4C , a source 242 and a drain 242 are respectively formed on the channel layer 232 on both sides of the gate 212 . In this embodiment, the photoresist layer 250 also includes a gate dielectric layer 220 formed above the lower capacitor electrode 216, so that the upper capacitor electrode 246 is formed after the etching process, so that the upper capacitor electrode 246 and the lower capacitor electrode The electrode 216 forms a storage capacitor C. The material of the second metal layer 240 is, for example, aluminum (Al), molybdenum (Mo), titanium (Ti), neodymium (Nd), the above-mentioned nitrides such as molybdenum nitride (MoN), titanium nitride (TiN), and its stack. layer, the alloys mentioned above, or other conductive materials. In this embodiment, the etching process is, for example, wet etching. In other embodiments, the etching process may also be dry etching. In addition, the process for removing the photoresist layer 250 is, for example, a wet etching process.

In addition, the above method of forming the patterned protective layer 272 is, for example, to form a protective layer 270 on the gate dielectric layer 220 and the thin film transistor 260 after forming the thin film transistor 260 . Next, the passivation layer 270 is patterned again, and the method of patterning the passivation layer 270 is, for example, performing a lithographic etching process. Another method of forming the patterned protection layer 272 is to complete the production by laser lift-off process. FIGS. 5A-5C are schematic diagrams of a laser lift-off process for forming the patterned protection layer. Please refer to FIG. 5A first, after forming the thin film transistor 260, then as shown in FIG. 5B, a protective layer 270 is formed on the gate dielectric layer 220 and the thin film transistor 260, and a third mask S3 is provided on the protective layer 270, and The third mask S3 exposes part of the protection layer 270 . Then, a laser L is used to irradiate the protection layer 270 through the third mask S3 to remove a part of the protection layer 270 exposed by the third mask S3. Finally, as shown in FIG. 5C , a patterned protection layer 272 is formed.

second embodiment

6A to 6H are schematic diagrams of a manufacturing method of the pixel structure in the second embodiment of the present invention. Since the steps in FIG. 6A-FIG. 6E are similar to those in FIG. 2A-FIG. 2E of the first embodiment, their descriptions are omitted here.

Referring to FIG. 6F , after the patterned protection layer 272 is formed, the patterned protection layer 272 is baked so that the patterned protection layer 272 has a mushroom-shaped top surface M. Referring to FIG. The patterned passivation layer 272 after baking exhibits a pattern in which the top surface of the patterned passivation layer 272 is slightly larger than the bottom surface thereof, so that the top surface of the patterned passivation layer 272 substantially presents the above-mentioned mushroom-shaped top surface M. It is worth mentioning that in practice, manufacturing process errors such as temperature, heating speed, and heating time of the baking process must be considered. Therefore, the shape of the patterned protective layer 272 may vary slightly due to manufacturing process errors, but generally The shape of the top surface of the patterned protective layer 272 of the present invention is not limited to the mushroom-shaped pattern with the top surface slightly larger than the bottom surface.

Then, referring to FIG. 6G, a conductive layer 280 is formed to cover the patterned protection layer 272 and the exposed drain 244. The method for forming the conductive layer 280 is, for example, to form an indium tin oxide layer or an indium zinc layer by sputtering. oxide layer. Since the patterned passivation layer 272 has a mushroom-shaped top surface M whose top surface is slightly larger than its bottom surface, two electrically insulated conductive layers 280A and 280B are formed when the conductive layer 280 is formed. A part of the conductive layer 280A is formed on the patterned passivation layer 272 , and another part of the conductive layer 280B is formed on the substrate 200 and the drain 244 . Wherein, a portion of the conductive layer 280B connected to the drain electrode 244 constitutes the pixel electrode 282 . It is worth noting that, unlike the prior art, in this embodiment, the design of the mushroom-shaped top surface M of the patterned protective layer 272 is used to simultaneously pattern the conductive layer 280 to complete the fabrication of the pixel electrode 282, so that the One photomask manufacturing process, and reduce the complexity of the manufacturing process.

Generally speaking, after the pixel electrode 282 is formed, the patterned protection layer 272 can also be removed, as shown in FIG. 6H . The method of removing the patterned protective layer 272 is, for example, using a stripping liquid on the surface of the patterned protective layer 272 and the conductive layer 280, so that the bottom surface of the patterned protective layer 272 is removed from the surface of the thin film transistor 260 or the gate due to the intrusion of the stripping liquid. The surface of the electrical layer 220 is peeled off.

Based on the above, the present invention is different from the conventional use of a photomask to make the pixel electrode in the production of the pixel electrode. Instead, the conductive layer is directly patterned through a patterned protective layer with an appropriate pattern while the conductive layer is formed. , to form the pixel electrode, so it has the advantage of reducing the manufacturing process steps compared with the prior art. Moreover, the present invention uses laser irradiation to form the semiconductor layer instead of the existing lithographic etching process, so the method for producing the pixel structure proposed by the present invention has at least the following advantages:

The manufacturing method of the pixel structure proposed by the present invention does not need the lithography manufacturing process for the pixel electrode manufacturing process, so compared with the high-precision mask manufacturing process used in the lithography manufacturing process, the manufacturing cost of the mask can be reduced.

Since the manufacturing process for making the pixel structure is less, it can reduce the lengthy photomask manufacturing process (such as photoresist coating, soft baking, hard baking, exposure, development, etching, photoresist stripping, etc.) to make the pixel structure. produce defects.

The method of laser stripping part of the semiconductor layer proposed by the present invention can be applied to the repair of the pixel electrode in the pixel repair, so as to remove the possible residual pixel electrode (ITOresidue) in the pixel structure manufacturing process and solve the problem between the pixel electrodes. Short circuit problems, thereby increasing production yield.

Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field may make some modifications and changes without departing from the spirit and scope of the present invention. Modification, therefore, the scope of protection of the present invention should be defined by the scope of the claims.

Claims (14)

1. A method for making a pixel structure, comprising: providing a substrate; forming a gate on the substrate; forming a gate dielectric layer on the substrate to cover the gate; forming a semiconductor layer on the gate dielectric layer; providing a first mask over the semiconductor layer, and the first mask exposes a portion of the semiconductor layer; using a laser to irradiate the semiconductor layer through the first mask to remove a part of the semiconductor layer exposed by the first mask to form a channel layer; forming a source and a drain on the channel layer on both sides of the gate, wherein the gate, the channel layer, the source and the drain form a Thin film transistor; forming a patterned protective layer on the thin film transistor to cover the channel layer and expose the drain; and A conductive layer is formed to cover the patterned protective layer and the exposed drain, and the conductive layer is patterned through the patterned protective layer to form a pixel electrode. 2. The manufacturing method of the pixel structure according to claim 1, further comprising, after forming the patterned protective layer, baking the patterned protective layer so that the patterned protective layer has a mushroom shaped top surface. 3 . The method for fabricating the pixel structure according to claim 2 , wherein the mushroom-shaped top surface of the patterned protective layer is slightly larger than the bottom surface thereof. 4 . 4. The manufacturing method of the pixel structure as claimed in claim 1, further comprising removing the patterned protective layer after forming the pixel electrode. 5. The method for manufacturing the pixel structure according to claim 1, wherein the method for forming the gate comprises: forming a first metal layer on the substrate; and patterning the first metal layer to form the gate. 6. The method for manufacturing the pixel structure according to claim 1, wherein the method for forming the gate comprises: forming a first metal layer on the substrate; providing a second mask over the first metal layer, and the second mask exposes a portion of the first metal layer; and A laser is used to irradiate the first metal layer through the second mask to remove the part of the first metal layer exposed by the second mask. 7. The method for manufacturing the pixel structure according to claim 1, wherein the method for forming the source and the drain comprises: forming a second metal layer on the channel layer and the gate dielectric layer; and The second metal layer is patterned to form the source and the drain. 8 . The method for fabricating the pixel structure according to claim 1 , wherein the patterned protective layer is formed on part of the gate dielectric layer. 9. The method for manufacturing the pixel structure according to claim 1, wherein the method for forming the patterned protective layer comprises: forming a protection layer on the gate dielectric layer and the thin film transistor; and patterning the protective layer. 10. The method for manufacturing the pixel structure according to claim 1, wherein the method for forming the patterned protective layer comprises: forming a protection layer on the gate dielectric layer and the thin film transistor; providing a third mask over the protective layer, and the third mask exposes a portion of the protective layer; and Using a laser to irradiate the protective layer through the third mask to remove the part of the protective layer exposed by the third mask. 11. The manufacturing method of the pixel structure according to claim 1, wherein the method of forming the conductive layer comprises forming an indium tin oxide layer or an indium zinc oxide layer by sputtering. 12 . The method for fabricating the pixel structure according to claim 1 , wherein the energy of the laser is between 10 and 500 mJ/cm ² . 13. The method for fabricating the pixel structure according to claim 1, wherein the wavelength of the laser light is between 100nm and 400nm. 14. The manufacturing method of the pixel structure according to claim 1, further comprising forming a lower capacitor electrode while forming the gate, and forming an upper capacitor electrode while forming the source and drain , wherein the lower capacitor electrode and the upper capacitor electrode form a storage capacitor.

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