CN102097390B - How to make pixel structure - Google Patents
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- CN102097390B CN102097390B CN 201010588415 CN201010588415A CN102097390B CN 102097390 B CN102097390 B CN 102097390B CN 201010588415 CN201010588415 CN 201010588415 CN 201010588415 A CN201010588415 A CN 201010588415A CN 102097390 B CN102097390 B CN 102097390B
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Abstract
The invention relates to a manufacturing method of a pixel structure, which comprises the following steps: first, a substrate with a first conductive layer is provided, a first mask is provided over the first conductive layer, and the first conductive layer is irradiated with laser through the first mask to form a gate. Then, a gate insulating layer is formed on the substrate to cover the gate. And simultaneously forming a channel layer, a source electrode and a drain electrode on the gate insulating layer above the gate electrode, wherein the gate electrode, the channel layer, the source electrode and the drain electrode form the thin film transistor. Then, a patterned passivation layer is formed on the thin film transistor, and the patterned passivation layer exposes a portion of the drain electrode. And then, forming a pixel electrode electrically connected with the drain electrode. The invention utilizes the laser stripping mode to manufacture the grid, and the channel layer, the source electrode and the drain electrode are simultaneously manufactured, thereby simplifying the process steps and reducing the manufacturing cost of the photomask compared with the known manufacturing method of the pixel structure.
Description
The application be that December 26, application number in 2007 are 200710305314.2 the applying date, denomination of invention divides an application for the application for a patent for invention of " manufacture method of dot structure ".
Technical field
The present invention relates to a kind of manufacture method of dot structure, and be particularly related to the manufacture method that a kind of use laser lift-off (laser ablation process) is made the dot structure of protective layer.
Background technology
The communication interface of display behaviour and information, the at present trend take flat-panel screens as main development.Flat-panel screens mainly contains following several: (thin film transistor liquid crystal display) such as organic electro-luminescent display (organic electroluminescence display), plasma scope (plasma display panel) and Thin Film Transistor-LCDs.Wherein, being most widely used with Thin Film Transistor-LCD again.Generally speaking, Thin Film Transistor-LCD mainly is made of thin-film transistor array base-plate (thin film transistor array substrate), colorful filter array substrate (color filter substrate) and liquid crystal layer (liquid crystal layer).Wherein, thin-film transistor array base-plate comprises the dot structure (pixel unit) of multi-strip scanning line (scan lines), many data wires (data lines) and a plurality of arrayed, and each dot structure is electrically connected with corresponding scan line and data wire respectively.
Figure 1A～Fig. 1 G is the manufacturing flow chart of known pixel structure.At first, please refer to Figure 1A, substrate 10 is provided, and on substrate 10, form grid 20 by the first photo-marsk process.Then, please refer to Figure 1B, form gate insulator 30 with cover grid 20 at substrate 10.Then, please refer to Fig. 1 C, on gate insulator 30, form the channel layer 40 that is positioned at grid 20 tops by the second photo-marsk process.Generally speaking, the material of channel layer 40 is amorphous silicon (amorphous silicon).Afterwards, please refer to Fig. 1 D, on the subregion of the subregion of channel layer 40 and gate insulator 30, form source electrode 50 and drain 60 by the 3rd road photo-marsk process.By Fig. 1 D as can be known, source electrode 50 is extended on the gate insulator 30 by the both sides of channel layer 40 respectively with drain electrode 60, and the subregion of channel layer 40 is exposed.Then, please refer to Fig. 1 E, on substrate 10, form protective layer 70 with cover gate insulating barrier 30, channel layer 40, source electrode 50 and drain 60.Then, please refer to Fig. 1 F, by the 4th road photo-marsk process with protective layer 70 patternings, in protective layer 70, to form contact hole H.By Fig. 1 F as can be known, the contact hole H in the protective layer 70 can expose the part district of drain electrode 60.Afterwards, please refer to Fig. 1 G, form pixel electrode 80 by the 5th road photo-marsk process on protective layer 70, by Fig. 1 G as can be known, pixel electrode 80 can see through contact hole H and be electrically connected with drain electrode 60.After pixel electrode 80 completes, just finished the making of dot structure 90.
Hold above-mentionedly, known dot structure 90 mainly is to make by five road photo-marsk processes, and in other words, dot structure 90 needs to adopt five photomasks (mask) with different pattern to make.Because the cost of photomask is very expensive, and the per pass photo-marsk process must use the photomask with different pattern, and therefore, if can't reduce the number of photo-marsk process, the manufacturing cost of dot structure 90 can't reduce.
In addition, along with the size of liquid crystal display panel of thin film transistor increases day by day, the photomask size that is used for making thin-film transistor array base-plate also can increase thereupon, and large-sized photomask will be more expensive in cost, so that the manufacturing cost of dot structure 90 can't reduce effectively.
Summary of the invention
The present invention relates to a kind of manufacture method of dot structure, it is suitable for reducing cost of manufacture.
For specifically describing content of the present invention, at this a kind of manufacture method of dot structure is proposed, it provides first substrate, and forms the first conductive layer on substrate, then provide the first shade in the first conductive layer top, and the first shade exposes the first conductive layer of part.Use laser to shine the first conductive layer through the first shade, part the first conductive layer that is exposed to remove the first shade, and form grid.Afterwards, form gate insulator on substrate, with cover gate.Then, form simultaneously channel layer, source electrode and drain on the gate insulator of grid top, wherein source electrode and drain configuration be in the subregion of channel layer, and grid, channel layer, source electrode and drain electrode formation thin-film transistor.Then, form the patterning protective layer on thin-film transistor, the patterning protective layer exposes the part drain electrode.Then, form the pixel electrode that is electrically connected drain electrode.
In pixel structure preparation method of the present invention, form simultaneously the method for channel layer, source electrode and drain electrode for example for forming first semiconductor layer on gate insulator, then, form the second conductive layer on semiconductor layer.Continue it, form the photoresist layer on the second conductive layer of grid top, wherein the photoresist layer can be divided into the first photoresist block and the second photoresist block that is positioned at the first block both sides, and the thickness of the first photoresist block is less than the thickness of the second photoresist block.Then, take the photoresist layer as mask the second conductive layer and semiconductor layer are carried out the first etch process.Then, reduce the thickness of photoresist layer, until the first photoresist block is removed fully.At last, take remaining the second photoresist block as mask the second conductive layer is carried out the second etch process, so that remaining the second conductive layer consists of source electrode and drain electrode, and remaining semiconductor layer constituting channel layer.In other embodiments, the manufacture method of channel layer, source electrode and drain electrode also comprises elder generation after forming semiconductor layer, forms ohmic contact layer in semiconductor layer surface.Then, through the first etch process and the second etch process, remove corresponding to the ohmic contact layer outside the second photoresist block.The method of above-mentioned minimizing photoresist layer thickness comprises carries out ashing (ashing) technique.
In pixel structure preparation method of the present invention, form the method for patterning protective layer, in one embodiment, for example be to form at the same time after channel layer, source electrode and the drain electrode, form protective layer on gate insulator and thin-film transistor.Then, patterning protective layer again.In another embodiment, the method that forms the patterning protective layer for example is to form at the same time after channel layer, source electrode and the drain electrode, forms protective layer on gate insulator and thin-film transistor.Then, provide again the second shade in the protective layer top, and the second shade expose the protective layer of part.Then, use laser through the second shade irradiation protective layer, the partial protection layer that is exposed to remove the second shade.In other embodiments, the method that forms the patterning protective layer for example is to form at the same time after channel layer, source electrode and the drain electrode, forms the photoresist layer in the part drain electrode.Then, form protective layer with cover gate insulating barrier, thin-film transistor and photoresist layer.Afterwards, remove the photoresist layer, so that the protective layer on the photoresist layer is removed in the lump.In another embodiment, the method for formation patterning protective layer can also be to form protective layer on gate insulator and remaining the second photoresist block.Afterwards, remove remaining the second photoresist block, so that the protective layer on the second photoresist block is removed in the lump.The above-mentioned method that removes the photoresist layer comprises lifts off technique.
In pixel structure preparation method of the present invention, form the method for pixel electrode, in one embodiment, for example be after forming the patterning protective layer, form electrode material layer on protective layer and thin-film transistor.Then, patterned electrodes material layer again.In another embodiment, the method that forms pixel electrode for example is to form the patterning protective layer, forms electrode material layer on protective layer and thin-film transistor.Then, provide again the 3rd shade in the electrode material layer top, and the 3rd shade expose the electrode material layer of part.Then; re-use laser through the 3rd shade irradiation electrode material layer; the partial electrode material layer that is exposed to remove shade; in other embodiments; the method that forms pixel electrode also can be to form the photoresist layer on the patterning protective layer, and wherein the photoresist layer exposes the drain electrode of part.Then, form electrode material layer with overlay pattern protective layer, drain electrode and photoresist layer.Then, remove the photoresist layer so that the electrode material layer on the photoresist layer is removed in the lump.The method of above-mentioned formation electrode material layer comprises by sputter formation indium tin oxide layer or indium-zinc oxide layer.In addition, the above-mentioned method that removes the photoresist layer comprises and lifts off technique.
In pixel structure preparation method of the present invention, the method that forms patterning protective layer and pixel electrode can also for example be after thin-film transistor forms, and forms protective layer on gate insulator and thin-film transistor.Then; form the photoresist layer on protective layer; with the patterning protective layer; the photoresist floor exposes drain electrode and gate contact pad district (the Gate contact pad) of part; wherein the photoresist layer can be divided into the 3rd photoresist block and the 4th photoresist block, and the thickness of the 3rd photoresist block is less than the thickness of the 4th photoresist block.Afterwards, reduce the thickness of photoresist layer, until the 3rd photoresist block is removed fully.Then, form electrode material layer, with overlay pattern protective layer, drain electrode and photoresist layer.Continue it, remove the photoresist layer, so that the electrode material layer on the photoresist layer is removed in the lump.
In pixel structure preparation method of the present invention, shining in the laser energy of the first conductive layer for example is between 10mJ/cm
2To 500mJ/cm
2Between.In addition, the wavelength of laser for example is between between the 100nm to 400nm.
Therefore the present invention utilizes the mode of laser lift-off to make grid, and so that channel layer, source electrode and drain electrode complete simultaneously, than known pixel structure preparation method, can simplify processing step and reduce the cost of manufacture of photomask.In addition, when making grid, the more known high accuracy photomask of the employed shade of laser lift-off is simple and easy, so the cost of employed shade is comparatively cheap in the laser lift-off step.
For above-mentioned feature and advantage of the present invention can be become apparent, preferred embodiment cited below particularly, and cooperation accompanying drawing are described in detail below.
Description of drawings
Figure 1A～Fig. 1 G is the manufacturing flow chart of known pixel structure.
Fig. 2 A～Fig. 2 I is the schematic diagram of the manufacture method of a kind of dot structure of the present invention.
Fig. 3 A～Fig. 3 C is a kind of laser lift-off schematic diagram that forms the patterning protective layer.
Fig. 4 A～Fig. 4 C is a kind of schematic diagram that forms the manufacture method of patterning protective layer.
Fig. 5 A～Fig. 5 B is a kind of schematic diagram that forms the manufacture method of patterning protective layer.
Fig. 6 A～Fig. 6 C is a kind of laser lift-off schematic diagram that forms pixel electrode.
Fig. 7 A～Fig. 7 C is a kind of schematic diagram that forms the manufacture method of pixel electrode.
Fig. 8 A～Fig. 8 D is a kind of schematic diagram that forms the manufacture method of patterning protective layer and pixel electrode.
And each description of reference numerals in the above-mentioned accompanying drawing is as follows:
10,200 substrates
20,212 grids
30,220 gate insulators
40,232 channel layers
50,242 source electrodes
60,244 drain electrodes
70 protective layers
80,282 pixel electrodes
90 dot structures
210 first conductive layers
230 semiconductor layers
240 second conductive layers
250,252,254 photoresist layers
250a the first photoresist block
250b the second photoresist block
250c the 3rd photoresist block
250d the 4th photoresist block
260 thin-film transistors
270 protective layers
272 patterning protective layers
280 electrode material layers
282 pixel electrodes
The H contact openings
L laser
S1 the first shade
S2 the second shade
S3 the 3rd shade
Embodiment
Fig. 2 A～Fig. 2 G is the schematic diagram of the manufacture method of a kind of dot structure of the present invention.Please refer to Fig. 2 A, substrate 200 at first is provided, the material of substrate 200 is such as being hard or the soft materials such as glass, plastic cement.Then, form the first conductive layer 210 on substrate 200, wherein the first conductive layer 210 for example is by sputter (sputtering), evaporation (evaporation) or other film deposition techniques form.
Then, shown in Fig. 2 B, provide the first shade S1 in the first conductive layer 210 tops, and the first shade S1 exposes the first conductive layer 210 of part, and use laser L to shine the first conductive layer 210 through the first shade S1.In detail, through postradiation the first conductive layer 210 of laser L can absorbing laser L energy and from substrate 200 sur-face peelings (ablation).Particularly, the energy that is used for peeling off the laser L of the first conductive layer 210 for example is between 10mJ/cm
2To 500mJ/cm
2Between.In addition, the wavelength of laser L for example is between between the 100nm to 400nm.
Afterwards, shown in Fig. 2 C, remove after part the first conductive layer 210 that the first shade S1 exposes, remaining the first conductive layer 210 consists of grids 212.It should be noted that being different from the photomask that known usefulness involves great expense carries out the making of grid 212, the present invention uses cheap shade S1 to finish the making of grid 212, therefore can save cost.
Then, please refer to Fig. 2 D, on substrate 200, form the gate insulator 220 of cover gate 212, wherein gate insulator 220 for example is by chemical vapour deposition technique (chemical vapor deposition, CVD) or other suitable film deposition techniques form, and the material of gate insulator 220 is such as being the dielectric materials such as silica, silicon nitride or silicon oxynitride.Then, on gate insulator 220, sequentially form semiconductor layer 230 and the second conductive layer 240.In the present embodiment, the material of semiconductor layer 230 for example is amorphous silicon (amorphous silicon) or other semi-conducting materials, and the material of the second conductive layer 240 for example is aluminium (Al), molybdenum (Mo), titanium (Ti), neodymium (Nd), above-mentioned nitride such as molybdenum nitride (MoN), titanium nitride (TiN), its lamination, above-mentioned alloy or other electric conducting materials.
Then please refer to Fig. 2 E, after forming the second conductive layer 240, on the second conductive layer 240 of grid 212 tops, form photoresist layer 250.Shown in Fig. 2 E, photoresist layer 250 can be divided into the first photoresist block 250a and the second photoresist block 250b that is positioned at the first photoresist block 250a both sides, and the thickness of the first photoresist block 250a is less than the thickness of the second photoresist block 250b.Then, take photoresist layer 250 as mask the second conductive layer 240 is carried out the first etch process with semiconductor layer 230.
Then, reduce the thickness of photoresist layer 250, until the first photoresist block 250a is removed fully, shown in Fig. 2 F, the method that wherein reduces photoresist layer 250 thickness for example is to adopt the mode of ashing.Please continue the F with reference to Fig. 2, after the first photoresist block 250a is removed fully, take remaining the second photoresist block 250b as mask the second conductive layer 240 be carried out the second etch process again.In the present embodiment, the first etch process, the second etch process are for example for carrying out Wet-type etching, and in other embodiments, etch process also can be dry-etching.
Afterwards, please refer to Fig. 2 G, after the technique of removing remaining photoresist layer 250, remaining the second conductive layer 240 consists of source electrode 242 and drain electrode 244, and remaining semiconductor layer 230 constituting channel layers 232, wherein source electrode 242 and drain electrode 244 are disposed at the subregion of channel layer 232, and grid 212, channel layer 232, source electrode 242 and the 244 formation thin-film transistors 260 that drain.In the present embodiment, the technique of removal photoresist layer 250 for example is wet etch process.
It should be noted that to be different from knownly that channel layer 232 of the present invention, source electrode 242 and drain 244 for what form simultaneously can reduce photo-marsk process one, and reduce the complexity of technique.In addition, the channel layer 232 of said film transistor 260, source electrode 242 for example are by forming with semi-modulation type photomask (half-tone mask) or tone photomask (gray-tone mask) technique with drain electrode 244.In addition, in other embodiments, forming the second conductive layer 240 and photoresist layer 250 (being illustrated in Fig. 2 D) before, can form ohmic contact layer (not illustrating) on the surface of semiconductor layer 230 first, then, remove again the ohmic contact layer (not illustrating) of part by the first etch process and the second etch process.For example, can utilize the mode of ion doping (ion doping) to form the N-type doped region in the surface of semiconductor layer 230, to reduce the contact impedance between semiconductor layer 230 and the second conductive layer 240.
Then please refer to Fig. 2 H, form patterning protective layer 272 on thin-film transistor 260, wherein patterning protective layer 272 exposes part drain electrode 244, and shown in Fig. 2 H, patterning protective layer 272 for example is to have the contact openings H that drain electrode 244 is exposed.In the present embodiment, the method that forms patterning protective layer 272 for example is after thin-film transistor 260 forms, and forms protective layer 270 (being illustrated in Fig. 3 A) on thin-film transistor 260 and gate insulator 220.Then, the patterning protective layer 270 again, and wherein the method for patterning protective layer 270 for example is to carry out the photoengraving carving technology.
Then, please refer to Fig. 2 I, form pixel electrode 282 on patterning protective layer 272, in the present embodiment, pixel electrode 282 is to see through contact openings H to be connected to drain electrode 244.In the present embodiment, the method that forms pixel electrode 282 for example is after patterning protective layer 272 forms, and forms electrode material layer 280 in protective layer 270 and drains on 244.Then, the patterned electrodes material layer 280 again, please refer to the description of Fig. 6 A～Fig. 6 C.
In addition, the method for above-mentioned formation patterning protective layer 272 also can utilize laser lift-off to finish, and Fig. 3 A～Fig. 3 C is a kind of laser lift-off schematic diagram that forms the patterning protective layer.Please first with reference to Fig. 3 A; after forming thin-film transistor 260; form protective layer 270 on gate insulator 220 and thin-film transistor 260; wherein the material of protective layer 270 is silicon nitride or silica for example, and the method for its formation for example is to be deposited on the substrate 200 with physical vaporous deposition or chemical vapour deposition technique comprehensively.Then such as Fig. 3 B, provide again the second shade S2 in protective layer 270 tops, and the second shade S2 expose the protective layer 270 of part.Then, use laser L through the second shade S2 irradiation protective layer 270, and through the postradiation protective layer 270 of laser L can absorbing laser L energy and from thin-film transistor 260 sur-face peelings.Afterwards, shown in Fig. 3 C, after removing the partial protection layer 270 that the second shade S2 exposes, form the patterning protective layer 272 that exposes contact openings H.
Certainly, in other embodiments, the method that forms patterning protective layer 272 can also illustrate such as Fig. 4 A～Fig. 4 C.Please first with reference to Fig. 4 A, after forming thin-film transistor 260, form photoresist layer 252 and drain on 244 in part.Then shown in Fig. 4 B, form protective layer 270, with cover gate insulating barrier 220, thin-film transistor 260 and photoresist layer 252.Afterwards, shown in Fig. 4 C, remove photoresist layer 252, so that the protective layer 270 on the photoresist layer 252 is removed in the lump, form the patterning protective layer 272 that exposes contact openings H.In the present embodiment, remove the method for photoresist layer 252 for example for lifting off technique.
In addition, Fig. 5 A～Fig. 5 B illustrates the another kind of method that forms the patterning protective layer.Please first with reference to Fig. 5 A, the method that forms patterning protective layer 272 can be before removing residue the second photoresist block 250b, forms protective layer 270 on gate insulator 220 and remaining the second photoresist block 250b.Then, please refer to Fig. 5 B, after removing remaining the second photoresist block 250b, so that the protective layer 270 on the second photoresist block 250b is removed in the lump, to form patterning protective layer 272.In the present embodiment, remove the method for photoresist layer 250b for example for lifting off technique.
In addition, the manufacture method of above-mentioned formation pixel electrode 282 also can utilize laser lift-off to finish, and Fig. 6 A～Fig. 6 C is a kind of laser lift-off schematic diagram that forms pixel electrode.Please first with reference to Fig. 6 A, after forming patterning protective layer 272, form electrode material layer 280 on patterning protective layer 272, the method that wherein forms electrode material layer 280 for example is to form indium tin oxide layer or indium-zinc oxide layer by sputter.Then, shown in Fig. 6 B, provide the 3rd shade S3 in electrode material layer 280 tops, and the 3rd shade S3 expose the part electrode material layer 280, then use laser L through the 3rd shade S3 irradiation electrode material layer 280.Then, please refer to Fig. 6 C, remove after the partial electrode material layer 280 that the 3rd shade S3 exposes, form and see through the pixel electrode 282 that contact openings H is connected to drain electrode 244.
Certainly, in other embodiments, the method that forms pixel electrode 282 can also illustrate such as Fig. 7 A～Fig. 7 C.Please first with reference to Fig. 7 A, after forming patterning protective layer 272, form photoresist layer 254 on patterning protective layer 272, wherein photoresist layer 254 exposes the drain electrode 244 of part.Then shown in Fig. 7 B, form electrode material layer 280 with overlay pattern protective layer 272, drain electrode 244 and photoresist layer 254.Then, please refer to Fig. 7 C, remove photoresist layer 254, so that the electrode material layer 280 on the photoresist layer 254 is removed in the lump, and remaining electrode material layer 280 namely consists of pixel electrode 282.The above-mentioned method that removes the photoresist layer is for example lifted off technique.
In addition, Fig. 8 A～Fig. 8 D illustrates the another kind of method that forms patterning protective layer and pixel electrode.Shown in Fig. 8 A; deposition protective layer 270 is on gate insulator 220 and thin-film transistor 260; then on protective layer 270, form photoresist layer 250; this photoresist layer 250 can be divided into the 3rd photoresist block 250c and the 4th photoresist block 250d; the 3rd photoresist block 250c is positioned on the edge of drain electrode 244 edges and reservior capacitor C; in order to avoid the second conductive layer 240 in subsequent technique; on thin-film transistor 260 and the gradient of reservior capacitor C in film stack, produced gate insulator 220 undercutting (under cut) by over etching; the 4th photoresist block 250d is positioned on the part thin-film transistor 260; and the thickness of the 3rd photoresist block 250c is less than the thickness of the 4th photoresist block 250d, and wherein the material of photoresist layer 250 for example is organic material.Then, please refer to Fig. 8 B, take photoresist layer 250 as mask protective layer 270 is carried out etching, make the drain electrode 244 that exposes part thin-film transistor 260, to form the patterning protective layer 272 shown in Fig. 8 B.
Then, shown in Fig. 8 C, reduce the thickness of photoresist layer 250, until the 3rd photoresist block 250c is removed fully.After the 3rd photoresist block 250c is removed fully; only stay the 4th photoresist block 250d; then deposition of electrode material layer 280 covers on the 4th photoresist block 250d, the drain electrode 244 that exposes part transistor 260, part substrate 200 and the patterning protective layer 272; then remove residue photoresist layer 250d; so that the electrode material layer 280 on the residue photoresist layer 250d is removed simultaneously; and remaining conductive layer namely consists of the pixel electrode 282 shown in Fig. 8 D, and is electrically connected with the drain electrode 244 of transistor 260.
Based on above-mentioned, the present invention makes channel layer, source electrode and drain electrode simultaneously, therefore than known advantage with minimizing processing step.And the present invention adopts the mode of laser L irradiation to form grid, but not adopts known photoengraving carving technology, and therefore the manufacture method of dot structure proposed by the invention has following advantages at least:
1. the manufacture method of the dot structure that proposes of the present invention, its grid technology need not use photoetching process, so than the employed high accuracy photo-marsk process of photoetching process, can reduce the cost of manufacture of photomask.
2. because to make the technique of dot structure less, can reduce the defective that tediously long photo-marsk process (divest such as photoresist coating, soft roasting, hard roasting, exposure, development, etching, photoresist etc.) produces when making dot structure.
3. the method for laser lift-off partial protection layer proposed by the invention can be applied to the repairing of the pixel electrode in the pixel repairing; with in dot structure technique; remove the residual pixel electrode (ITO residue) of possibility; solve the short circuit problem between the pixel electrode, and then increase the production qualification rate.
Although the present invention with preferred embodiment openly as above; but it is not to limit the present invention; any those skilled in the art without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking the scope that the claim of enclosing defines.
Claims (8)
1. the manufacture method of a dot structure comprises:
One substrate is provided;
Form one first conductive layer on this substrate;
Provide one first shade in this first conductive layer top, and this first shade expose this first conductive layer of part;
Use laser to shine this first conductive layer through this first shade, this first conductive layer of part that is exposed to remove this first shade, and form a grid;
Form a gate insulator on this substrate, to cover this grid;
Form a channel layer, one source pole and and drain on this gate insulator of this grid top, wherein this source electrode and this drain configuration be in the subregion of this channel layer, and this grid, this channel layer, this source electrode and should drain electrode formation thin-film transistor;
Form a protective layer on this gate insulator and this thin-film transistor;
Form one first photoresist layer on this protective layer, this the first photoresist layer exposes this drain electrode and this gate insulator of part, wherein this first photoresist layer is divided into the 3rd photoresist block and the 4th photoresist block, and the 3rd photoresist block is positioned at the thickness of this drain edge and the 3rd photoresist block less than the thickness of the 4th photoresist block;
This protective layer of patterning is to form a patterning protective layer, and wherein this patterning protective layer of part is positioned at this drain edge;
Reduce the thickness of this first photoresist layer, until the 3rd photoresist block is removed fully;
Form an electrode material layer, to cover this patterning protective layer, this drain electrode and the 4th photoresist block; And
Remove the 4th photoresist block, this electrode material layer on the 4th photoresist block is removed in the lump, to form a pixel electrode that is electrically connected at this drain electrode.
2. the manufacture method of dot structure as claimed in claim 1, the method that wherein forms this channel layer, this source electrode and this drain electrode comprises:
Form semi-conductor layer on this gate insulator;
Form one second conductive layer on this semiconductor layer;
Form one second photoresist layer on this second conductive layer of this grid top, wherein this second photoresist layer is divided into the first photoresist block and the second photoresist block that is positioned at these the first photoresist block both sides, and the thickness of this first photoresist block is less than the thickness of this second photoresist block;
Take this second photoresist layer as mask this second conductive layer and this semiconductor layer are carried out the first etch process;
Reduce the thickness of this second photoresist layer, until this first photoresist block is removed fully; And
Take remaining this second photoresist block as mask this second conductive layer is carried out the second etch process, so that remaining this second conductive layer consists of this source electrode and this drain electrode, and this remaining semiconductor layer consists of this channel layer.
3. the manufacture method of dot structure as claimed in claim 2, the method that wherein reduces this second photoresist layer thickness comprises carries out cineration technics.
4. the manufacture method of dot structure as claimed in claim 2, the method that wherein forms this channel layer, this source electrode and this drain electrode also comprises:
After forming this semiconductor layer, and before forming this second conductive layer and this second photoresist layer, form ohmic contact layer in this semiconductor layer surface: and
Through this first etch process and this second etch process, remove corresponding to this ohmic contact layer outside this second photoresist block.
5. the manufacture method of dot structure as claimed in claim 1, wherein the energy of this laser is between 10mJ/cm
2To 500mJ/cm
2Between.
6. the manufacture method of dot structure as claimed in claim 1, wherein the wavelength of this laser is between between the 100nm to 400nm.
7. the manufacture method of dot structure as claimed in claim 1, the method that wherein forms this electrode material layer comprise by sputter and form an indium tin oxide layer or an indium-zinc oxide layer.
8. the manufacture method of dot structure as claimed in claim 1, the method that wherein removes the 4th photoresist block comprises lifts off technique.
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| CN1728363A (en) * | 2004-07-27 | 2006-02-01 | 三星电子株式会社 | Thin film transistor array panel and manufacturing method thereof |
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