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BR9709319A - Elemento de substrato para um chip semicondutor - Google Patents

Elemento de substrato para um chip semicondutor

Info

Publication number
BR9709319A
BR9709319A BR9709319-0A BR9709319A BR9709319A BR 9709319 A BR9709319 A BR 9709319A BR 9709319 A BR9709319 A BR 9709319A BR 9709319 A BR9709319 A BR 9709319A
Authority
BR
Brazil
Prior art keywords
semiconductor chip
substrate element
carrier element
structured
etching
Prior art date
Application number
BR9709319-0A
Other languages
English (en)
Inventor
Detlef Houdeau
Michael Huber
Volker Rohde
Richard Scheuenpflug
Peter Stampka
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19620025A external-priority patent/DE19620025A1/de
Priority claimed from DE19635732A external-priority patent/DE19635732A1/de
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of BR9709319A publication Critical patent/BR9709319A/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745—Mounting details of integrated circuit chips
    • G06K19/07747—Mounting details of integrated circuit chips at least one of the integrated circuit chips being mounted as a module
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07743—External electrical contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3421—Leaded components
    • H05K3/3426—Leaded components characterised by the leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Credit Cards Or The Like (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Structure Of Printed Boards (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Die Bonding (AREA)

Abstract

Patente de Invenção: <B>''ELEMENTO DE SUSBTRATO PARA UM CHIP SEMICONDUTOR''<D>. Esta invenção refere-se a um elemento de substrato para um chip semicondutor, para a incorporação em cartões de chip, bem como para a soldagem sobre placas usando a tecnologia SMD. Para esta finalidade, o forro de cobre de uma folha de plástico (1) é estruturado de tal maneira por meio de causticação que superfícies de contato são configiradas em uma peça com pistas de contato (4) que terminam na borda do elemento de substrato, as quais possibilitam uma segura soldagem.
BR9709319-0A 1996-05-17 1997-05-14 Elemento de substrato para um chip semicondutor BR9709319A (pt)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE19620025A DE19620025A1 (de) 1996-05-17 1996-05-17 Trägerelement für einen Halbleiterchip
DE19635732A DE19635732A1 (de) 1996-09-03 1996-09-03 Trägerelement für einen Halbleiterchip
PCT/DE1997/000977 WO1997044823A1 (de) 1996-05-17 1997-05-14 Trägerelement für einen halbleiterchip

Publications (1)

Publication Number Publication Date
BR9709319A true BR9709319A (pt) 2000-05-09

Family

ID=26025806

Family Applications (1)

Application Number Title Priority Date Filing Date
BR9709319-0A BR9709319A (pt) 1996-05-17 1997-05-14 Elemento de substrato para um chip semicondutor

Country Status (13)

Country Link
US (1) US6326683B1 (pt)
EP (1) EP0902973B1 (pt)
JP (1) JP3080175B2 (pt)
KR (1) KR20000010876A (pt)
CN (1) CN1134064C (pt)
AT (1) ATE207243T1 (pt)
BR (1) BR9709319A (pt)
DE (1) DE59704976D1 (pt)
ES (1) ES2166082T3 (pt)
IN (1) IN190208B (pt)
RU (1) RU2156521C2 (pt)
UA (1) UA46842C2 (pt)
WO (1) WO1997044823A1 (pt)

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US6803656B2 (en) * 1997-12-31 2004-10-12 Micron Technology, Inc. Semiconductor device including combed bond pad opening
JP3532123B2 (ja) * 1999-07-06 2004-05-31 日本圧着端子製造株式会社 集積回路内蔵カード
JP3494100B2 (ja) * 2000-01-11 2004-02-03 富士通株式会社 半導体装置及びその実装方法
EP1119047A1 (de) * 2000-01-18 2001-07-25 Infineon Technologies AG Flächiger Träger für ein Chipmodul und Herstellungsverfahren für ein Chipmodul
ES2177447B1 (es) * 2000-12-29 2004-08-16 Lear Automotive (Eeds) Spain, S.L. Circuito electronico con terminales de conexion integrados y metodo para su fabricacion.
DE60320148T2 (de) * 2003-05-09 2009-05-20 Widex A/S Verfahren zum herstellen eines trägerelements für ein hörgerät und trägerelement für ein hörgerät
JP4037332B2 (ja) * 2003-07-10 2008-01-23 シャープ株式会社 Ｉｃモジュールおよびｉｃカード
DE10352079A1 (de) * 2003-11-08 2005-06-02 Robert Bosch Gmbh Elektromotor, sowie Verfahren zur Herstellung eines solchen
DE102004011702B4 (de) * 2004-03-10 2006-02-16 Circle Smart Card Ag Verfahren zur Herstellung eines Kartenkörpers für eine kontaktlose Chipkarte
JP4472582B2 (ja) * 2005-05-27 2010-06-02 日本メクトロン株式会社 可撓性回路基板の実装処理方法
EP2189928A1 (fr) * 2008-11-21 2010-05-26 Gemalto SA Dispositif à circuit integré muni de différents moyens de connexion
WO2011087168A1 (ko) * 2010-01-15 2011-07-21 삼성엘이디 주식회사 인쇄회로기판
US8649820B2 (en) 2011-11-07 2014-02-11 Blackberry Limited Universal integrated circuit card apparatus and related methods
US8936199B2 (en) 2012-04-13 2015-01-20 Blackberry Limited UICC apparatus and related methods
USD703208S1 (en) 2012-04-13 2014-04-22 Blackberry Limited UICC apparatus
USD701864S1 (en) 2012-04-23 2014-04-01 Blackberry Limited UICC apparatus
CN103928431B (zh) * 2012-10-31 2017-03-01 矽力杰半导体技术(杭州)有限公司 一种倒装封装装置
US9368427B2 (en) * 2013-02-01 2016-06-14 Mxtran Inc. Integrated circuit film and method of manufacturing the same
US9418254B2 (en) * 2013-02-01 2016-08-16 Mxtran Inc. Integrated circuit film and method for manipulating the same
USD729808S1 (en) * 2013-03-13 2015-05-19 Nagrastar Llc Smart card interface
USD780763S1 (en) * 2015-03-20 2017-03-07 Nagrastar Llc Smart card interface
US20160314721A1 (en) * 2015-04-24 2016-10-27 Kabushiki Kaisha Toshiba Anti-tamper label and storage device with the same
CN107025481B (zh) * 2016-02-02 2021-08-20 上海伯乐电子有限公司 柔性印制电路板及应用其的智能卡模块和智能卡
DE102016110780B4 (de) 2016-06-13 2024-10-10 Infineon Technologies Austria Ag Chipkartenmodul und Verfahren zum Herstellen eines Chipkartenmoduls

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DE3046192A1 (de) * 1980-12-08 1982-07-15 GAO Gesellschaft für Automation und Organisation mbH, 8000 München Traegerelement fuer ic-bausteine
DE3123198C2 (de) 1980-12-08 1993-10-07 Gao Ges Automation Org Trägerelemente für einen IC-Baustein
DE3234745C2 (de) 1982-09-20 1986-03-06 Siemens AG, 1000 Berlin und 8000 München Verfahren zur Handhabung von filmmontierten integrierten Schaltkreisen und Vorrichtung zu seiner Durchführung
FR2548857B1 (fr) 1983-07-04 1987-11-27 Cortaillod Cables Sa Procede de fabrication en continu d'une carte imprimee
FR2588695B1 (fr) * 1985-10-11 1988-07-29 Eurotechnique Sa Procede de fabrication d'un microboitier, microboitier a contacts effleurants et application aux cartes contenant des composants
FR2617668B1 (fr) * 1987-07-03 1995-07-07 Radiotechnique Compelec Dispositif comportant un circuit electronique monte sur un support souple et carte souple le comprenant
GB8723734D0 (en) 1987-10-09 1987-11-11 De La Rue Co Plc Ic modules
FR2624651B1 (fr) * 1987-12-14 1991-09-06 Sgs Thomson Microelectronics Procede de mise en place d'un composant electronique et de ses connexions electriques sur un support et produit ainsi obtenu
DE3809005A1 (de) * 1988-03-17 1989-09-28 Hitachi Semiconductor Europ Gm Chipmodul und seine herstellung und verwendung
US5162894A (en) * 1988-05-24 1992-11-10 Kabushiki Kaisha Toshiba Semiconductor integrated circuit having a dummy lead and shaped inner leads
DE3901402A1 (de) 1989-01-19 1990-07-26 Telefonbau & Normalzeit Gmbh Verfahren zur herstellung einer chipkarte
US5294829A (en) * 1990-01-26 1994-03-15 Sgs-Thomson Microelectronics, Inc. IC package having direct attach backup battery
US5289034A (en) * 1990-01-26 1994-02-22 Sgs-Thomson Microelectronics, Inc. IC package having replaceable backup battery
US5399903A (en) * 1990-08-15 1995-03-21 Lsi Logic Corporation Semiconductor device having an universal die size inner lead layout
JPH05294093A (ja) * 1991-03-22 1993-11-09 Toshiba Corp 携帯可能記憶媒体
JP2509422B2 (ja) * 1991-10-30 1996-06-19 三菱電機株式会社 半導体装置及びその製造方法
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Also Published As

Publication number Publication date
KR20000010876A (ko) 2000-02-25
EP0902973B1 (de) 2001-10-17
JP3080175B2 (ja) 2000-08-21
UA46842C2 (uk) 2002-06-17
RU2156521C2 (ru) 2000-09-20
CN1134064C (zh) 2004-01-07
US6326683B1 (en) 2001-12-04
ATE207243T1 (de) 2001-11-15
DE59704976D1 (de) 2001-11-22
CN1218575A (zh) 1999-06-02
WO1997044823A1 (de) 1997-11-27
ES2166082T3 (es) 2002-04-01
IN190208B (pt) 2003-06-28
JPH11510652A (ja) 1999-09-14
EP0902973A1 (de) 1999-03-24

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Legal Events

Date Code Title Description
FF Decision: intention to grant
FG9A Patent or certificate of addition granted
B24C Patent annual fee: request for for restoration

Free format text: REFERENTE A 8A , 9A , 10A , 11A E 12A ANUIDADES.

B21F Lapse acc. art. 78, item iv - on non-payment of the annual fees in time

Free format text: REFERENTE AO DESPACHO 24.3 PUBLICADO NA RPI 2002 DE 19/05/2009.