INDEX

SL.NO TITLE OF THE EXPERIMENT PAGE NO.

1 Transistor Biasing Circuits 01

2 Design of Half Wave Rectifier with and without filter 04

3 Design of Full Wave Rectifier with and without filter 07

4 Voltage Regulator 10

5 Half Adders and Full Adders 13

6 Half Subtractor and Full Subtractor 16

7 Flip Flop 19

8 Binary Counters 23

9 Shift Register 25

10 Code Converters 27

11 Bridge Rectifier With And Without Filter 29

12 Common Emitter Amplifier 31

Common-Source Amplifier
33
13
Two Stage R-C Coupled Amplifier
14 35
FAQ
37

2
Expt. No: 1
Date: TRANSISTOR BIASING CIRCUITS

AIM: To design different biasing circuits for a transistor.

.

APPARATUS REQUIRED –

Sl.No. Description Range / Number/ Value Qty

1 Regulated Power supply (0-30) V 1
2 Transistor BC 547 1
3 DC Ammeters (0-250) μA 1
4 DC Voltmeter (0-50) mA 2
5 Resistor As per design Each one
6 Bread board and Connecting wires

THEORY

1. FIXED BIAS The simplest transistor biasing circuit is referred to as base bias (or fixed bias). The name stems
from the fact that the current through the base circuit ( ) remains relatively fixed from one transistor to another. That
is A transistor circuit in which a current flowing through a resistor is independent of the quiescent collector current is
called fixed bias. A base bias circuit is shown (along with its primary mathematical relationships) in figure . Note that
the load line equations are used to plot the dc load line for the circuit, while the Q-point equations are used to
determine the Q-point values of and .

2. COLLECTOR FEEDBACK BIAS The term feedback is used to describe a circuit configuration where a
sample of the output signal is fed back to the circuit input to control the circuit operation. There are two types of
feedback that are used to bias transistors: collector-feedback bias and emitter-feedback bias. Collector-feedback bias
is designed so that the collector voltage ( ) directly affects the value of . A collector-feedback bias circuit is shown
(along with its primary mathematical relationships) in figure

Emitter-feedback bias is designed so that the emitter voltage ( ) affects the value of . The Q-point analysis
of an emitter-feedback bias circuit is demonstrated in Example 7.15. The emitter-to-base feedback is evidenced by:
The addition of an emitter resistor ( ), which produces an emitter voltage ( ) that affects the values of and .
The presence of

3. VOLTAGE DIVIDER BIAS: Voltage-divider bias (which is sometimes referred to as universal bias) is the most
commonly used transistor-biasing scheme. The circuit can be identified by the voltage divider in the transistor base
circuit. A voltage-divider bias circuit is shown (along with its primary mathematical relationships) in Figure.

3
CIRCUIT DIAGRAM:

DESIGN CALCULATION
FIXED BIAS
(i) Vcc = IbRb + Vbe
(ii) Vcc = IcRc + Vcc

Here Vcc = 12V, Vbe = 0.7V, Ib = 20µA, Ic = 2.5mA

Rb = = = 565 KΩ BC 547 PIN DETAILS

Rc = = = 2.4 KΩ

COLLECTOR FEEDBACK BIAS

(i) Vcc = Rc (Ic + Ib) + IbRb + Vbe = IeRe
(ii) Vcc = (Ic + Ib) Rc + Vce + IeRe
IeRe = Vb – Vbe

Re = = 198 Ω

4
Rc = = = 2.2 KΩ

Rb =

= = 265 KΩ

VOLTAGE DIVIDER BIAS

R1 = 100 KΩ R2 = 10 KΩ

Vb = = = 1.09 V

IeRe = 1.09 – 0.7

Re = = 156 Ω

Vcc = IcRc + Vce = IeRe

Rc = = = 2.2 KΩ

PROCEDURE:
1. Circuits connections are made for all biasing circuits based on circuit diagram.
2. DC voltages and currents are noted for different biasing circuits.
3. Theoretical and practical values are verified.
TABULATION
Sl.No. Biasing Theoretical Value Practical Value
Ib = 20µA Ib = µA
1 Fixed Biasing
Ic = 2.5 mA Ic = mA
Ib = 20 µA Ib = µA
2 Feedback Biasing
Ic = 2.5 mA Ic = mA
Ic = 2.5 mA Ic = mA
3 Voltage Divider Biasing
Ie = 2.5 mA Ie = mA

RESULT:
The fixed bias, collector feedback and voltage divider bias circuits are verified.

5
Expt. No: 2
Date: DESIGN OF HALFWAVE RECTIFIER WITH AND WITHOUT FILTER
AIM:
To design the Half Wave Rectifier with and without filter for the given data.

APPARATUS REQUIRED:

Sl.No. Description Range / Number/ Value Qty

1 Diode 1N4007 1
2 Step down Transformer As per design 1
3 DC Ammeters (0-50) Ma 1
4 DC Voltmeter (0-30) V 1
5 Resistor As per design
6 Capacitor As per design
7 Bread board and Connecting wires

THEORY:
Rectifier is defined as the conversion of alternating current (AC) to direct current (DC). The simplest kind of
rectifier circuit is the half-wave rectifier. It only allows one half of an AC waveform to pass through to the load. In half
wave rectification, either the positive or negative half of the AC wave is passed, while the other half is blocked.
Because only one half of the input waveform reaches the output, it is very inefficient if used for power transfer. Half-
wave rectification can be achieved with a single diode in a one-phase supply, or with three diodes in a three-phase
supply. Half wave rectifiers yield a unidirectional but pulsating direct current

6
CIRCUIT DIAGRAM

MODRL GRAPH :

7
PROCEDURE:
1. Circuit connections are made as shown in the circuit diagram.
2. Using design calculations the values of resistance, capacitor, and rating of the transformer are fixed.
3. The output waveform of HWR is observed using CRO.
4. The Voltmeter and ammeter readings show Vdc and Idc respectively.
5. Using the standard formula, the values for ripple factor efficiency and regulation are calculated.
6. The above procedure is repeated for various values of RL.
7. For HWR with filter, a capacitor is connected across R and it serves to bypass AC components to ground.
8. The above procedure is repeated and observations are made as earlier.

TABULATION:

Sl. No. Description Theoretical Value Practical Value

1 I dc 17 mA
2 V dc 9V

WAVEFORM:

Sl. No. Description Time period (in ms) Amplitude (in Volts)

1 Input Wave form

Output Waveform
2
(With out Filter)

Output Waveform
3 ---------------
(With Filter)

RESULT:
The design of half wave rectifier with and without filter has been performed and the regulation and efficiency
curves are drawn.

8
Expt. No: 3
Date FULL WAVE RECTIFIER WITH AND WITHOUT FILTER
AIM:
To design a Full Wave Rectifier with and without filter circuits for the given data.

APPARATUS REQUIRED:

Sl.No. Description Range / Number/ Value Qty

1 Diode 1N4007 1
2 Centre tap Transformer As per design 1
3 DC Ammeters (0-50) mA 1
4 DC Voltmeter (0-30) V 1
5 Resistor As per design
6 Capacitor As per design
7 Bread board and Connecting wires

THEORY: A Full Wave Rectifier is a circuit, which converts an ac voltage into a pulsating dc voltage using both half
cycles of the applied ac voltage. It uses two diodes of which one conducts during one half cycle while the other
conducts during the other half cycle of the applied ac voltage. During the positive half cycle of the input voltage, diode
D1 becomes forward biased and D2 becomes reverse biased. Hence D1 conducts and D2 remains OFF. The load
current flows through D1 and the voltage drop across RL will be equal to the input voltage.

9
CIRCUIT DIAGRAM

OUTPUT WAVE FORMS

10
PROCEDURE:
1. Connections are made as per the circuit diagram.
2. Using design calculation values of resistance, supply voltage and other ratings are calculated.
3. The output waveform of FWR is plotted using CRO. The output is pulsating dc.
4. V and I values are obtained from voltmeter and ammeter readings respectively.
5. For FWR with filter a capacitor is shunted across the load. The value of capacitance is obtained from design
calculations.

TABULATION:

Sl. No. Description Theoretical Value Practical Value

1 I dc 11 mA
2 V dc 10.7 V

WAVEFORM:

Sl. No. Description Time period (in ms) Amplitude (in Volts)

1 Input Wave form

Output Waveform
2
(With out Filter)

Output Waveform
3 ---------------
(With Filter)

RESULT:

The design of Full Wave Rectifier with and without filter has been performed and the graph is drawn.

11
Expt. No: 4
Date VOLTAGE REGULATOR
AIM:
To obtain the load and line regulation characteristics of series voltage regulator
APPARATUS REQUIRED:

Sl.No. Description Range / Number/ Value Qty

1 Regulated Power Supply (0-30)V 1
2 Transistor 2N3055 1
3 Zener Diode As per design 1
4 DC Ammeter (0-50) mA 1
5 DC Voltmeter (0-30) V 1
6 Resistors As per design
7 DRB 1
8 Bread board and Connecting wires

THEORY:
The limitations of an ordinary zener diode regulator are, the changes in current flowing through the zener
diode cause changes in output voltage, the maximum load current that can be supplied is limited and large amount of
power is wasted in zener diode and series resistance. These defects are rectified in a zener regulator with emitter
follower output. It is a circuit that combines a zener regulator and an emitter follower. The dc output voltage of the
emitter follower is
Vo = Vz – Vbe
When input voltage changes, zener voltage remains the same and so does the output voltage. In an ordinary
zener regulator, if the load current IL required is in the order of amperes, zener diode should also have the same
current handling capacity. But in zener regulator with emitter follower output, current owing through the zener is
IL /β. Another advantage of this circuit is low output impedance. The expression for the output voltage can also be
expressed as
Vo = Vi - Vce..
This means that when the input voltage increases, output remains constant by dropping excess voltage across
the transistor. The limitation of this circuit is that the output voltage directly depends on the zener voltage. This is
rectified in the series voltage regulator with feedback using error amplifier.

A simple series voltage regulator using an NPN transistor and a Zener diode is shown in the figure. This circuit is
called a series regulator because collector and emitter terminals of the transistor are in series with the load, as
illustrated in the figure. This circuit is also called an emitter follower voltage regulator because transistor Q is
connected in emitter follower configuration. Here, the transistor Q is termed a series-pass transistor. The unregulated
dc supply (or filtered output from the rectifier) is fed to the input terminals and regulated output voltage V out is obtained
across the load resistor RL. Zener diode provides the reference voltage and the transistor acts as a variable resistor,
whose resistance varies with the operating conditions (base current IB). The principle of operation of such a regulator is
based on the fact that a large proportion of the change in supply (or input) voltage appears across the transistor and,
therefore output voltage tends to remain constant. Keeping in mind the polarities of different voltages we have
Vout = Vz – VBE

12
DESIGN CALCULATION:
Vo = 6.5 V Vin = 140% Vc

Iz = 20 mA Vz = 6.1 V

Ib = = = = 150

RL = = = 325Ω % Regulation =

CIRCUIT DIAGRAM

13
PROCEDURE:
1. Connections are made as per the circuit diagram.
2. The resistance R1, is kept constant at same constant level. For different values of input
voltage, output voltage is rated.
3. Now introduce an ammeter between emitter and variable resistance. Keep the i/p voltage at
constant level and different value if R measure the output voltage and current.
4. Graph are drawn between output voltage vs RL and output voltage vs i/p voltage.

TABULATION:
LINE REGULATION LOAD REGULATION
RL = 325 Ω V in = 10 V
Sl.No. V in (V) V out Sl.No. RL in Ω IL in mA
1 0 1 100 Ω
2 1 2
3 2 3
4 3 4
5 4 5
6 5 6
7 6 7
8 7 8
9 8 9
10 9 10
11 10 11
12 12
13 15
RESULT:

The transistor series voltage regulator was designed and its load and line regulation characteristics are drawn.

14
Expt. No: 5
Date HALF ADDERS AND FULL ADDERS
AIM: To construct and verify their truth table for the combinational Logic circuit of Half Adder and
Full Adder.

APPARATUS REQUIRED:

Sl.No. Description Range / Number/ Value Qty

1 IC Trainer Kit 1
2 IC 7408, IC 7432, IC 7486 Each one
3 Bread board and Connecting wires

THEORY:

Adder : Digital computers perform a variety of information –processing task. Among the basic
functions encountered are the various arithmetic operations. The most basic arithmetic operation, no
doubt is the addition of two binary digit. The simple addition consist of four possible elementary
operations namely 0+0=0, 0+1=1, 1+0=1, 1+1=10. A combinational circuit that performs the addition of
two bits is called half adder & addition f three bits is called full adder.

Half –Adder From the verbal explanation of a half-adder, we find that this circuit needs two binary
inputs and two output. It is necessary to specify two output variables because the result may consist of
two binary digit. We assign symbol x and y the two input and S (for sum) and C (for carry) to the output.
The simplified Boolean function for the two outputs can be obtained directly from the truth table. The
simplified expressions are:
S  XY  X Y C  XY
Full–Adder: A full adder is a combinational circuit that performs the arithmetic sum of three input
bits. It consists of three input and two outputs. Two of the input variables, denoted by x and y. the third
input z represents the carry from the previous lower significant position. Two outputs are necessary
because the arithmetic sum of three binary digit ranges in value from 0 to3. Two outputs denoted by the
symbols S for sum and C for carry. The simplified Boolean function for the two outputs can be obtained
directly from the truth table. The simplified expressions are:
S  X Y Z  X Y Z  X Y Z  XYZ
After simplification we obtain the following equation.
S  Z  ( X  Y ) C  Z ( X Y  XY )
The simplified Boolean function for the two outputs can be obtained directly from the truth
table. The simplified expressions are:
S  X Y Z  X Y Z  X Y Z  XYZ
After simplification we obtain the following equation.
S  Z  (X  Y) C  Z ( X Y  XY )

15
CIRCUIT DIAGRAM:

PIN DIAGRAM

16
TRUTHTABLE

HALF ADDER FULL ADDER

Sl.No. A B SUM CARRY Sl.No. A B Co SUM CARRY

1 0 0 0 0 1 0 0 0 0 0
2 0 1 1 0 2 0 0 1 1 0
3 1 0 1 0 3 0 1 0 1 0
4 1 1 0 1 4 0 1 1 0 1
5 1 0 0 1 0
6 1 0 1 0 1
7 1 1 0 0 1
8 1 1 1 1 1

PROCEDURE:
1. Mount AND gate IC (7408 2-input Quad) , XOR gate IC (7486 2-input Quad) and OR gate
IC (7432) 2-input Quad in the bread board
2. Apply Vcc +5V to pin number 14 and connect pin number 7 to ground
3. Make connections as shown in the respective circuit diagram.
3. Apply input condition as per truth table [for 0 = LOW & 1 = HIGH].
4. Observe the output on LEDs.
5. Fill up the observation table.
RESULT
The Half adder and Full adder circuits are constructed and their truth tables are verified

17
Expt. No:6
Date HALF AND FULL SUBTRACTORS
AIM: To construct and verify their truth table for the combinational Logic circuit of Half Subtractor
and Full Subtractor
APPARATUS REQUIRED:
Sl.No. Description Range / Number/ Value Qty
1 IC Trainer Kit 1
2 IC 7404, IC 7408, IC 7432, IC 7486 Each one
3 Bread board and Connecting wires

THEORY :
Subtractor : The subtraction of two binary numbers may be accomplished by taking the complement of
the subtrahend and adding it to the minuend. It is possible to implement subtraction with logic circuit in a direct
manner. By this method each subtrahend bit of the number is subtracted from its corresponding significant
minuend bit to form a difference bit. If the minuend bit is smaller than the subtrahend bit, a 1 is borrowed from the
next significant position the fact that a 1 has been borrowed must be conveyed to the next higher pair of bits by
means of a binary signal coming out of a given stage and going into the next higher stage.

Half –Subtractor : A half subtractor is a combinational circuit that subtracts two bits and produces their
difference. It also has an output to specify if a 1 has been borrowed. Designate the minuend bit by x and
subtrahend bit by y. to perform x-y, we have to check the relative magnitude of x and y. The half subtractor needs
two outputs. One is generate the difference and designate by the symbol D. Second output designates B for
borrowed. The truth table for the input-output relationship of a half subtractor is shown below.

The simplified Boolean function for the two outputs can be obtained directly from the truth table. The
simplified expressions are:
D  XY  X Y B  XY

Full –Subtractor A full subtractor is a combinational circuit that performs a subtraction between two bits
taking into account that a 1 may have been borrowed by a lower significant stage. This circuit has three inputs
and two outputs. The three inputs x y and z denote the minuend, subtrahend and previous borrow, respectively.
The two outputs, D and B represent the difference and outputs borrow respectively. The simplified Boolean
function for the two outputs can be obtained directly from the truth table. The simplified expressions are:

D  X Y Z  XY Z  X Y Z  XYZ
D  X Y  Z
B  XY  Z ( X  Y )

18
CIRCUIT DIAGRAM:
PIN DIAGRAM

PIN DIAGRAM

19
 PROCEDURE :

1. Mount AND gate IC (7408 2-input Quad) , XOR gate IC (7486 2-input Quad) ,NOT gate
IC (7404 ) and OR gate IC (7432 2-input Quad) in the bread board
2.Apply Vcc +5V to pin number 14 and connect pin number 7 to ground
3. Make connections as shown in the respective circuit diagram.
3. Apply input condition as per truth table [for 0 = LOW & 1 = HIGH].
4. Observe the output on LEDs.
5. Fill up the observation table.

TRUTHTABLE

HALF SUBTRACTOR

Sl.No. X Y DIFFERENCE BORROW

1 0 0 0 0
2 0 1 1 1
3 1 0 1 0
4 1 1 0 0

FULL SUBTRACTOR

Sl.No. A B Co DIFFERENCE BORROW

1 0 0 0 0 0
2 0 0 1 1 1
3 0 1 0 1 0
4 0 1 1 0 0
5 1 0 0 1 0
6 1 0 1 0 0
7 1 1 0 0 0
8 1 1 1 1 1

RESULT
The Half subtractor and Full subtractor circuits are constructed and their truth tables are verified

20
Expt. No: 7
Date FLIP FLOP
AIM:
To construct the following flip flop using logic gates and verify their truth table RS, JK, D and T flip flops.

APPARATUS REQUIRED:
Sl.No. Description Range / Number/ Value Qty
1 IC Trainer Kit 1
2 IC 7400, IC 7404, IC 7410 Each one
3 Bread board and Connecting wires

IC Trainer Kit, IC 7400, 7410.

THEORY :
Flip-flop is a circuit that has two stable states and can be used to store state information. The circuit can
be made to change state by signals applied to one or more control inputs and will have one or two outputs. A
circuit incorporating flip-flops has the attribute of state; its output depends not only on its current input, but also on
its previous inputs. Flip-flops are used as data storage elements, for counting of pulses, and for synchronizing
randomly-timed input signals to some reference timing signal. Flip-flops are a fundamental building block of digital
electronics systems used in computers, communications, and many other types of systems. Flip-flops can be
divided into common types: the RS ("set-reset"), D ("data" or "delay‖), T(toggle), and JK types are the common
ones. The behavior of a particular type can be described by what is termed the characteristic equation, which
derives the "next" (i.e., after the next clock pulse) output, Qnext, in terms of the input signal(s) and/or the current
output, Q.
RS FLIP FLOP: In a sequential system it is required to set or reset a flip flop in synchronism with clock pulses.
RS flip-flop circuit can be constructed from two NAND gates and by applying the clock pulse. When Q=1 and
Q'=0, it is in the set state (or 1-state). When Q=0 and Q'=1, it is in the clear state (or 0-state). The outputs Q and
Q' are complements of each other and are referred to as the normal and complement outputs, respectively. When
a 1 is applied to both the set and reset inputs, both Q and Q' outputs go to 0. This condition violates the fact that
both outputs are complements of each other. In normal operation this condition must be avoided by making sure
that 1's are not applied to both inputs simultaneously.

CIRCUIT DIAGRAM

21
JK FLIP FLOP:

A JK flip-flop is a refinement of the SR flip-flop in that the indeterminate state of the SR type is defined in
the JK type. Inputs J and K behave like inputs S and R to set and clear the flip-flop (note that in a JK flip-flop, the
letter J is for set and the letter K is for clear). When logic 1 inputs are applied to both J and K simultaneously, the
flip-flop switches to its complement state, ie., if Q=1, it switches to Q=0 and vice versa. A clocked JK flip-flop is
shown in figure. Output Q is ANDed with K and clock inputs so that the flip-flop is cleared during a clock pulse
only if Q was previously 1. Similarly, ouput Q' is ANDed with J and CP inputs so that the flip-flop is set with a
clock pulse only if Q' was previously 1.

CIRCUIT DIAGRAM

TRUTH TABLE FOR JK FLIPFLOP

J K CLK Q Q‾
0 0 1 No change No change
0 1 1 0 1
1 0 1 1 0
1 1 1 Toggle Toggle

22
D FLIP FLOP:

The D flip-flop shown in figure is a modification of the clocked SR flip-flop. The D input goes directly into the S
input and the complement of the D input goes to the R input. The D input is sampled during the occurrence of a
clock pulse. If it is 1, the flip-flop is switched to the set state (unless it was already set). If it is 0, the flip-flop
switches to the clear state.

CIRCUIT DIAGRAM

T FLIP FLOP:

The T flip-flop is a single input version of the JK flip-flop. As shown in Figure, the T flip-flop is obtained from the
JK type if both inputs are tied together. The output of the T flip-flop "toggles" with each clock pulse.

CIRCUIT DIAGRAM TRUTH TABLE FOR TFLIPFLOP

T CLK Q Q‾
1 1 Toggle Toggle
0 1 No change No change
X 0 No change No change

23
 PIN DIAGRAM:

PROCEDURE:
1. Mount ICs on breadboard.
2. Make connections as shown in the respective circuit diagram.
3. Apply input condition as per truth table [for 0 = LOW & 1 = HIGH].
4. By applying clock pulses for each input of Flip-flop the output is noted and tabulated and the tabulation is
verified with truth table
5. Fill up the observation table .

RESULT: The RS, JK, D and T flip flops are constructed using logic gates and their truth tables are verified

24
Expt. No: 8
Date BINARY COUNTERS

AIM:
To construct a digital Binary Counter circuit using JK Flip Flop.

APPARATUS REQUIRED:
Sl.No. Description Range / Number/ Value Qty
1 IC Trainer Kit 1
2 IC 7473 2
3 Bread board and Connecting wires

THEORY:
A digital circuit which has a clock input and a number of count outputs which give the number of
clock cycles. The output may change either on rising or falling clock edges. The circuit may also have a
reset input which sets all outputs to zero when asserted. The counter may be either a synchronous
counter or a ripple counter. A binary counter can be constructed from J-K flip-flops by taking the
output of one cell to the clock input of the next. The J and K inputs of each flip-flop are set to 1 to
produce a toggle at each cycle of the clock input. For each two toggles of the first cell, a toggle is
produced in the second cell, and so on down to the fourth cell. This produces a binary number equal to
the number of cycles of the input clock signal.
CIRCUIT DIAGRAM

PROCEDURE:
1. Mount ICs on breadboard.
2. Make connections as shown in the respective circuit diagram.
3. By applying clock pulses for each clock pulse combination the output is noted and tabulated and the
tabulation is verified with truth table
5. Fill up the observation table.

25
PIN DETAILS

TABULATION

Output
Sl. No Decimal
Q0 Q1 Q2 Q3
1 0 0 0 0 0
2 1 0 0 0 1
3 2 0 0 1 0
4 3 0 0 1 1
5 4 0 1 0 0
6 5 0 1 0 1
7 6 0 1 1 0
8 7 0 1 1 1
9 8 1 0 0 0
10 9 1 0 0 1
11 10 1 0 1 0
12 11 1 0 1 1
13 12 1 1 0 0
14 13 1 1 0 1
15 14 1 1 1 0
16 15 1 1 1 1

R9ESULT: Thus the counter circuit is studied and verified.

26
Expt. No: 9
Date SHIFT REGISTER
AIM:
To construct and study the operation of Shift Registers.

APPARATUS REQUIRED:
Sl.No. Description Range / Number/ Value Qty
1 IC Trainer Kit 1
2 IC 7474 2
3 Bread board and Connecting wires

THEORY:
Shift registers are a type of sequential logic circuit, mainly for storage of digital data. They
are a group of flip-flops connected in a chain so that the output from one flip-flop becomes the input of
the next flip-flop. Most of the registers possess no characteristic internal sequence of states. All the
flip-flops are driven by a common clock, and all are set or reset simultaneously. Shift registers can be
found in many applications. Here is a list of a few.
 To produce time delay
 To simplify combinational logic
 To convert serial data to parallel data
CIRCUIT DIAGRAM :

27
PIN DETAILS

PROCEDURE:
1. Mount ICs on breadboard.
2. Make connections as shown in the circuit diagram.
3. Apply input condition (Data) as per truth table [for 0 = LOW & 1 = HIGH].
4. By applying clock pulses for each data the corresponding output is noted
5. Fill up the observation table.

TABULATION
OUT PUT
DATA CLOCK
Q0 Q1 Q2 Q3
1 1 1 0 0 0
1 1 1 1 0 0
0 1 0 1 1 0
0 1 0 0 1 1
1 1 1 0 0 1
1 1 1 1 0 0
1 1 1 1 1 0
1 1 1 1 1 1

RESULT:
The shift register is constructed and its output is verified.

28
Expt. No: 10
Date CODE CONVERTERS
AIM:
To design a code converter for Binary to Gray and Gray to Binary converter.

APPARATUS REQUIRED:

Sl.No. Description Range / Number/ Value Qty

1 IC Trainer Kit 1
2 IC 7486 1
3 Bread board and Connecting wires

THEORY:
The Gray code is unweighted and is not arithmetic code. That is there are no specific weights
assigned to the bit position. The important feature of the Gray code is that exhibits only a single bit
change from one code word to the next in sequence. It is a logic circuit and to convert one code to
another. The input lines supply the bit combination of element as specified by one code and output
lines must generate the correspond bit combination of another code.
CIRCUIT DIAGRAM

29
 PROCEDURE:
1. Mount ICs on breadboard.
2. Make connections as shown in the respective circuit diagram.
3. Apply input condition as per truth table [for 0 = LOW & 1 = HIGH].
4. Observe the output on LEDs.
5. Fill up the observation table.
6. Repeat the procedure for Gray code to Binary code.

TRUTH TABLE

BINARY TO GRAY GRAY TO BINARY

Sl.No. Binary code Gray code Sl.No Gray code Binary code
B3 B2 B1 B0 G3 G2 G1 G0 G3 G2 G1 G0 B3 B2 B1 B0
1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
2 0 0 0 1 0 0 0 1 2 0 0 0 1 0 0 0 1
3 0 0 1 0 0 0 1 1 3 0 0 1 0 0 0 1 1
4 0 0 1 1 0 0 1 0 4 0 0 1 1 0 0 1 0
5 0 1 0 0 0 1 1 0 5 0 1 0 0 0 1 1 1
6 0 1 0 1 0 1 1 1 6 0 1 0 1 0 1 1 0
7 0 1 1 0 0 1 0 1 7 0 1 1 0 0 1 0 0
8 0 1 1 1 0 1 0 0 8 0 1 1 1 0 1 0 1
9 1 0 0 0 1 1 0 0 9 1 0 0 0 1 1 1 1
10 1 0 0 1 1 1 0 1 10 1 0 0 1 1 1 1 0
11 1 0 1 0 1 1 1 1 11 1 0 1 0 1 1 0 0
12 1 0 1 1 1 1 0 1 12 1 0 1 1 1 1 0 1
13 1 1 0 0 1 0 1 0 13 1 1 0 0 1 0 0 0
14 1 1 0 1 1 0 1 1 14 1 1 0 1 1 0 0 1
15 1 1 1 0 1 0 0 1 15 1 1 1 0 1 0 1 1
16 1 1 1 1 1 0 0 0 16 1 1 1 1 1 0 1 0

RESULT: Thus the code converter for binary to gray and gray to binary are constructed and studied.

30
Expt. No: 11
Date BRIDGE RECTIFIER WITH AND WITHOUT FILTER
AIM:
To construct a Bridge rectifier with and without filter using PSPICE (capture method).

APPARATUS REQUIRED:
P.C loaded with Or cad release 9.1(P SPICE)

Theory:
Bridge rectifier is a full wave rectifier. It consists of four diodes arranged in the form of a bridge. It
utilizes the advantages of the full wave rectifier and at the same time it eliminates the need for a centre
tapped transformer. The supply input and the rectified output are the two diagonally opposite terminals
of the bridge
CIRCUIT DIAGRAM:
 INTRODUCTION
SPICE is a powerful general purpose analog and mixed-mode circuit simulator that is used to
verify circuit designs and to predict the circuit behavior. This is of particular importance for
integrated circuits. It was for this reason that SPICE was originally developed at the Electronics
Research Laboratory of the University of California, Berkeley (1975), as its name implies:
Simulation Program for Integrated Circuits Emphasis.
PSpice is a PC version of SPICE (which is currently available from OrCAD Corp. of Cadence
Design Systems, Inc..
PROCEDURE: Capture Method

Step 1: Select Or CAD Capture CIS

Step 2: File New → Project
Step 3: Enter project Name → Select option / Analog or Mixed signal circuit wizard. → OK
Step 4: Include necessary library files in your project → Finish
Step 5: Draw the circuit diagram as given in manual and save it.
Step 6: Create Simulation profile →Select analysis type and set parameters → Run.
Step 7: The wave form for Bridge Rectifier with and without filter are obtained and verified
Step 8: Exit project.

RESULT:
Thus the Bridge Rectifier with and without filter has been simulated and the graph is drawn by
using PSPICE (capture method).
Expt. No: 12
Date COMMON EMITTER AMPLIFIER
AIM:
To obtain the frequency response characteristics of Common Emitter Amplifier by using
PSPICE (capture method).

APPARATUS REQUIRED:
P.C loaded with Or cad release 9.1(P SPICE)

THEORY :
The CE amplifier is a small signal amplifier. This small signal amplifier accepts low voltage ac inputs and produces
amplified outputs. A single stage BJT circuit may be employed as a small signal amplifier; has two cascaded
stages give much more amplification. Designing for a particular voltage gain requires the use of a ac
negative feedback to stabilize the gain. For good bias stability, the emitter resistor voltage drop should
be much larger than the base -emitter voltage. And Re resistor will provide the required negative
feedback to the circuit. CEis provided to provide necessary gain to the circuit. All bypass capacitors
should be selected to have the smallest possible capacitance value, both to minimize the physical size
of the circuit for economy. The coupling capacitors should have a negligible effect on the frequency
response of the circuit

CIRCUIT DIAGRAM
MODEL GRAPH:

Gain = DB (V0/Vi)
Band Width for 3db level – MAX ((DB (V0/Vi)) - 3,

INTRODUCTION
SPICE is a powerful general purpose analog and mixed-mode circuit simulator that is used to
verify circuit designs and to predict the circuit behavior. This is of particular importance for
integrated circuits. It was for this reason that SPICE was originally developed at the Electronics
Research Laboratory of the University of California, Berkeley (1975), as its name implies:
Simulation Program for Integrated Circuits Emphasis.
PSpice is a PC version of SPICE (which is currently available from OrCAD Corp. of Cadence
Design Systems, Inc..

PROCEDURE: Capture Method

Step 1: Select Or CAD Capture CIS

Step 2: File New → Project
Step 3: Enter project Name → Select option / Analog or Mixed signal circuit wizard. → OK
Step 4: Include necessary library files in your project → Finish
Step 5: Draw the circuit diagram as given in manual and save it.
Step 6: Create Simulation profile →Select analysis type and set parameters → Run.
Step 7: Trace the frequency response characteristics curve and calculate its bandwidth.
Step 8: Exit project.

RESULT: Thus the frequency response characteristics and bandwidth of Common Emitter Amplifier
were studied. by using PSPICE (capture method).
Expt. No: 13
Date COMMON-SOURCE AMPLIFIER
AIM:
To obtain the frequency response characteristics of Common-source by using
PSPICE (capture method).

APPARATUS REQUIRED:
P.C loaded with Or cad release 9.1(P SPICE)

THEORY :
Common-source amplifier is one of three basic single-stage field-effect
transistor (FET) amplifier topologies, typically used as a voltage (which amplifies the input
voltage about 30 times ) or transconductance amplifier. The analogous bipolar junction
transistor circuit is the common-emitter amplifier. The common-source (CS) amplifier may be
viewed as a transconductance amplifier or as a voltage amplifier. As a transconductance
amplifier, the input voltage is seen as modulating the current going to the load. As a voltage
amplifier, input voltage modulates the amount of current flowing through the FET, changing
the voltage across the output resistance according to Ohm's law. However, the FET device's
output resistance typically is not high enough for a reasonable transconductance amplifier
(ideally infinite), nor low enough for a decent voltage amplifier (ideally zero). Another major
drawback is the amplifier's limited high-frequency response. Therefore, in practice the output
often is routed through either a voltage follower (common-drain or CD stage), or a current
follower (common-gate or CG stage), to obtain more favorable output and frequency
characteristics. The CS–CG combination is called a cascade amplifier

CIRCUIT DIAGRAM

MODEL GRAPH:
 Gain = DB (V0/Vi)
Band Width for 3db level – MAX ((DB (V0/Vi)) - 3,

INTRODUCTION
SPICE is a powerful general purpose analog and mixed-mode circuit simulator that is used to
verify circuit designs and to predict the circuit behavior. This is of particular importance for
integrated circuits. It was for this reason that SPICE was originally developed at the Electronics
Research Laboratory of the University of California, Berkeley (1975), as its name implies:
Simulation Program for Integrated Circuits Emphasis.
PSpice is a PC version of SPICE (which is currently available from OrCAD Corp. of Cadence
Design Systems, Inc..

PROCEDURE: Capture Method

Step 1: Select Or CAD Capture CIS

Step 2: File New → Project
Step 3: Enter project Name → Select option → Analog or Mixed signal circuit wizard. → OK
Step 4: Include necessary library files in your project → Finish
Step 5: Draw the circuit diagram as given in manual and save it.
Step 6: Create Simulation profile →Select analysis type and set parameters → Run.
Step 7: Trace the frequency response characteristics curve and calculate its bandwidth.
Step 8: Exit project.

RESULT: Thus the frequency response characteristics and bandwidth of Common-source

Amplifier were obtained. by using PSPICE (capture method).
Expt. No: 14
Date TWO STAGE R-C COUPLED AMPLIFIER
AIM:
To obtain the frequency response characteristics of Two Stage R-C coupled Amplifier by using
PSPICE (capture method).

APPARATUS REQUIRED:

P.C loaded with Or cad release 9.1(P SPICE)

THEORY :
A RC coupled two stage amplifier is shown in the figure eachstage is similar to the single stage
circuit. Stage 1 is capacitor coupled to the input of stage 2. The signal is applied to the input of stage 1
and theload is coupled to the output of stage 2. The signalK amplified by stage 1and the output of stage
1 is amplified by stage 2. So that the overall voltagegain is much greater than the gain of a single stage.
The signal voltage is phase shifted through 180° by stage 1 and through a further 180° by stage
2.Consequently the overall phase shift from input to out put is zero or 360"
CIRCUIT DIAGRAM
MODEL GRAPH:

Gain = DB (V0/Vi)
Band Width for 3db level – MAX ((DB (V0/Vi)) - 3,
INTRODUCTION
SPICE is a powerful general purpose analog and mixed-mode circuit simulator that is used to
verify circuit designs and to predict the circuit behavior. This is of particular importance for
integrated circuits. It was for this reason that SPICE was originally developed at the Electronics
Research Laboratory of the University of California, Berkeley (1975), as its name implies:
Simulation Program for Integrated Circuits Emphasis.
PSpice is a PC version of SPICE (which is currently available from OrCAD Corp. of Cadence
Design Systems, Inc..

PROCEDURE: Capture Method

Step 1: Select Or CAD Capture CIS

Step 2: File New → Project
Step 3: Enter project Name → Select option / Analog or Mixed signal circuit wizard. → OK
Step 4: Include necessary library files in your project → Finish
Step 5: Draw the circuit diagram as given in manual and save it.
Step 6: Create Simulation profile →Select analysis type and set parameters → Run.
Step 7: Trace the frequency response characteristics curve and calculate its bandwidth.
Step 8: Exit project.

RESULT: Thus the frequency response characteristics and bandwidth of Two Stage R-C coupled
Amplifier was obtained by using PSPICE (capture method).
 FAQ
1. Define Biasing
Biasing in electronics is the method of establishing predetermined voltages or currents at
various points of an electronic circuit to set an appropriate operating point. The operating point
of a device, also known as bias point, quiescent point, or Q-point, is the steady-state operating
condition of an active device (a transistor or vacuum tube) with no input signal applied. A BJT
(Bipolar Junction Transistor) require a voltage normally in the range of 0.7V for the internal
junctions to become conductive. It is a fixed parameter of Silicon (Si).
2. Need for Biasing
Biasing is used in a transistor amplifier circuit in order to place the transistor as nearly as
possible in the center of its linear region (Active Region). Transistors have cutoff, linear, and
saturation regions. Too little bias current, the transistor in cutoff region and too much bias
current the transistor is in saturation region. Both conditions cause distortion when you attempt
to use the transistor as an amplifier.

3. Define D.C Load line

The dc load line of an amplifier represents all the possible combinations of and .A

generic load line is shown in figure. The endpoints on the load line represent the ideal
saturation and cutoff characteristics of the circuit. Note that:
The saturation point, , is plotted assuming a value of
. In practice, has some value slightly greater than
0 V when the transistor is saturated. The value of is
normally calculated by dividing the total voltage across the
collector and emitter circuits by the total resistance in those
circuits.
The cutoff point, , is plotted assuming a value of
. In practice, has some value slightly greater than 0
A when the transistor is in cutoff. The value of is
normally assumed to equal the total voltage applied across the collector and emitter circuits .
4. What are the types of bias of the Transistor?
There is many method to bias the transistor The following five common biasing circuits are
used in transistor amplifiers circuit.
 Fixed bias
 Collector-to-base bias
 Fixed bias with emitter resistor
 Voltage divider bias
 Emitter bias
 5. Define fixed bias (base bias) of a Transistor.

The simplest transistor biasing circuit is referred to as base bias (or fixed bias). The name stems
from the fact that the current through the base circuit ( ) remains relatively fixed from one transistor to
another. That is A transistor circuit in which a current flowing through a resistor is independent of the
quiescent collector current is called fixed bias. A base bias circuit is shown (along with its primary
mathematical relationships) in figure . Note that the load line equations are used to plot the dc load line
for the circuit, while the Q-point equations are used to determine the Q-point values of and .

6. Merits and Demerits of fixed Bias.

Merits:
 It is simple to shift the operating point anywhere in the active region by merely changing the
base resistor (RB).
 A very small number of components are required.
Demerits:
 The collector current does not remain constant with variation in temperature or power
supply voltage. Therefore the operating point is unstable.
 Changes in Vbe will change IB and thus cause RE to change. This in turn will alter the gain of
the stage.
 When the transistor is replaced with another one, considerable change in the value of β can
be expected. Due to this change the operating point will shift.
 For small-signal transistors (e.g., not power transistors) with relatively high values of β (i.e.,
between 100 and 200), this configuration will be prone to thermal runaway. In particular, the
stability factor, which is a measure of the change in collector current with changes in
reverse saturation current, is approximately β+1. To ensure absolute stability of the
amplifier, a stability factor of less than 25 is preferred, and so small-signal transistors have
large stability factors.
 7. Define Collector and Emitter Feedback Biasing.

The term feedback is used to describe a circuit configuration where a sample of the output
signal is fed back to the circuit input to control the circuit operation. There are two types of feedback that
are used to bias transistors: collector-feedback bias and emitter-feedback bias. Collector-feedback bias
is designed so that the collector voltage ( ) directly affects the value of . A collector-feedback bias
circuit is shown (along with its primary mathematical relationships) in figure

In collector-feedback bias, there are no load line equations given in above figure. This is due to
the fact that the transistor in a collector-feedback bias circuit cannot saturate under normal
circumstances. Thus, the circuit (technically) has no dc load line. The collector-to-base feedback is
evidenced by:
The connection of the base circuit to the transistor collector, indicating that is a function of .
The presence of in the base current equation shown in the figure.
Emitter-feedback bias is designed so that the emitter voltage ( ) affects the value of . An emitter-
feedback bias circuit is shown (along with its primary mathematical relationships) in Figure 7-7. The Q-
point analysis of an emitter-feedback bias circuit is demonstrated in Example 7.15. The emitter-to-base
feedback is evidenced by:
The addition of an emitter resistor ( ), which produces an emitter voltage ( ) that affects the values
of and .
The presence of
8.Define Voltage-Divider Bias

Voltage-divider bias (which is sometimes referred to as universal bias) is the most commonly
used transistor-biasing scheme. The circuit can be identified by the voltage divider in the transistor base
circuit. A voltage-divider bias circuit is shown (along with its primary mathematical relationships) in
Figure.

9. Which transistor bias circuit arrangement provides good Q-point stability, but requires both
positive and negative supply voltages?
A. Base bias
B. Collector-feedback bias
C. Voltage-divider bias
D. Emitter bias Answer: Option D

10. Voltage-divider bias has a relatively stable Q-point, as does

A. Base bias.
B. Collector-feedback bias.
C. Both of the above
D. None of the above Answer: Option B

11. The linear (active) operating region of a transistor lies along the load line below ________ and
Above ________.
A. Cutoff, saturation
B. Saturation, cutoff Answer: Option B

12. The input resistance at the base of a voltage-divider biased transistor can be neglected
A. At all times.
B. Only if the base current is much smaller than the current through R2 (the lower bias resistor).
C. At no time.
D. Only if the base current is much larger than the current through R2 (the lower bias resistor).

Answer: Option B
13. What is the most common bias circuit?
A. Base
B. Collector
C. Emitter
D. Voltage-divider Answer: Option D

14. Emitter bias requires

A. Only a positive supply voltage.
B. Only a negative supply voltage.
C. No supply voltage.
D. Both positive and negative supply voltages. Answer: Option D

15. Which transistor bias circuit provides good Q-point stability with a single-polarity supply
voltage?
A. Base bias
B. Collector-feedback bias
C. Voltage-divider bias
D. Emitter bias Answer: Option C

16.Ideally, for linear operation, a transistor should be biased so that the Q-point is
A. Near saturation.
B. Near cutoff.
C. Where IC is maximum.
D. Halfway between cutoff and saturation. Answer: Option D

17. The most stable biasing technique used is the

A. Vvoltage-divider bias.
B. Base bias.
C. Emitter bias.
D. Collector bias. Answer: Option A

18. Clipping is the result of

A. The input signal being too large.
B. The transistor being driven into saturation.
C. The transistor being driven into cutoff.
D. All of the above Answer: Option D

19. Which transistor bias circuit arrangement provides good stability using negative feedback
from
collector to base?
A. Base bias
B. Collector-feedback bias
C. Voltage-divider bias
D. Emitter bias Answer: Option B
20. Refer to the given figure. The most probable cause of trouble, if any, from these voltage
measurements is

A. The base-emitter junction is open.

B. RE is open.
C. A short from collector to emitter.
D. No problems.

Answer: Option A

21. Refer to the given figure. The most probable cause of

trouble, if any, from this voltage
measurements is

A. The base-emitter junction is open.

B. RE is open.
C. A short from collector to emitter.
D. No problems.

Answer: Option D

22. Refer to this figure. In the voltage-divider biased NPN

Transistor circuit, if R2 opens, the transistor is

A. Saturated.
B. Cutoff.
C. No conducting.
D. [NIL] Answer: Option A
23. What is need of rectifier in electronics?
Almost all the electronic circuits or equipment require a dc power. The DC Supply can be obtained
from the batteries. But the cost of the batteries is too much because every time we have to spent more
money for changing the batteries. To overcome this problem we have to use equipment which can
convert AC voltage into the DC voltage, such a circuit is called a rectifier.

24. What are the purposes of transformer in rectifier circuit?

In rectifier circuit the transformer serves two purposes.

 It can be used to obtain the desired level of dc voltage (using step up or step down
transformers).
 It provides isolation from the power line.

24. Define half wave rectification

In half wave rectification, either the positive or negative half of the AC wave is passed, while the
other half is blocked. Because only one half of the input waveform reaches the output, it is very
inefficient if used for power transfer. Half-wave rectification can be achieved with a single diode in a one-
phase supply, or with three diodes in a three-phase supply. Half wave rectifiers yield a unidirectional but
pulsating direct current
25. What are the demerits in Half- wave rectifier?
For most power applications, half-wave rectification is insufficient for the task. The harmonic
content of the rectifier's output waveform is very large and consequently difficult to filter. Furthermore,
the AC power source only supplies power to the load one half every full cycle, meaning that half of its
capacity is unused. Half-wave rectification

26. Define Full Wave Rectifier

In a Full Wave Rectifier circuit two diodes are used, one for each half of the cycle. A transformer is
used whose secondary winding is split equally into two halves with a common centre tapped connection,
(C). This configuration results in each diode conducting in turn when its anode terminal is positive with
respect to the transformer centre point C producing an output during both half-cycles, twice that for the
half wave rectifier so it is 100% efficient as shown below.

27. The Full Wave Bridge Rectifier

Another type of circuit that produces the same output waveform as the full wave rectifier circuit
above is that of the Full Wave Bridge Rectifier. This type of single phase rectifier uses four individual
rectifying diodes connected in a closed loop "bridge" configuration to produce the desired output. The
main advantage of this bridge circuit is that it does not require a special centre tapped transformer,
thereby reducing its size and cost. The single secondary winding is connected to one side of the diode
bridge network and the load to the other side .The four diodes labeled D1 to D4 are arranged in "series
pairs" with only two diodes conducting current during each half cycle. During the positive half cycle of
the supply, diodes D1 and D2 conduct in series while diodes D3 and D4 are reverse biased.
28. Application of Diodes

 The primary application of rectifiers is to derive DC power from an AC supply.

 Virtually all electronic devices require DC, so rectifiers find uses inside the power supplies
of virtually all electronic equipment.
 Converting DC power from one voltage to another is much more complicated. One method
of DC-to-DC conversion first converts power to AC (using a device called an inverter), then
use a transformer to change the voltage, and finally rectifies power back to DC.
 Rectifiers also find a use in detection of amplitude modulated radio signals.
 Rectifiers are also used to supply polarized voltage for welding.

29. What is the difference between unregulated and regulated power supply.

Unregulated: An unregulated power supply is the most rudimentary type, consisting of a

transformer, rectifier, and a filter. These power supplies typically exhibit a lot of ripple voltage (i.e.
rapidly-varying instability) and other AC ―noise‖ superimposed on the DC power. If the input voltage
varies, the output voltage will vary by a proportional amount. The advantage of an unregulated supply is
that its cheap, simple, and efficient.

Regulated: A linear regulated supply is simply a unregulated power supply followed by a transistor
circuit operating in its ―active,‖ or ―linear‖ mode, hence the name linear regulator. A typical linear
regulator is designed to output a fixed voltage for a wide range of input voltages, and it simply drops any
excess input voltage to allow a maximum output voltage to the load. For critical electronics applications
a linear regulator may be used to set the voltage to a precise value, stabilized against fluctuations in
input voltage and load. The regulator also greatly reduces the ripple and noise in the output direct
current. Linear regulators often provide current limiting, protecting the power supply and attached circuit
from over current.

30. Define Line regulation.

Line regulation is a measure of the ability of the power supply to maintain its output voltage given
changes in the input line voltage. Line regulation is expressed as percent of change in the output
voltage relative to the change in the input line voltage.

31. Define Load regulation

Load regulation is a measure of the ability of an output channel to remain constant given changes in
the load. Depending on the control mode enabled on the output channel, the load regulation
specification can be expressed in one of two ways:In constant voltage mode, variations in the load
result in changes in the output current. This variation is expressed as a percentage of range per amp of
output load and is synonymous with a series resistance. In constant current mode, variations in the
load result in changes to the current through the load. This variation is expressed as a percentage of
range change in current per volt of change in the output voltage and is synonymous with a resistance in
parallel with the output channel terminals. In constant current mode, the load regulation specification
defines how close the output shunt resistance is to infinity—the parallel resistance of an ideal current.
32.What is the application of Adder.

An adder or summer is a digital circuit that performs addition of numbers. In many computers
and other kinds of processors, adders are used not only in the arithmetic logic unit(s), but also in other
parts of the processor, where they are used to calculate addresses, table indices, and similar.Although
adders can be constructed for many numerical representations, such as binary-coded decimal or
excess-3, the most common adders operate on binary numbers. In cases where two's complement or
ones' complement is being used to represent negative numbers, it is trivial to modify an adder into an
adder–subtractor. Other signed number representations require a more complex adder.

33. What is the difference between Half Adder and Full Adder

Half Adder: The half adder adds two one-bit binary numbers A and B. It has two outputs, S and C
(the value theoretically carried on to the next addition); the final sum is 2C + S. The simplest half-adder
design, pictured on the right, incorporates an XOR gate for S and an AND gate for C.

Full Adder: With the addition of an OR gate to combine their carry outputs, two half adders can be
combined to make a full adder. A full adder adds binary numbers and accounts for values carried in as
well as out. A one-bit full adder adds three one-bit numbers, often written as A, B, and Cin; A and B are
the operands, and Cin is a bit carried in from the next less significant stage.[2] The full-adder is usually a
component in a cascade of adders, which add 8, 16, 32, etc. binary numbers. The circuit produces a
two-bit output sum typically represented by the signals Cout and S, where.

34. What is Half subtractor and Full subtractor

Half subtractor:The half-subtractor is a combinational circuit which is used to perform subtraction

of two bits. It has two inputs, X (minuend) and Y (subtrahend) and two outputs D (difference) and B
(borrow).

Full subtractor :The full-subtractor is a combinational circuit which is used to perform subtraction
of three bits. It has three inputs, X (minuend) and Y (subtrahend) and Z (subtrahend) and two outputs D
(difference) and B (borrow).

35. Why capacitor in transistor amplifier circuit at input? (or) What is the use of capacitor in
transistor amplifier circuit?

Because capacitor not allow to pass dc voltage, but capacitor allow ac voltage and signal.
Purpose is to block dc voltage. That is coupling condenser. Capacitors are used to couple each stage of
an amplifier to the next, to help remove ripple voltages from rectified AC power supplies and they are
also used to tune circuits to get the required frequency response, such as a tone control in an audio
amplifier, or an RF or IF amplifier in a radio receiver front-end. Capacitors are also used to bypass
emitter resistors to improve the voltage swing and lower the AC output impedance of class A amplifier
stages, and also used in negative feedback loops to stabilize an amplifier's open-loop gain.