The document summarizes the study of half adders and full adders. A half adder can add two bits and produces a sum and carry output. A full adder can add three bits and also produces a sum and carry output. The document explains the logic circuits and truth tables for both half adders and full adders. It then provides the procedure to construct each circuit using logic gates on a digital trainer board and verify the output for different input combinations.
The document summarizes the study of half adders and full adders. A half adder can add two bits and produces a sum and carry output. A full adder can add three bits and also produces a sum and carry output. The document explains the logic circuits and truth tables for both half adders and full adders. It then provides the procedure to construct each circuit using logic gates on a digital trainer board and verify the output for different input combinations.
The document summarizes the study of half adders and full adders. A half adder can add two bits and produces a sum and carry output. A full adder can add three bits and also produces a sum and carry output. The document explains the logic circuits and truth tables for both half adders and full adders. It then provides the procedure to construct each circuit using logic gates on a digital trainer board and verify the output for different input combinations.
The document summarizes the study of half adders and full adders. A half adder can add two bits and produces a sum and carry output. A full adder can add three bits and also produces a sum and carry output. The document explains the logic circuits and truth tables for both half adders and full adders. It then provides the procedure to construct each circuit using logic gates on a digital trainer board and verify the output for different input combinations.
Table summarizes the operation. When A and B are 0’s, the SUM is 0 with a CARRY of 0. When A is 0 and B is 1, the SUM is 1 with a CARRY of 0. When A is 1 and B is 0, the SUM is 1 with a CARRY of 0. Finally, when A is 1 and B is 1, the SUM is 1 with a CARRY of 1. The logic circuit of fig 1 does electronically what we do mentally when we add 2 bits. Applications for half adders are limited. What we need is a circuit that can add 3 bits at a time.
FULL ADDER: It is a logic circuit that can add 3 bits. Again there are two outputs, SUM and CARRY. The Boolean equations are SUM = A⊕B ⊕ C , CARRY= AB + BC + AC In this case, SUM equals A XOR B XOR C; CARRY equals AB OR AC OR BC. Therefore, the SUM is 1 when the number of input 1s is odd; CARRY is a 1 when two or more inputs are 1s.
Truth table summarizes the circuit action. A, B, and C are the bits being added. If you check each entry, you will see that the circuit adds 3 bits at a time and comes up with the correct answer. The circuit of fig 2 does electronically what we do mentally when we add 3 bits. The full adder can be cascaded to add large binary numbers. A B C CARRY SUM
HALF ADDER 1. Construct the circuit as shown in the fig 3 using ICs 7486 (XOR), 7408 (AND). 2. Connect the inputs A and B to the logic input sockets available in the digital trainer board below the respective toggle switches. The toggle switches can set the logic inputs 0 or 1. 3. Connect the output of XOR i.e. SUM & the output of AND i.e. CARRY to logic output sockets available in digital trainer board below the dual color L E Ds. The dual color L E D will indicate the state 0 as green and 1 as red. 4. Verify the table 1 for different inputs combinations of A and B. FULL ADDER 5. Construct the circuit as shown in the fig 4 using I Cs 7486 (XOR), 7408 (AND), and 7432(OR). 6. Connect the inputs A, B and C to the logic input sockets available in the digital trainer board. 7. Connect the output of XOR i.e. SUM & the output of OR i.e. CARRY to logic output sockets. 8. Verify the table 2 for different inputs A, B and C. 9. Use Karnaugh map technique to obtain the SUM and CARRY for both Half and Full adder circuits.
EXTRA: Fabricate Half adder or full adder using 2 input Nand gates Result:
