Code: PCC-CS392 Department: IT Lateral Semester: 3rd Session: 2023-24 INDEX Sl.No Title Date Remarks 1 Investigation of Half Adder and Full Adder Circuits 2 Design of Ripple Carry Adders EXPERIMENT NO: 1 Title: Investigation of Half Adder and Full Adder Circuits
Objective: The primary objective of this laboratory experiment is to understand and analyse the operation of Half Adder and Full Adder circuits. The experiment aims to demonstrate the basic principles of digital logic circuits for binary addition and investigate their functionality.
A half adder is a digital circuit that performs binary addition on two single-bit inputs. It has two outputs: the sum (S) and the carry (C). The truth table for a half adder is as follows:
A B S C 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1
2. Full Adder:
A full adder extends the functionality of a half adder to handle an additional input, the carry input (Cin). It produces a sum output (S) and a carry output (Cout). The truth table for a full adder is as follows: A B Cin S Count 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1
Experimental Procedure:
1. Half Adder:
a. Construct the half adder circuit on the breadboard using ICs 7400 and 7432.
b. Connect the power supply to the circuit and ensure proper voltage levels.
c. Apply binary inputs (A and B) to the circuit.
d. Measure and observe the outputs (S and C) using LEDs.
e. Record the results and compare with the expected truth table.
2. Full Adder:
a. Extend the half adder circuit to a full adder by adding an XOR gate.
b. Connect the carry input (Cin) to the circuit.
c. Apply binary inputs (A, B, and Cin) to the circuit.
d. Measure and observe the outputs (S and Cout) using LEDs.
e. Record the results and compare with the expected truth table.
Circuit Diagram: Result: Summarize the observed results for both the half adder and full adder circuits. Compare the experimental outputs with the expected truth tables. Discuss any discrepancies and possible sources of error. Conclude the report by highlighting the successful demonstration of binary addition using these circuits and their applications in digital systems. EXPERIMENT NO: 2 Title: Design of Ripple Carry Adders
Theory: Arithmetic operations like addition, subtraction, multiplication, division are basic operations to
be implemented in digital computers using basic gates like AND, OR, NOR NAND etc.
Among all the arithmetic operations if we can implement addition then it is easy to
perform.
multiplication (by repeated addition), subtraction (by negating one operand) or division (repeated
subtraction).
Half Adders can be used to add two one-bit binary numbers. It is also possible to create a logical
circuit using multiple full adders to add N-bit binary numbers. Each full adder inputs a Cin,
which is the Cout of the previous adder. This kind of adder is a Ripple Carry Adder, since
each carry bit "ripples" to the next full adder. The first (and only the first) full adder may
be replaced. by a half adder. The block diagram of 4-bit Ripple Carry Adder is shown here
below -
The layout of ripple carry adder is simple, which allows for fast design time; however, the
ripple. carry adder is relatively slow since each full adder must wait for the carry bit to be
calculated. from the previous full adder. The gate delay can easily be calculated by inspection
of the full adder circuit. Each full adder requires three levels of logic. In a 32-bit [ripple carry]
adder, there are 32 full adders, so the critical path (worst case) delay is 31 * 2(for carry
propagation) + 3(for sum) = 65 gate delays.
Design Issues:
The corresponding Boolean expressions are given here to construct a ripple carry adder. In
the half adder circuit the sum and carry bits are defined as
sum = A ⊕ B
carry = AB
In the full adder circuit, the Sum and Carry output is defined by inputs A, B and Carry-in as
Sum=ABC + ABC + ABC + ABC
Carry=ABC + ABC + ABC + ABC
Having these we could design the circuit. But we first check to see if there are any logically. equivalent statements that would lead to a more structured equivalent circuit.
With a little algebraic manipulation, one can see that.
Sum= ABC + ABC + ABC + ABC
= (AB + AB) C + (AB + AB) C
= (A ⊕ B) C + (A ⊕ B) C
=A ⊕ B ⊕ C
Carry= ABC + ABC + ABC + ABC
= AB + (AB + AB) C
= AB + (A ⊕ B) C
Fig: Circuit Implementation using 1-Half Adder (HA) with 3-Full Adder (FA).
