This VHDL code implements an 8-bit arithmetic logic unit (ALU) that performs addition, subtraction, AND, OR, and set if less than operations on two 8-bit inputs. The operation to be performed is selected by a 3-bit address bus. The ALU outputs the 8-bit result and a single bit that indicates if the result is zero.
This VHDL code implements an 8-bit arithmetic logic unit (ALU) that performs addition, subtraction, AND, OR, and set if less than operations on two 8-bit inputs. The operation to be performed is selected by a 3-bit address bus. The ALU outputs the 8-bit result and a single bit that indicates if the result is zero.
This VHDL code implements an 8-bit arithmetic logic unit (ALU) that performs addition, subtraction, AND, OR, and set if less than operations on two 8-bit inputs. The operation to be performed is selected by a 3-bit address bus. The ALU outputs the 8-bit result and a single bit that indicates if the result is zero.
This VHDL code implements an 8-bit arithmetic logic unit (ALU) that performs addition, subtraction, AND, OR, and set if less than operations on two 8-bit inputs. The operation to be performed is selected by a 3-bit address bus. The ALU outputs the 8-bit result and a single bit that indicates if the result is zero.
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8-Bit ALU in VHDL
This arithmetic logic unit accepts 8-bit inputs, but it can easily be modded to higher bits. It supports the addition, subtraction, set if less than, AND, and OR operations. The operation to perform is determined by the 3-bit address bus.
library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; use ieee.std_logic_arith.all;
ENTITY alu8bit IS port(a, b : in std_logic_vector(7 downto 0); -- a and b are busses op : in std_logic_vector(2 downto 0); zero : out std_logic; f : out std_logic_vector(7 downto 0)); END alu8bit;
architecture behavioral of alu8bit is begin process(op) variable temp: std_logic_vector(7 downto 0); begin case op is when "000" => temp := a and b; when "100" => temp := a and b; when "001" => temp := a or b; when "101" => temp := a or b; when "010" => temp := a + b; when "110" => temp := a - b; when "111" => if a < b then temp := "11111111"; else temp := "00000000"; end if; when others => temp := a - b; end case; if temp="00000000" then zero <= '1'; else zero <= '0'; end if; f <= temp; end process; end behavioral;
