----------------------------------------------------

P1_E1-------------------------------------------------

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

-- Uncomment the following library declaration if using

-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;

-- Uncomment the following library declaration if instantiating

-- any Xilinx leaf cells in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity E1 is
Port ( SW_I0 : in STD_LOGIC;
SW_I1 : in STD_LOGIC;
SW_I2 : in STD_LOGIC;
SW_I3 : in STD_LOGIC;
SW_S0 : in STD_LOGIC;
SW_S1 : in STD_LOGIC;
L_Y : out STD_LOGIC);
end E1;

architecture Behavioral of E1 is

begin
process (SW_I0, SW_I1, SW_I2, SW_I3, SW_S0, SW_S1)
begin
-- Combinación de las líneas de selección S0 y S1
case (S1 & S0) is
when "00" =>
Y <= I0; -- Si S1S0 = 00, selecciona la entrada I0
when "01" =>
Y <= I1; -- Si S1S0 = 01, selecciona la entrada I1
when "10" =>
Y <= I2; -- Si S1S0 = 10, selecciona la entrada I2
when "11" =>
Y <= I3; -- Si S1S0 = 11, selecciona la entrada I3
when others =>
Y <= '0'; -- Estado por defecto, se puede ajustar según necesidad
end case;
end process;

end Behavioral;

------------------------------------------------------
P1_E2-----------------------------------------------------

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity E2 is
Port (
SW_A : in STD_LOGIC_VECTOR(3 downto 0); -- Entrada A (4 switches)
SW_B : in STD_LOGIC_VECTOR(3 downto 0); -- Entrada B (4 switches)
LAigualB : out STD_LOGIC; -- LED para A = B
LAmayorB : out STD_LOGIC; -- LED para A > B
 LAmenorB : out STD_LOGIC -- LED para A < B
);
end E2;

architecture Behavioral of E2 is

begin
process(SW_A, SW_B)
begin
-- Comparación de igualdad
if SW_A = SW_B then
LED_AeqB <= '1';
LED_AgtB <= '0';
LED_AltB <= '0';
-- Comparación si A es mayor que B
elsif SW_A > SW_B then
LED_AeqB <= '0';
LED_AgtB <= '1';
LED_AltB <= '0';
-- Comparación si A es menor que B
else
LED_AeqB <= '0';
LED_AgtB <= '0';
LED_AltB <= '1';
end if;
end process;
end Behavioral;

--------------------------------------------------
P1_E4--------------------------------------------------------

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity E4 is
Port ( SW_A : in STD_LOGIC;
SW_B : in STD_LOGIC;
SW_Cin : in STD_LOGIC;
L_Suma : out STD_LOGIC;
L_Cout : out STD_LOGIC);
end E4;

architecture Behavioral of E4 is

begin
process(SW_A, SW_B, SW_Cin)
begin
-- Suma = A ⊕ B ⊕ Cin (operación XOR)
L_Suma <= SW_A XOR SW_B XOR SW_Cin;

-- Cout = (A AND B) OR (B AND Cin) OR (A AND Cin)

L_Cout <= (SW_A AND SW_B) OR (SW_B AND SW_Cin) OR (SW_A AND SW_Cin);
end process;
end Behavioral;

-----------------------------------------------------
P2--------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity E6 is
Port ( A : in STD_LOGIC_VECTOR (3 DOWNTO 0);
B : in STD_LOGIC_VECTOR (3 DOWNTO 0);
S : in STD_LOGIC_VECTOR (3 DOWNTO 0);
M : in STD_LOGIC;
Cn : in STD_LOGIC;
F : inout STD_LOGIC_VECTOR (3 DOWNTO 0);
Cout : inout STD_LOGIC;
P: out STD_LOGIC;
G: OUT STD_LOGIC;
Igual: out std_logic);
end E6;

architecture Behavioral of E6 is
signal temp_result : STD_LOGIC_VECTOR(4 downto 0); -- Resultado temporal con carry
begin
process(A, B, S, M, Cn)
begin
if (M = '1') then -- Operaciones Lógicas
case S is
when "0000" => F <= not A;
when "0001" => F <= not( A and B);
when "0010" => F <= B or (not A);
when "0011" => F <= (others => '1');
when "0100" => F <= not ( A or B);
when "0101" => F <= not B;
when "0110" => F <= not (A xor B);
when "0111" => F <= A or (not B);
when "1000" => F <= (not A) and B;
when "1001" => F <= A xor B;
when "1010" => F <= B;
when "1011" => F <= A or B;
when "1100" => F <= (others => '0');
when "1101" => F <= A and (not B);
when "1110" => F <= A and B;
when others => F <= A;
end case;
Cout <= '0'; -- No carry in logic mode
else -- Operaciones Aritméticas
case S is
when "0000" => temp_result <= ('0' & A) - "00001" + Cn;
when "0001" => temp_result <= ('0' & A) and ('0' & B) - "00001" + Cn;
when "0010" => temp_result <= ('0' & A) and (not('0' & B)) - "00001" + Cn;
when "0011" => temp_result <= not("00000") + Cn;
when "0100" => temp_result <= ('0' & A) + (('0' & A) or (not('0' & B))) + Cn;
when "0101" => temp_result <= (('0' & A) and ('0' & B)) + (('0' & A) or (not('0' &
B))) + Cn;
when "0110" => temp_result <= ('0' & A) - ('0' & B) - "00001" + Cn;
when "0111" => temp_result <= ('0' & A) or not(('0' & B)) + Cn;
when "1000" => temp_result <= ('0' & A) + (('0' & A) or ('0' & B)) + Cn;
when "1001" => temp_result <= ('0' & A) + ('0' & B) + Cn;
when "1010" => temp_result <= (('0' & A) and (not('0' & B))) + (('0' & A) or ('0'
& B)) + Cn;
when "1011" => temp_result <= ('0' & A) or ('0' & B) + Cn;
 when "1100" => temp_result <= ('0' & A) + ('0' & A) + Cn;
when "1101" => temp_result <= (('0' & A) and ('0' & B)) + ('0' & A) + Cn;
when "1110" => temp_result <= (('0' & A) and (not('0' & B))) + ('0' & A) + Cn;
when others => temp_result <= ('0' & A) + Cn;
end case;
F <= temp_result(3 downto 0); -- Parte de 4 bits
Cout <= temp_result(4); -- Bit de carry

if temp_result > "01110" or temp_result < "00001" then

P <= '1';
else
P <= '0';
end if;

if temp_result > "01111" or temp_result < "00000" then

G <= '1';
else
G <= '0';
end if;

if F = "1111" then
igual <= '1';
else
igual <= '0';
end if;

end if;
end process;

end Behavioral;