Angus Electronics Company Limited: Preliminary
Angus Electronics Company Limited: Preliminary
Angus Electronics Company Limited: Preliminary
Princeton Technology Corp. Tel: (852) 2345 0540 Fax: (852) 2345 9948 Web Site: www.angus.com.hk
DESCRIPTION
PT2322 is a 6-Channel Audio Processor IC utilizing CMOS Technology specially designed for audio
applications. 6-channel individual input, 6-channel master volume control, 6-channel individual volume
trim control, 3-band tone control (treble, middle, and bass), mute function, 3D effect function, tone
defeat function are all built into a single chip having the highest performance and reliability with the
least components. Furthermore, the pin assignments and application circuit are optimized for easy PCB
Layout and cost saving benefits. Housed in 28 pins, DIP or SO Package, PT2322 is the ultimate answer
to your every audio system needs.
FEATURES
• Very Low Power Consumption (DC=9V)
• I2C Bus Control
• 6-Channel Individual Input
• 6-Channel Master Volume Control: 0 to -79 dB (1 dB/step)
• 6-Channel Individual Output TRIM Volume Control: 0 to -15 dB (1dB/step)
• 3-Band Tone Control (Treble, Middle, Bass): + 14dB , 2dB/step
• Mute Function
• 3D Effect Function
• Tone Defeat Function
• Low Noise
• High Channel Separation
• Low Harmonic Distortion
• Least External Components
• Easy to Use
• Available in 28-pin, DIP or SO Package
APPLICATIONS
• Audio/Video System
• Multi-Media Speakers
• TV System
• PC Audio
• AC3 Amplifier System
BLOCK DIAGRAM
IN_SUB
IN_CT
IN_SR
IN_FR
IN_FL
IN_SL
V REF
G ND
10
11
6
5
4
FL SL CT SUB SR FR
6-CHANNEL
VOLUME CONTROL
&
MUTE
12 3
CTRE_FL
CTRE_FR
CO NTROL
CON TROL
13 2
TONE
TO NE
RCMID1_FL RCMID1_FR
14 1
RCMID2_FL RCMID2_FR
15 28
RCBAS1_FL RCBAS1_FR
16 27
RCBAS2_FL RCBAS2_FR
TONE TONE
CONTROL TONE CONTROL
ON TONE 26
DEFEAT DEFEAT ON
GND
3D 3D IC
2
CONTROL 25
SDA
UNIT
6-CHANNEL OUTPUT
VOLUME TRIM
19
20
21
22
23
24
18
17
O UT_CT
OUT_SR
OUT_FR
OUT_FL
OUT_SL
VCC
OUT_SUB
SCL
PIN CONFIGURATION
RCMID2_FR 1 28 RCBAS1_FR
RCMID1_FR 2 27 RCBAS2_FR
CTRE_FR 3 26 GND
IN_FR 4 25 SDA
IN_SR 5 24 SCL
IN_SUB 6 23 OUT_FR
VREF 7 22 OUT_SR
GND 8 21 OUT_SUB
IN_CT 9 20 VCC
IN_ST 10 19 OUT_CT
IN_FL 11 18 OUT_SL
CTRE_FL 12 17 OUT_FL
RCMID1_FL 13 16 RCBAS2_FL
RCMID2_FL 14 15 RCBAS1_FL
PIN DESCRIPTION
Pin Name I/O Description Pin No.
RCMID2_FR - Right Channel Tone Component Pin (note 4) 1
RCMID1_FR - Right Channel Tone Component Pin (Note 4) 2
CTRE_FR - Right Channel Tone Component Pin (note 6) 3
IN_FR I Front Right Input Pin 4
IN_SR I Rear Right Channel Input Pin 5
IN_SUB I Subwoofer Channel Input Pin 6
VREF - Reference Voltage 7
GND - Ground 8, 26
IN_CT I Center Channel Input Pin 9
IN_SL I Rear Left Channel Input Pin 10
IN_FL I Front Left Channel Input Pin 11
CTRE_FL - Left Channel Tone Component Pin (note 1) 12
RCMID1_FL - Left Channel Tone Component Pin (note 2) 13
RCMID2_FL - Left Channel Tone Component Pin (note 2) 14
RCBAS1_FL - Left Channel Tone Component Pin (note 3) 15
RCBAS2_FL - Left Channel Tone Component Pin (note 3) 16
OUT_FL O Front Left Channel Output Pin 17
OUT_SL O Rear Left Channel Output Pin 18
OUT_CT O Center Output Channel Pin 19
VCC - Positive Power Supply 20
OUT_SUB O Subwoofer Channel Output Pin 21
OUT_SR O Rear Right Channel Output Pin 22
OUT_FR O Front Rear Channel Output Pin 23
SCL I I2C Control Bus Clock Input 24
SDA I I2C Control Bus Data Input Pin 25
RCBAS2_FR - Right Channel Tone Component Pin (note 5) 27
RCBAS1_FR _ Right Channel Tone Component Pin (note 5) 28
Notes: 1. CTRE_FL 2. RCMID1_FL RCMID2_FL 3. RCBAS1_FL RCBAS2_FL 4. RCMID1_FR RCMID2_FR 5. RCBAS1_FR RCBAS2_FR 6. CTRE_FR
C1 C2 C1 C2 C1 C2 C1 C2
FUNCTIONAL DESCRIPTION
Bus Interface
Data are transmitted to and from the microprocessor to the PT2322 via the SDA and SCL. The SDA
and SCL make up the BUS Interface. It should be noted that the pull-up resistors must be connected to
the positive supply voltage.
Data Validity
A data on the SDA Line is considered valid and stable only when the SCL Signal is in HIGH State.
The HIGH and LOW States of the SDA Line can only change when the SCL signal is LOW. Please
refer to the figure below.
SDA
SCL
A Start Condition is activated when 1) the SCL is set to HIGH and 2) SDA shifts from HIGH to LOW
State. The Stop Condition is activated when 1) SCL is set to HIGH and 2) SDA shifts from LOW to
HIGH State. Please refer to the timing diagram below.
SCL
SDA
Byte Format
Every byte transmitted to the SDA Line consists of 8 bits. Each byte must be followed by an Acknowl-
edge Bit. The MSB is transmitted first.
Acknowledge
During the Acknowledge Clock Pulse, the master (µP) puts a resistive HIGH level on the SDA Line.
The peripheral (audio processor) that acknowledges has to pull-down (LOW) the SDA line during the
Acknowledge Clock Pulse so that the SDA Line is in a Stable Low State during this Clock Pulse. Please
refer to the diagram below.
SCL
SDA
The audio processor that has been addressed has to generate an Acknowledge after receiving each byte,
otherwise, the SDA Line will remain at the High Level during the ninth (9th) Clock Pulse. In this case,
the master transmitter can generate the STOP Information in order to abort the transfer.
If you want to avoid the acknowledge detection of the audio processor, a simpler µP transmission may
be used. Wait one clock and do not check the slave acknowledge of this same clock then send the new
data. If you use this approach, there are greater chances of faulty operation as well as decrease in noise
immunity.
Interface Protocol
PT2322 Address
Software Specification
PT2322 ADDRESS
1 0 0 0 1 0 0 0
MSB LSB
After Power is turned ON, PT2322 needs to wait for a short time in order to insure stability. This wait-
ing period is relative to the value of Cref. As the Cref value becomes bigger, the waiting time period for
PT2322 to be able to send I2C Bus Signal effectively becomes longer.
For example, if Cref = 10µF, after power is turned ON, the waiting time period for PT2322 to send I2C
Bus Signal is at least 300 ms. If the waiting time period is less than 300 ms, I2C Control may fail.
Please refer to the diagram below.
POWER ON
VDD
At least 300 ms
SDA/
SCL
Note: After power is turned ON, PT2322 must send a Code - “11000111” (C7H) - to activate Input
SW.
Function Select Bits are given in the FUNC SEL Table below.
E3 E2 E1 E0 dB E3 E2 E1 E0 dB
0 0 0 0 0 1 0 0 0 -8
0 0 0 1 -1 1 0 0 1 -9
0 0 1 0 -2 1 0 1 0 -10
0 0 1 1 -3 1 0 1 1 -11
0 1 0 0 -4 1 1 0 0 -12
0 1 0 1 -5 1 1 0 1 -13
0 1 1 0 -6 1 1 1 0 -14
0 1 1 1 -7 1 1 1 1 -15
For example, if we set the Master Volume Control to -42 dB, the data string will be:
After Power is turned ON, PT2322 must send a Code--- “11000111” (C7H) to activate Input SW.
+10
+5
dB +0
-5
-10
-15
20 50 100 200 500 1k 2k 5k 10k 20k
Hz
+10
+5
dB +0
-5
-10
-15
20 50 100 200 500 1k 2k 5k 10k 20k
Hz
+10
+5
dB +0
-5
-10
-15
20 50 100 200 500 1k 2k 5k 10k 20k
Hz
VCC
C23 TO
22uF MICROCONTROLLER
R14 R16
3.3K 6.2K I2C DATA
I2C CLOCK
C7 U2A
3 FRONT L
U1A C1
FRONT L 3 IC1 PT2322 10uF R7 1
1 28 100K
R1 10uF RCMID2 RCBAS1_FR C8
1 2 27 2 FRONT R
100K RCMID1 RCBAS2_FR
C2 3 26
CTRE_FR GND 10uF R8
FRONT R 2 4 25
Page 13
PRELIMINARY
R3 10uF Cref IN_CT VCC
4 10 19 5 SUBWOOFER
100K 10uF IN_SL OUT_CT
C4 11 18
IN_FL OUT_SL 10uF R10
SUBWOOFER 5 12 17
CTRE_FL OUT_FL 100K
13 16 C11 U2C
R4 10uF RCMID1_FL RCBAS2_FL
14 15 9 SURROUND L
100K RCMID2_FL RCBAS1_FL
U1C C5
SURROUND L 9 10uF R11 7
100K
R5 10uF C12
7 8 SURROUND R
100K
C6 10uF R12
SURROUND R 8
100K
R6 10uF C13 C15 C16 C19 C20
Written March 2000
PT2322
R13 R15
3.3K 6.2K
ANGUS ELECTRONICS COMPANY LIMITED
Princeton Technology Corp. Tel: (852) 2345 0540 Fax: (852) 2345 9948 Web Site: www.angus.com.hk
ELECTRICAL CHARACTERISTICS
(Unless otherwise specified, Tamb=25oC, VDD=12V, RL=100 KOhms, Rg=40 Ohms, All volume
attenuations = 0dB, F=1KHz)
ORDER INFORMATION
Valid Part Number Package
PT2322 28 Pins, DIP Package (600 mil)
PT2322-S 28 Pins, SO Package (330 mil)
PACKAGE INFORMATION
A2 A1
E1
L1
e
b c
Body Lead Lead Lead Lead
Body Size Lead Stand- off
Thickness Length Width Thickness Pitch
C ount
D1 E1 A1 A2 L1 b c e
713 331 28 6 98 67 16 10 50