Compal La-1281 R2a Schematics

A B C D E
Compal confidential Block Diagram

Model Name : CY23 LA-1281 Rev:2.0
1 1
INTEL FC-PGA370
APICCLK
CRT
om
HCLK_CPU
Connector Page 2,3
page 14
HA#(3..31) HD#(0..63) Y1
14.318MHZ
TV_OUT 14MOSC
Connector Twister PN-133T
HCLK_NB
Clock Generator 14MCRT/14.3M_TV
.c
page 13 PCLK_NB
PCLK_1394
(VT8606)PCIGNT#/PCIREQ# DCLKWR
ICS 9248-195
page 11 PCLK_PCM
page 4,5,6 PIRQA# DCLKO
op
PCLK_MINI
CLK_SDRAM0
MA(0..13)
TFT Panel
MD(0..63)
CLK_SDRAM2,3
Interface
2 2
page 14
pt
On Board
AD(0..31)
Memory Damping 64/128MB SO-DIMM 0
Resistor (Bank 2,3)
page 6 (Bank 0) page 8
La
PCLK_SB
page 7
PCI BUS
ia
USB Port 0,1
Mini PCI CardBus FIR DIRECT
IEEE 1394 VT686B 48MHZ
CD-PLAY
Socket OZ6933
as
PIRQB#/PIRQD#
PIRQC#
GNT#2/REQ#2 AC97 page 25
page 9,10
14MOSC
FUNCTION
GNT#0/REQ#0
GNT#1/REQ#1
PIRQA#/PIRQB#
GNT#3/REQ#3
AD24
Interface IDE CHANNEL 1 page 18
page 23 AD27/AD28 page 15 AD15 page 29
page 27
3
ah S A ( 0..15)
Pull Up/Down 3
Slot 0& 1 Slot 0 S D ( 0..15) Resistor

page 29
page 16 ISA BUS IDE Damping page 12
Power On/Off Resistor
Reset Circuit
.R
page 17
page 28
KeyBoard
87570 IDE Connector PIO
w
page 20 page 24
(FDD/HDD/CR-ROM)
DC/DC Interface
RTC Battery page 19
w
page 22
I/O Buffer KBD

w
page 21 page 21
4 4
Power Circuit BIOS Touch Pad

DC/DC page 21 page 26
page
30,31,32,33 Compal Electronics , Inc.
Title
T H I S S H E E T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND SCHEMATIC,M/BLA-1281
PROPRIETARY NOTE T R A D E S E C RET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
D E P A R T M E N T EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B 2A
401202
U S E D B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 九月 04, 2002 Sheet 1 of 34
A B C D E
A B C D E
+5VS
HA#[3..31] HD#[0..63]
4 HA#[3..31] U38A HD#[0..63] 4
1
HA#3 AK8 W1 HD#0 R90
HA#4 A3# D0# HD#1 200
AH12
FC-PGA2 T4
1
HA#5 AH8 A4# D1# N1 HD#2 C79
HA#6 AN9 A5# D2# M6 HD#3 .1UF
HA#7 AL15 A6# D3# U1 HD#4
A7# D4#
2
HA#8 AH10 S3 HD#5 1617VCC
HA#9 A8# D5# HD#6
AL9 T6
HA#10 AH6 A9# D6# J1 HD#7 U6
VCMOS VCMOS +3VS HA#11 AK10 A10# D7# S1 HD#8 C80 1 16 from 87570
1
4 4
HA#12 AN5 A11# D8# P6 HD#9 2 NC NC 15
HA#13 AL7 A12# D9# Q3 HD#10 2200PF THERMDA 3 VCC STBY 14
A13# D10# DXP SMBCLK SMC 18,20,24
HA#14 AK14 M4 HD#11 THERMDC 4 13
2
2
HA#15 AL5 A14# D11# Q1 HD#12 5 DXN NC 12
2
A15# D12# NC SMBDATA SMD 18,20,24
R64 R67 R73 HA#16 AN7 L1 HD#13 6 11
A16# D13# ADD1 ALERT
om
1.5K 1.5K 10K HA#17 AE1 N3 HD#14 7 10
HA#18 Z6 A17# D14# U3 HD#15 8 GND ADD0 9
HA#19 A18# D15# HD#16 GND NC
AG3 H4
HA#20 AC3 A19# D16# R4 HD#17 MAX1617 ATF# 21
1
21
1
HA#21 AJ1 A20# D17# P4 HD#18
HA#22 AE3 A21# D18# H6 HD#19
FERR#1.5 3 1 HA#23 AB6 A22# D19# L3 HD#20
FERR# 9 A23# D20#
HA#24 AB4 G1 HD#21
1
HA#25 AF6 A24# D21# F8 HD#22 R89 R96
HA#26 Y3 A25# D22# G3 HD#23 1K
Q5 A26# D23# 1K
HA#27 AA1 REQUEST DATA K6 HD#24
.c
HA#28 AK6 A27# D24# E3 HD#25 1 2 PWRGD_CPU 1 2
PHASE PHASE 9,27,32 VR_POK +2.5V_CLK
FDV301N HA#29 A28# D25# HD#26 R27 180
Z4 SIGNALS SIGNALS E1
2
HA#30 AA3 A29# D26# F12 HD#27 D7 1 2
HA#31 AD4 A30# D27# A5 HD#28 RB751V R395 @1.8K
X6 A31# D28# A3 HD#29 +5VS CPU_IO
A32# D29#
op
AC1 J3 HD#30
A33# D30# HD#31
W3 C5
AF4 A34# D31# F6 HD#32
A35# D32# C1 HD#33
HREQ#0 AK18 D33# C7 HD#34
4 HREQ#0 REQ0# D34#
HREQ#1 AH16 B2 HD#35 BREQ0# 8 1 HA#5 8 1 HD#39 1 8 HD#1 8 1
4 HREQ#1 REQ1# D35#
HREQ#2 AH18 C9 HD#36 RS#2 7 2 HA#13 7 2 HD#36 2 7 HD#5 7 2
4 HREQ#2 REQ2# D36#
3 HREQ#3 AL19 A9 HD#37 DBSY# 6 3 HA#10 6 3 HD#37 3 6 HD#8 6 3 3
4 HREQ#3 REQ3# D37#
pt
HREQ#4 AL17 D8 HD#38 DRDY# 5 4 HA#12 5 4 HD#38 4 5 HD#17 5 4
4 HREQ#4 REQ4# D38#
AN23 D10 HD#39
RP# D39# C15 HD#40 RP2 RP6 RP43 RP25
ADS# D40# HD#41 @8P4R-56 @8P4R-56 @8P4R-56 @8P4R-56
AN31 D14
4 ADS# ADS# D41# D12 HD#42 HA#16 8 1 HD#27 1 8 HD#0 8 1
D42# A7 HD#43 HA#15 7 2 HD#42 2 7 HD#4 7 2
D43#
La
AK24 A11 HD#44 HA#28 6 3 HD#45 3 6 HD#15 6 3
AL11 AERR# ERROR D44# C11 HD#45 HA#31 5 4 HD#44 4 5 HD#6 5 4
AP0# D45# RP26
AN13 SIGNALS A21 HD#46 IGNNE# 1 8
AP1# D46# VCMOS
V4 A15 HD#47 A20M# 2 7 RP14 RP44 RP24
B36 BERR# D47# A17 HD#48 INTR 3 6 @8P4R-56 @8P4R-56 @8P4R-56
AE35 BINIT# D48# C13 HD#49 NMI 4 5 HA#19 8 1 HD#40 1 8 HD#12 8 1
IERR# D49# C25 HD#50 HA#25 7 2 HD#41 2 7 HD#10 7 2
BREQ0# D50# HD#51 8P4R-150 HA#22 HD#49 HD#9
AN29 A13 6 3 3 6 6 3
4 BREQ0# BR0# D51#
ia
BPRI# AN17 D16 HD#52 PRDY# 1 2 HA#17 5 4 HD#51 4 5 HD#18 5 4
4 BPRI# BPRI# D52#
BNR# AH14 ARBITRATION A23 HD#53 R151 150
4 BNR# BNR# D53#
LOCK# AK20 PHASE C21 HD#54 SLP# 1 2 RP20 RP45 RP28
4 HLOCK# LOCK# D54#
X2 SIGNALS C19 HD#55 R54 150 @8P4R-56 @8P4R-56 @8P4R-56
BR1#/RSVD* D55# HD#56 CPUINIT# HA#23 HD#48 HD#14
C27 1 2 8 1 1 8 8 1
HIT# AL25 D56# A19 HD#57 R61 150 HA#24 7 2 HD#63 2 7 HD#2 7 2
4 HIT#
as
HITM# AL23 HIT# SNOOP PHASE D57# C23 HD#58 STPCLK# 1 2 HA#20 6 3 HD#52 3 6 HD#3 6 3
4 HITM# HITM# D58#
DEFER# AN19 SIGNALS C17 HD#59 R53 150 HA#27 5 4 HD#47 4 5 HD#11 5 4
4 DEFER# DEFER# D59# A25 HD#60 FLUSH# 1 2
D60# HD#61 R57 150 RP19 RP46 RP27
G33 A27
E37 BP2# RESPONSE D61# E25 HD#62 SMI# 1 2 @8P4R-56 @8P4R-56 @8P4R-56
C35 BP3# D62# F16 HD#63 R47 150 HA#30 8 1 HD#46 1 8 HD#13 8 1
PHASE
E35 BPM0# D63# PREQ# 1 2 HA#29 7 2 HD#55 2 7 HD#20 7 2
BPM1# SIGNALS
HTRDY# AN25 R127 330 HA#18 6 3 HD#57 3 6 HD#7 6 3
2 4
4
4
HTRDY#
RS#0
RS#1
RS#0
RS#1
AH26
AH22
TRDY#
RS0#
ah DEP0#
C33
C31
HA#26 5 4 HD#59 4 5 HD#16 5 4 2
RS#2 AK28 RS1# DEP1# A33 CPURST# 1 2 RP22 RP47 RP31

4 RS#2 RS2# DEP2#
AC37 A31 R26 56.2_1% CPU_IO @8P4R-56 @8P4R-56 @8P4R-56
RSP# DEP3# E31 ADS# 1 2 HREQ#2 8 1 HD#50 1 8 HD#19 8 1
A20M# DEP4# R7 @56.2_1% HREQ#0 HD#58 HD#24
AE33 C29 7 2 2 7 7 2
3 A20M# A20M# DEP5#
FERR#1.5 AC35 PC E29 HREQ#4 6 3 HD#53 3 6 HD#30 6 3
IGNNE# AG37 FERR# DEP6# A29 BPRI# 5 4 HD#54 4 5 HD#22 5 4
3 IGNNE# COMPATIBILITY
.R
PWRGD_CPU AK26 IGNNE# DEP7#
PWRGOOD SIGNALS
SMI# AJ35 AL27 DBSY# RP9 RP48 RP30
9 SMI# SMI# DBSY# DBSY# 4
AN27 DRDY# @8P4R-56 @8P4R-56 @8P4R-56
DRDY# DRDY# 4
AN37 RS#1 8 1 HD#61 1 8 HD#43 1 8
1 8 AN35 TDO DIAGNOSTIC HLOCK# 7 2 HD#56 2 7 HD#34 2 7
2 7 AK32 TDI HREQ#3 6 3 HD#62 3 6 HD#32 3 6
& TEST
3 6 AN33 TMS DEFER# 5 4 HD#60 4 5 HD#28 4 5
TRST# SIGNALS
w
4 5 PWRGD_CPU AL33
6 BSEL0 TCK
PREQ# J37 J33 RP10 RP49 RP42
6,11 BSEL1 PREQ# PICCLK APICCLK 11
RP98 PRDY# A35 L35 @8P4R-56 @8P4R-56 @8P4R-56
PRDY# PICD1 VCMOS
2 1 R6 1K 8P4R-1K AJ33 J35 R117 150 RS#0 8 1 HA#4 8 1 HD#31 1 8
+3VS 2 1 R5 1K AJ31 BSEL0 PICD0 R131 150 HIT# 7 2 HA#8 7 2 HD#25 2 7
BSEL1
2 1 R10 @1K AG33 CPUINIT# HTRDY# 6 3 HA#11 6 3 HD#29 3 6
w
INIT# CPUINIT# 9
INTR M36 AE37 FLUSH# HITM# 5 4 HA#9 5 4 HD#35 4 5
3 INTR INTR/LINT0 FLUSH#
NMI L37 EXECUTION AH4 CPURST#
3 NMI NMI/LINT1 RESET# CPURST# 4,9
STPCLK# AG35 CONTROL X4 RP11 RP7 RP41
9 STPCLK# STPCLK# RESET2#/VSS*
SLP# AH30 SIGNALS W37 R94 1K @8P4R-56 @8P4R-56 @8P4R-56
9 SLP# SLP# BCLK HCLK_CPU 11 HREQ#1 8 1 HA#3 8 1 HD#23 1 8
1
C533 reserve for

w
Intel Celeron THERMDA AL31 AG1 1 2 C94 HA#7 7 2 HA#6 7 2 HD#21 2 7

C139 THERMDC AL29 THERMDA THERMAL DIODE EDGCTRL/VTT* R396 1K 2 1 1 2 BNR# 6 3 HA#21 6 3 HD#26 3 6
,VIA recommend
1UF THERMDC R97 10 10PF HA#14 5 4 5 4 HD#33 4 5
3
1 * For Intel New CPU 1

2
2 TUAL5 3,11,32
FC-PGA2 RP8 RP1 RP40
Q56 @8P4R-56 @8P4R-56 @8P4R-56
SELPSB[1:0] S T S E M BUS FREQUENCY FDV301N
1
00 66MHZ CPU_IO Compal Electronics, Inc.

01 100MHZ Title
10 RESERVED T H I S S H E E T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND SCHEMATIC, M/B LA-1281
11 133MHZ B 2A
D E P A R T M E N T EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
401202
A B C D E
A B C D E
T H I S S H E E T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
U38B PROPRIETARY NOTE T R A D E S E C RET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AM22 D E P A R T M E N T EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
AD36 VSS0 AM26
CPU_IO VCC1.5/VTT* VSS1 U S E D B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Z36 AM30
VCC2.5/RSVD* VSS2 AM34 R397
VSS3 1K CPU_IO CPU_IO CPU_IO +5V
C181 E33 AM6
1
VREF0 VSS4 U38C
F18 AN3 DYN_OE 1 2 RP13
VREF1 VSS5/DYN_OE* CPU_IO
.1UF K4 B12 AH20 G37
R6 VREF2 VSS6 B16 AK16 VTT RSVD/VTT* L33 VID1 1 8
VREF3 VSS7 VTT RSVD
2
V6 B20 AL13 N33 VID2 2 7
1
C218 C217 C216 C215 C214 C213 C212 C211 C210 C209
VREF4 VSS8 VTT RSVD VID0
AD6 B24 AL21 N35 3 6
VCCTREF AK12 VREF5 VSS9 B28 .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF AN11 VTT RSVD N37 NCHCTRL VID3 4 5
VCCTREF VREF6 VSS10 VTT RSVD/NCHCTRL*
4 AK22 B32 AN15 Q33 4
VCMOSREF VREF7/VCMOS_REF* VSS11 VTT RSVD
2
R150 B4 G35 Q35
1
CPU_IO 1 2 VCCTREF AA37 VSS12 B8 CPU_IO AA33 VTT FC-PGA370 RSVD Q37 R398
8P4R-10K
VCC0 VSS13 VTT RSVD VID4
AA5 D18 AA35 R2 1 2
75_1%
1
C166 C144 C110 C60 AB2 VCC1 VSS14 D2 AN21 VTT P O WER AND NC RSVD W35 R399 10K
1
R118 AB34 VCC2 VSS15 D22 E23 VTT RSVD Y1 14_1%
.1UF VCC3 FC-PGA370 VSS16 VTT RSVD
om
.1UF .1UF AD32 D26 S33 AK30
1
C186 C185 C5 C141 C119 C111 C9 C47 C11 C12
VCC4 VSS17 VTT RSVD
2
150_1% AE5 D30 S37 AM2
VCC5 VSS18 VTT RSVD/KEY*
2
2
E5 D34 .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF U35 F10 CPU_IO
E9 VCC6 VSS19 D4 U37 VTT RSVD
2
2
4.7UF_0805 F14 VCC7 VSS20 E11 VTT AL35 VID0
F2 VCC8 VSS21 E15 CPU_IO VID0 AM36 VID1
VCMOSREF F22 VCC9 VSS22 E19 VID1 AL37 VID2
VCC10 POWER, VSS23 VID2 VID3
F26 E7 AJ37
R400 F30 VCC11 GROUND, VSS24 F20 VID3
1 2 F34 VCC12 VSS25 F24
VCMOS RESERVED
F4 VCC13 VSS26 F28 + C6
.c
1
SIGNALS C10
75_1% H32 VCC14 VSS27 F32
1
C501 220UF_E * For Intel New CPU

R401 VCC15 VSS28 .1UF
H36 F36
.1UF J5 VCC16 VSS29 G5
CPU_CORE
2
150_1% K2 VCC17 VSS30 H2
VCC18 VSS31
2
K32 H34 CPU_CORE FC-PGA370

VCC19 VSS32
op
K34 K36
VCC20 VSS33
2
M32 L5
N5 VCC21 VSS34 M2
P2 VCC22 VSS35 M34 C427 C429 C434 C445 C446 C441 C442 C443 C444 C433 C428
1
P34 VCC23 VSS36 P32 VID[0..4]
VCC24 VSS37 32 VID[0..4]
R32 P36 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF
VCC25 VSS38
R36 A37
2
3 S5 VCC26 VSS39 AB32 3
VCC27 VSS40 VCMOS
pt
T2 AC33 CPU_CORE
T34 VCC28 VSS41 AC5 +3VS
8
7
6
5
V32 VCC29 VSS42 AD2 RP58
VCC30 VSS43 C266
V36 AD34
VCC31 VSS44 @8P4R_1K
W5 AF32 C421 C412 C411 C410 C414 C416 C415 C151 C142 C117 1 2
1
VCC32 VSS45 U18
X34 AF36 TUALDET
CPU_IO VCC33/VTT* VSS46/DETECT* 1UF 1UF 1UF
La
Y35 AG5 1UF 1UF 1UF 1UF 1UF 1UF 1UF 2 16 @.1UF
VCC34 VSS47 IOA VCC
1
2
3
4
Z32 AH2 SB_A20M# 3
VCC35 VSS48 9 SB_A20M# IOA
2
AF2 AH34 4 A20M#
VCC36 VSS49 YA A20M# 2
AF34 AJ11 5
AH24 VCC37 VSS50 AJ15 SB_IGNNE# 6 IOB
+5V AH32 VCC38 VSS51 AJ19 CPU_CORE 9 SB_IGNNE# IOB 7 IGNNE#
VCC39 VSS52 YB IGNNE# 2
AH36 AJ23 11
1
C101 C88 C425 C76 C63 C62 C61 C77 C87 C120 C149
VCC40 VSS53 SB_INTR I1C
AJ13 AJ27 10
VCC41 VSS54 .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF 9 SB_INTR I1C
ia
AJ17 AJ3 9 INTR
VCC42 VSS55/RESET2#* YC INTR 2
AJ21 AJ7 14
1
VCC43 VSS56 I1D
2
R402 R403 R404 AJ25 AK36 VID4 SB_NMI 13
VCC44 VSS57/VID_25mV* 9 SB_NMI I1D
AJ29 AK4 1 2 12 NMI
VCC45 VSS58/VTT_PWRGD* VTTPWRGD 11,32 YD NMI 2
10K 2.7K 2.7K AJ5 AL1 R405 1K
1
1
1
1
AK2 VCC46 VSS59/RSVD* AL3 CRESET# 1 8
4 CRESET#
as
AK34 VCC47 VSS60 AM10 S GND 15 1 2
TUAL5 2,11,32 VCC48 VSS61 E#
2
1 2
AM12 AM14 CPU_CORE

Q57 AM16 VCC49 VSS62 AM18 R172 @1K
VCC50 VSS63 @QS3257
2 AM20 Q5 R165 R175
2
2
2
2
FDV301N AM24 VCC51 VSS64 R34 @0 @0
AM28 VCC52 VSS65 T32 C160 C167 C164 C165 C170 C168 C172 C173 C162 C156 C169
R166
1
AM32 VCC53 VSS66 T36 @0
1
C
VCC54 VSS67
3
TUALDET 2 AM4 U5 .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF R162 SW1 RATIO SELECT
2 B TUAL5# 11
AM8 VCC55
ah VSS68 V2 CPU_CORE @0 RATIO 1 2 3 4
2
2
Q58 E B10 VCC56 VSS69 V34
B14 VCC57 VSS70 X32
VCC58 VSS71 3X ON OFF ON ON
3
FMMT3904 B18 X36

B22 VCC59 VSS72 Y37
VCC60 VSS73 3.5X ON OFF OFF ON
B26 Y5 + C457 + C178 + C449 + C116 + C150 + C135
B30 VCC61 VSS74 Z2 220UF_E 220UF_E SB_A20M# 1 2 A20M#
220UF_E 220UF_E 220UF_E 220UF_E 4X OFF ON ON ON
B34 VCC62 VSS75 Z34 R168
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
.R
B6 VCC63 VSS76 0
C3 VCC64 SB_IGNNE# 1 2 IGNNE# 4.5X OFF ON OFF ON
VCC65 R159
D20 5X OFF OFF ON ON
D24 VCC66 W33 VCCT 1 2 0
VCC67 PLL1 CPU_CORE
D28 U33 VSST L18 4.7Uh_0805 SB_INTR 1 2 INTR
D32 VCC68 PLL2 C109 R157 5.5X OFF OFF OFF ON
1
D36 VCC69 + C140 0 6X ON ON ON OFF

VCC70
w
D6 .1UF SB_NMI 1 2 NMI

E13 VCC71 E21 R158
33UF_6.3X2.5
2
E17 VCC72 VEDT/RSVD* 0 6.5X ON ON OFF OFF

AJ9 VCC73
VCC74 7X ON OFF ON OFF
R353
w
CPU_CORE 7.5X ON OFF OFF OFF

56_1%
2 1 S35
2 1 E27 RTTCTRL
SLEWCTRL AB36
1
1
CPU_IO C417 C438 C418 C420 C431 C437 C426 C430 C435 C439
R149 VCCCMOS/VTT*
w
110_1% C203 4.7UF_1206 4.7U_1206 4.7U_1206 4.7U_1206 4.7U_1206 4.7U_1206 4.7U_1206 4.7UF_1206 4.7UF_1206 4.7UF_1206
1
AH28
THERMTRIP#
2
2
1 2 1 CLKREF Y33 C37 .1UF 1
+2.5V_CLK CLKREF/BCLK#* CPUPRES# CPU_CORE
2
R91
2
150_1% C70 C83

1
* For Intel New CPU

R78
150_1% 4.7UF_0805 .1UF
FC-PGA370 + C422 + C458 + C459 + C134 + C404 + C400 Compal Electronics, Inc.
2
220UF_E 220UF_E 220UF_E 220UF_E 220UF_E 220UF_E

1
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V Title

SCHEMATIC, M/B LA-1281
Size Document Number Rev
B 2A
401202
A B C D E
A B C D E
HD#[0..63]
HD#[0..63] 2
HA#[3..31] +2.5VS
2 HA#[3..31]
U14A
HD#[0..63]
HD#0 E19 HA#[3..31]
HD0# U14E
HD#1 B18 A25 HA#3
HD#2 B16 HD1# HA3# D24 HA#4 J9 A9
HD#3 A16 HD2# HA4# B25 HA#5 J10 VCC25 GND A18
HD#4 C18 HD3# HA5# B26 HA#6 J11 VCC25 GND A26
HD#5 C17 HD4# HA6# E23 HA#7 J12 VCC25 GND B2
HD#6 D18 HD5# HA7# C26 HA#8 J15 VCC25 GND C8
HD6# HA8# VCC25 GND
1
HD#7 D15 C24 HA#9 + C113 C171 C248 C249 C208 C200 C127 C132 C130 J16 C14
HD#8 HD7# HA9# HA#10 VCC25 GND
4 D17 A23 J17 C19 4
HD#9 C16 HD8# HA10# C25 HA#11 4.7UF_1206 .1UF .1UF .1UF .1UF .01UF .01UF .01UF .01UF J18 VCC25 GND D4
HD#10 B17 HD9# HA11# D22 HA#12 K9 VCC25 GND D23
2
HD#11 D16 HD10# HA12# B24 HA#13 K18 VCC25 GND F6
HD#12 A17 HD11# HA13# D25 HA#14 C223 L9 VCC25 GND F13
HD#13 A15 HD12# HA14# F22 HA#15 150UF_E_4V L18 VCC25 GND F14
HD#14 E16 HD13# HA15# C23 HA#16 M9 VCC25 GND F16
om
HD#15 D19 HD14# HA16# D21 HA#17 M18 VCC25 GND F21
HD#16 A14 HD15# HA17# A20 HA#18 R9 VCC25 GND H24
HD#17 E18 HD16# HA18# C22 HA#19 R18 VCC25 GND J13
E17 A21 T9 J14
HD#19 B14 HD18# HA20# B23 HA#21 T18 VCC25 GND J26
HD#20 C15 HD19# HA21# A22 HA#22 U9 VCC25 GND L11
HD#21 E14 HD20# HA22# B21 HA#23 U18 VCC25 GND L12
HD21# HA23# VCC25 GND
1
HD#22 B11 E20 HA#24 C126 C129 C131 C196 C201 C159 C250 C128 V9 L13
HD#23 D14 HD22# HA24# B22 HA#25 V10 VCC25 GND L14
HD#24 B15 HD23# HA25# B19 HA#26 .1UF .1UF .1UF .1UF .1UF .1UF .01UF .01UF V11 VCC25 GND L15
.c
HD#25 D13 HD24# HA26# C20 HA#27 V12 VCC25 GND L16
2
HD#26 C13 HD25# HA27# A24 HA#28 V15 VCC25 GND M11
HD#27 E9 HD26# HA28# B20 HA#29 V16 VCC25 GND M12
C12 D20 V17 M13
HD#29 D12 HD28# HA30# C21 HA#31 V18 VCC25 GND M14
HD#30 E15 HD29# HA31# VCC25 GND M15
op
HD#31 A13 HD30# J24 GND M16
HD31# ADS# ADS# 2 GND
HD#32 B12 M21
HD#33 B13 HD32# E24 GND N3
HD33# HREQ#0 HREQ#0 2 GND
HD#34 A12 F23 N6
HD#35 E13 F24 N9
HD#36 D11 F25 N11
3 HD#37 D10 E25 N12 3
HD#38 A11 AF26 N13
pt
HD#39 E10 HD38# J25 AF18 GND GND N14
HD39# BREQ0# BREQ0# 2 GND GND
HD#40 E8 E26 AF9 N15
HD40# BPRI# BPRI# 2 GND GND
HD#41 C9 D26 AF1 N16
HD41# BNR# BNR# 2 GND GND
HD#42 D9 G23 AD19 N18
HD42# HLOCK# HLOCK# 2 GND GND
HD#43 C11 AD13 N21
HD#44 B10 HD43# G24 AD8 GND GND P1
HIT# 2
La
HD#45 A10 HD44# HIT# G26 AC23 GND GND P6
HD45# HITM# HITM# 2 GND GND
HD#46 E7 F26 AC4 P9
HD46# DEFER# DEFER# 2 GND GND
HD#47 D8 AA15 P11
HD#48 HD47# GND GND
B8 H26 DBSY# 2 AA14 P12
HD#49 C10 HD48# DBSY# J23 AA13 GND GND P13
HD49# DRDY# DRDY# 2 GND GND
HD#50 B6 AA21 P14
HD#51 B9 HD50# G25 AA6 GND GND P15
HD51# HTRDY# HTRDY# 2 GND GND
HD#52 F8 H23 W24 P16
HD52# RS#0 RS#0 2 GND GND
ia
HD#53 D6 K23 V26 P18
HD#54 D7 H25 V14 P21
HD#55 C7 R111 V13 R11
HD#56 E5 HD55# A19 2 @0 1 T21 GND GND R12
HD56# CPURST# CPURST# 2,9 GND GND
HD#57 A7 E22 T16 R13
HD57# CPURSTD# CRESET# 3 GND GND
HD#58 E6 T15 R14
as
HD#59 B7 HD58# E12 T14 GND GND R15
HD59# GTL_REFA VCCT_REF GND GND
HD#60 C6 E21 T13 R16
HD#61 D5 HD60# GTL_REFB T12 GND GND T11
HD#62 A6 HD61# GND GND
HD#63 A8 HD62#
HD63# VT8606
G22
11 H C L K _ N B HCLKIN
2 2
ah
2
VT8606
R130
10
11
C182
.R
10PF
2
w
w
VCCT_REF
1 R125 2 VCCT_REF
CPU_IO
75_1%
w
1
C158 C153 C148

R122 C143
1UF .1UF 1000PF 4.7UF_0805
1 1
150_1%
2
2
2
Compal Electronics, Inc.

T H IS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL Title

E L ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
T H IS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
O F R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER Size Document Number Rev
401202
B 2A
T H IS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
T H IRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A B C D E
A B C D E
+3VS AD[0..31]
U14C AD[0..31] 9,15,23,28 U14D
G6 AF14 AD0 G2
VCC3 AD0 TVD11/PD0 TVD11 13
H6 AE14 AD1 W5 H2
VCC3 AD1 9,12,15 PIRQA# INTA# TVD10/PD1 TVD10 13
J6 AE13 AD2 AGP_BUSY# B4 H1
VCC3 AD2 AGP_BUSY# PD2
1
C118 C133 C232 C267 C256 L4 AF13 AD3 SUS_STAT# 1 2 SUSSTAT# C4 J2
R21 VCC3 AD3 AC14 AD4 R119 0 STP_AGP# PD3 J1
4.7UF_1206 .1UF .1UF .1UF .1UF T4 VCC3 AD4 AB14 AD5 RP39 1 2 SUSPEND F5 PD4 H4
VCC3 AD5 20 VGASUSP SUSPEND PD5
U21 AC13 AD6 ZV8 6 5 STANDBY F4 K6
2
2
V6 VCC3 AD6 AB13 AD7 ZV11 7 4 ZV12 R390 STANDBY PD6 J4
V21 VCC3 AD7 AE12 AD8 ZV10 8 3 ZV15 0 R6 PD7 J3
VCC3 AD8 ZVD0 TVD9/PD8 TVD9 13
W6 AD12 AD9 ZV9 9 2 ZV13 T2 L5
VCC3 AD9 ZVD1 TVD8/PD9 TVD8 13
4 Y21 AB12 AD10 10 1 ZV14 T1 K2 4
Y6 VCC3 AD10 AC12 AD11 +3VS R5 ZVD2 PD10 J5
AA7 VCC3 AD11 AF11 AD12 10P8R-100K R2 ZVD3 PD11 K1
AA9 VCC3 AD12 AE11 AD13 R4 ZVD4 PD12 K3
VCC3 AD13 ZVD5 PD13
2
AA10 AD11 AD14 SUS_STAT# R1 L6
AA17 VCC3 AD14 AC11 AD15 R391 R3 ZVD6 PD14 L2
AA18 VCC3 AD15 AA8 AD16 ZV8 P5 ZVD7 PD15 K5 1 2
om
VCC3 AD16 @10K ZVD8 TVCLKR/PD16 TVCLKR 13
4
AA20 AC9 AD17 ZV9 P2 L1
VCC3 AD17 AF8 AD18 ZV10 P3 ZVD9 TVBLANK/PD17 L3 R129
AD18 ZVD10 PD18
1
1
C98 C92 C95 C96 C154 AE8 AD19 SUSPEND 1 2 6 5 ZV11 P4 M6 22
1
AD19 AD20 R392 @1K ZV12 ZVD11 PD19
AE7 N5 K4
4.7UF_1206 .1UF .1UF .1UF .1UF AD20 AB8 AD21 +3V POWER ZV13 N2 ZVD12 PD20 M4
AD21 AF7 AD22 ZV14 N1 ZVD13 PD21 M5
2
2
AD22 U28B ZVD14 PD22
AC8 AD23 ZV15 N4 M1
AD23 AC7 AD24 T3 ZVD15 PD23 T6
AD24 74LVC125 ZVHS TVD6/PD24 TVD6 13
AB7 AD25 U1 T5
AD25 ZVVS TVD4/PD25 TVD4 13
AF6 AD26 1 2 U3 U4
.c
AD26 ZVCLK TVD5/PD26 TVD5 13
AE6 AD27 R147 100K U2
AD27 TVD7/PD27 TVD7 13
AD6 AD28 F2 V1
AD28 13 SMDTV SPD1 TVD0/PD28 TVD0 13
AC6 AD29 F3 V2
AD29 13 SMCTV SPCLK1 TVD1/PD29 TVD1 13
AB6 AD30 V3
AD30 TVD3/PD30 TVD3 13
AF5 AD31 AB3 W3
CPU_IO AD31 14 TXOUT0- Y0M TVVS/PD31 TVVS 13
AA3 V4
op
14 TXOUT0+ Y0P TVCLK/PD32 TVCLK 13
AF12 Y4 U5
C/BE0# C/BE#0 9,15,23,28 14 TXOUT1- Y1M TVD2/PD33 TVD2 13
E11 AB11 W4 V5
VTT C/BE1# C/BE#1 9,15,23,28 14 TXOUT1+ Y1P TVHS/PD34 TVHS 13
F7 AD9 AA5 C5
VTT C/BE2# C/BE#2 9,15,23,28 14 TXOUT2- Y2M PD35
F9 AD7 Y5
VTT C/BE3# C/BE#3 9,15,23,28 14 TXOUT2+ Y2P
1
C502 C503 C504 C505 C506 F10 AC1 H3

VTT 14 TXCLKO- YCM PANELDEN
F12 AE9 FRAME# AB1 G4
4.7UF_1206 .1UF .1UF .1UF .1UF VTT FRAME# FRAME# 9,12,15,23,28 14 TXCLKO+ YCP PANELCLK
3 F17 AC10 IRDY# G3 3
VTT IRDY# IRDY# 9,12,15,23,28 PANELVS
F18 AD10 TRDY# AD2 G5
2
pt
VTT TRDY# TRDY# 9,12,15,23,28 14 TZOUT0- Z0M PANELHS
F19 AB9 DEVSEL# AC2
VTT DEVSEL# DEVSEL# 9,12,15,23,28 14 TZOUT0+ Z0P
F20 AB10 AD3 F1
VTT PAR PAR 9,12,15,23,28 14 TZOUT1- Z1M ENVDD ENVDD 14
G21 AE10 STOP# AC3 H5
VTT STOP# STOP# 9,12,15,23,28 14 TZOUT1+ Z1P ENVEE ENVEE 14,21
J21 AF10 SERR# AB4
VTT SERR# SERR# 9,12,15,23,28 14 TZOUT2- Z2M
K21 AA4 C3
VTT 14 TZOUT2+ Z2P GOP0
AE5 AE1 G1
PLOCK# 12,15 14 TZCLKO- BLON# 14
La
LOCK# AA11 1 2 AD1 ZCM FPGPIO AA12 R222
WSC# +3VS 14 TZCLKO+ ZCP STRW/GPOUT
R221 4.7K
AC5 REQ#0 4.7K AA16 1 2
REQ0# REQ#0 23 PANELDET
AD5 REQ#1 W1
REQ1# REQ#1 23 LVDSVCCA
AE4 REQ#2 W2 M2
REQ2# REQ#2 28 LVDS1VCCA SPCLK2 D D C _ C L K 14
AD4 REQ#3 LVDD M3
REQ3# REQ#3 15 SPD2 DDC_DATA 14
AF2 REQ#4 AB2
REQX# AC15 PLLVDD PLLVCCA C2
PREQ# PCIREQ# 9,12 RED R 14
ia
Y2 D3
VCCLVDS GREEN G 14
AB5 GNT#0 +LAVDD D2
GNT0# GNT#0 23 BLUE B 14
AF4 GNT#1 E2
GNT1# GNT#1 23 HSYNC HSYNC1 14
AF3 GNT#2 E1
GNT2# GNT#2 28 VSYNC VSYNC1 14
AE3 GNT#3 Y1 R121
GNT3# GNT#3 15 LVDSGND
AE2 GNT#4 AA1 E3 140_1% 1 2
as
2 1 AA22 GNTX# AD15 LVDS1GND RSET E4 1 2
+3V 25VSUS PGNT# PCIGNT# 9,12 COMP +DACVDD
Y3 C161
PLLGND
1
D42 AC22 SUS_STAT# C1 .1UF

SUSTAT# SUS_STAT# 9 VCCDAC
1N4148 C465 AD14 NBPWROK 2 1 AA2 D1
.1UF PWRGOOD SPWROFF# 9,20,27 GNDLVDS VCCRGB +DACVDD
U6 R274
V22 NC1 AE15 0 R110 B1
2
NC2 PCIRST# PCIRST# 9,13,15,16,19,23,28 GNDDAC

W22 AF15 CLKRUN# 1K A1
NC3 CLKRUN# C L K R U N # 9,12,15,23,28 GNDRGB
2 AB22 AB15 2 1 F15 2
NC4 PCICLK
ah PCLK_NB 11
+3VS
2 1
R109
F11 BISTIN
DFTIN VCCPLL1
B3
2
A5 PLLVDD
VT8606 R210 1K A2 VCCPLL2
11 14MCRT XTALI
A3 A4
47 XTALO GNDPLL1 B5
GNDPLL2
VT8606
11
C255
.R
15PF L20
1 2 T=40iml
2
+2.5VS +DACVDD
L19 CHB2012U121_0805
+2.5VS 1 2 T=40iml
PLLVDD
1
CHB2012U121_0805 C155 C146 C174
.1UF 1000PF
1
C123 C124 C114 C125 10UF_1206
w
RP63 .1UF 1000PF
2
REQ#3 6 5 .1UF 10UF_1206
+3VS
GNT#0 7 4 GNT#2
2
REQ#0 8 3 GNT#3
REQ#1 9 2 GNT#1
w
10 1 REQ#2 L35
+3VS
1 2 T=40iml
+3VS LVDD
10P8R-10K L28 CHB2012U121_0805
1 2 T=20iml
+2.5VS +LAVDD
1
CHB2012U121_0805 C234 C233
w
.1UF 10UF_1206
1
C219 C227
PCI REQ ASSIGMENT .1UF 10UF_1206
2
1 1
+3VS
REQ#0 MiniPCI(Compal)
2
+3VS
REQ#1 MINI PCI
RP29
REQ#4 1
R212
2
10K
REQ#2 1394 SUS_STAT#
STANDBY
1
2
8
7
REQ#3 PCMCIA CONTROLLER AGP_BUSY# 3 6 T H IS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL Title

GNT#4 1 2 SUSSTAT# 4 5 E L ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
R211 10K REQ#4 NO USED T H IS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
8P4R_4.7K O F R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER Size Document Number Rev
401202
B 2A
A B C D E
A B C D E
MD[0..63]
MD[0..63] 7,8
4 4
U14B
Y26 M23 MDD0 MDD5 8 9 MD5
om
7 RRAS#0 RAS0#/CS0# MD0
Y25 K25 MDD1 MDD0 7 10 MD0
Y24 RAS1#/CS1# MD1 L26 MDD2 MDD34 6 11 MD34 RP34
Y23 L25 MDD3 MDD6 5 12 MD6 16P8R-22
Y22 M26 MDD4 MDD38 4 13 MD38
W21 RAS4#/CS4# MD4 M24 MDD5 MDD7 3 14 MD7
RAS5#/CS5# MD5 N26 MDD6 MDD37 2 15 MD37
MD6 N24 MDD7 MDD39 1 16 MD39 MA0 R362 1 2 @10K
MD7 +3VS
V23 P23 MDD8 MDD10 8 9 MD10 MA1 R364 1 2 @10K Strap Description Setting
7,8 RCAS#0 DQM0/CAS0# MD8
W23 P25 MDD9 MDD44 7 10 MD44 MA13 R370 1 2 @10K
AF24 R23 MDD10 MDD45 6 11 MD45 MA14 R368 1 2 @10K 01=100Mhz
.c
AE23 R25 MDD11 MDD14 5 12 MD14 MA12,8 CPU Clcok Frequency 11=133Mhz
W26 P22 MDD12 MDD46 4 13 MD46 RP50 00=66Mhz
W25 T23 MDD13 MDD13 3 14 MD13 16P8R-22 MA2 R366 1 2 @10K 0=Map0
7,8 RCAS#5 DQM5/CAS5# MD13 +3VS
AD23 T25 MDD14 MDD15 2 15 MD15 MA3 R361 1 2 @10K MA2 PCI Base Address Mapping 1=Map1
AF23 T22 MDD15 MDD47 1 16 MD47 MA4 R363 1 2 @10K
7,8 RCAS#7 DQM7/CAS7# MD15 AD22 MDD16 MDD20 8 9 MD20 MA5 R365 1 2 @10K
op
0=Enable
MD16 AF22 MDD17 MDD52 7 10 MD52 MA3 Graphic IO Enable/Disable 1=Disable
U24 MD17 AB21 MDD18 MDD21 6 11 MD21
7,8 RMWEA# SWEA# MD18
U25 AE21 MDD19 MDD22 5 12 MD22 MA6 R164 1 2 10K 0=Enable
8 CKE2 SWEB#/CKE2 MD19 +3VS
U26 AB20 MDD20 MDD53 4 13 MD53 MA7 R167 1 2 @10K MA4 PCI Interrupt 1=Disable
7 CKE0 SWEC#/CKE0 MD20 AD20 MDD21 MDD58 3 14 MD58 RP54 MA8 R174 1 2 @10K
MD21 AE20 MDD22 MDD54 2 15 MD54 16P8R-22 MA12 R369 1 2 @10K 0=Normal
AA24 MD22 AC19 MDD23 MDD23 1 16 MD23 MA7 Graphic Test Mode 1=Test
3 7,8 SRASA# SRASA# MD23 3
AA25 AF19 MDD24 MDD27 8 9 MD27
pt
AA26 SRASB#/CKE5 MD24 AC18 MDD25 MDD59 7 10 MD59 MA9 R180 1 2 @10K 0=PLL
SRASC#/CKE4 MD25 +3VS
AE18 MDD26 MDD28 6 11 MD28 MA11 R367 1 2 @10K MA9 VGA Clock Select 1= External
MD26 AD17 MDD27 MDD62 5 12 MD62 RP62
U22 MD27 AF17 MDD28 MDD30 4 13 MD30 16P8R-22 0=4Level
7,8 SCASA# SCASA# MD28
V25 AB17 MDD29 MDD61 3 14 MD61 MA11 IOQ Level 1=1Level
8 CKE3 SCASB#/CKE3 MD29
V24 AE16 MDD30 MDD31 2 15 MD31 MA8 R170 1 2 10K
BSEL0 2
La
SCASC#/CKE1 MD30 AC16 MDD31 MDD63 1 16 MD63 MA12 R185 1 2 10K
MD31 BSEL1 2,11
K26 MDD32 MDD1 8 9 MD1 MA0,1,13,14 Panel Type
MA0 AA23 MD32 L23 MDD33 MDD32 7 10 MD32
MA1 MA0 MD33 MDD34 MDD33 MD33
AB23 M22 6 11
MA2 AB26 MA1 MD34 L24 MDD35 MDD35 5 12 MD35 RP38
MA3 AB25 MA2 MD35 M25 MDD36 MDD3 4 13 MD3 16P8R-22
MA4 AB24 MA3 MD36 N23 MDD37 MDD2 3 14 MD2
MA5 AC26 MA4 MD37 N25 MDD38 MDD36 2 15 MD36
MA5 MD38
ia
MA6 AC25 N22 MDD39 MDD4 1 16 MD4
MA7 AC24 MA6 MD39 P26 MDD40 MDD40 8 9 MD40
MA8 AD26 MA7 MD40 P24 MDD41 MDD9 7 10 MD9
MA9 AD25 MA8 MD41 R26 MDD42 MDD41 6 11 MD41 RP33
MA10 AE26 MA9 MD42 R24 MDD43 MDD8 5 12 MD8 16P8R-22
C187 MA11 MA10 MD43 MDD44 MDD12 MD12
AD24 R22 4 13
as
10PF MA12 AE24 MA11 MD44 T26 MDD45 MDD42 3 14 MD42
MA13 AE25 MA12 MD45 T24 MDD46 MDD11 2 15 MD11
1 2 MA14 AF25 MA13 MD46 U23 MDD47 MDD43 1 16 MD43
MA14 MD47 AE22 MDD48 MDD16 8 9 MD16
MD48 AC21 MDD49 MDD48 7 10 MD48
1 2 DCLKO1 J22 MD49 AD21 MDD50 MDD17 6 11 MD17 RP57
11 DCLKO DCLKO MD50
R134 AF21 MDD51 MDD18 5 12 MD18 16P8R-22
33 K22 MD51 AC20 MDD52 MDD49 4 13 MD49
2 2
11 D C L K W R DCLKI MD52
MD53
ah
AF20 MDD53
MDD54
MDD50
MDD19
3 14 MD50
MD19
2
AB19 2 15
R137 H21 MD54 AE19 MDD55 MDD51 1 16 MD51
VCCA VCCA MD55
@15 H22 AB18 MDD56 MDD55 8 9 MD55
VCCA MD56 AD18 MDD57 MDD24 7 10 MD24
MD57 AA19 MDD58 MDD56 6 11 MD56 RP61
MD58 AE17 MDD59 MDD25 5 12 MD25 16P8R-22
11
L21 MD59 AC17 MDD60 MDD57 4 13 MD57

GNDA MD60
.R
C189 L22 AD16 MDD61 MDD26 3 14 MD26
@47PF GNDA MD61 AF16 MDD62 MDD29 2 15 MD29
K24 MD62 AB16 MDD63 MDD60 1 16 MD60
2
PLLTEST MD63
2
VT8606
R354 MA0 8 9 MMA0
4.7K MA1 7 10 MMA1
w
MA2 6 11 MMA2 RP53

MA3 5 12 MMA3 16P8R-22
1
MA4 4 13 MMA4
MA5 3 14 MMA5
MA6 2 15 MMA6
w
MA7 1 16 MMA7
MA8 8 9 MMA8
MA9 7 10 MMA9
MA11 6 11 MMA11
L23 MA10 5 12 MMA10 RP56
w
1 2 T=40iml MA12 4 13 MMA12 16P8R-22

+2.5VS VCCA
CHB2012U121_0805 MA13 3 14 MMA13
1 MA14 2 15 MMA14 1
1
C448 1 16
C451
10UF_1210
.1UF MMA[0..14]
2
7,8 MMA[0..14]
T H IS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL Title
E L ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. SCHEMATIC, M/B LA-1281
T H IS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
O F R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER Size Document Number Rev
Custom 401202 2A
A B C D E
A B C D E
+3V
+3V
U44
BANK0 64/128MB SDRAM
14
27
43
49
U43
3
9
14
27
43
49
MMA0 23 2 MD0
3
9
VCC
VCC
VCC
A0 DQ0
VCCQ
VCCQ
VCCQ
VCCQ
MMA1 24 4 MD1 MMA0 23 2 MD32
VCC
VCC
VCC
A1 DQ1 A0 DQ0
VCCQ
VCCQ
VCCQ
VCCQ
MMA2 25 5 MD2 MMA1 24 4 MD33
MMA3 A2 DQ2 MD3 MMA2 A1 DQ1 MD34
26 7 25 5
MMA4 29 A3 DQ3 8 MD4 MMA3 26 A2 DQ2 7 MD35
1 1
33 42 32 13
A10/AP DQ10 A9 DQ9
om
MMA13 35 47 MD11 MMA10 22 45 MD42
MMA12 21 A11 DQ11 48 MD12 MMA13 35 A10/AP DQ10 47 MD43
MMA11 A12/BA1 DQ12 MD13 MMA12 A11 DQ11 MD44
20 50 21 48
A13/BA0 DQ13 51 MD14 MMA11 20 A12/BA1 DQ12 50 MD45
RCAS#0 15 DQ14 53 MD15 A13/BA0 DQ13 51 MD46
RCAS#1 39 DQML DQ15 RCAS#4 15 DQ14 53 MD47
RMWEA# 16 DQMH 37 CKE0 RCAS#5 39 DQML DQ15
WE# CKE CKE0 6 DQMH
SCASA# 17 38 CLK_SDRAM0 RMWEA# 16 37 CKE0
CAS# CLK CLK_SDRAM0 11 WE# CKE
SRASA# 18 36 MMA14 SCASA# 17 38 CLK_SDRAM0
VSSQ
VSSQ
VSSQ
VSSQ
RRAS#0 19 RAS# RVD 40 SRASA# 18 CAS# CLK 36 MMA14
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
CS# RVD RRAS#0 19 RAS# RVD 40
.c
VSS
VSS
VSS
8MX16S R286 CS# RVD
@10 8MX16S
28
41
54
12
46
52
6
+3V
28
41
54
12
46
52
6
+3V
op
C330
@15PF U42
14
27
43
49
1
3
9
MMA0 23 2 MD16 U41
14
27
43
49
VCC
VCC
VCC
A0 DQ0
VCCQ
VCCQ
VCCQ
VCCQ
MMA1 24 4 MD17
3
9
MMA2 A1 DQ1 MD18 MMA0 MD48
25 5 23 2
VCC
VCC
VCC
VCCQ
VCCQ
VCCQ
VCCQ
2 MMA3 26 A2 DQ2 7 MD19 MMA1 24 A0 DQ0 4 MD49 2
A3 DQ3 A1 DQ1
pt
MMA4 29 8 MD20 MMA2 25 5 MD50
MMA[0..14] MMA5 30 A4 DQ4 10 MD21 MMA3 26 A2 DQ2 7 MD51
6,8 MMA[0..14] MMA6 31 A5 DQ5 11 MD22 MMA4 29 A3 DQ3 8 MD52
32 13 30 10
MD[0..63] MMA8 33 A7 DQ7 42 MD24 MMA6 31 A5 DQ5 11 MD54
6,8 MD[0..63] A8 DQ8 A6 DQ6
MMA9 34 44 MD25 MMA7 32 13 MD55
A9 DQ9 A7 DQ7
La
MMA10 22 45 MD26 MMA8 33 42 MD56
RCAS#[0..7] MMA13 35 A10/AP DQ10 47 MD27 MMA9 34 A8 DQ8 44 MD57
6,8 RCAS#[0..7] MMA12 A11 DQ11 MD28 MMA10 A9 DQ9 MD58
21 48 22 45
MMA11 20 A12/BA1 DQ12 50 MD29 MMA13 35 A10/AP DQ10 47 MD59
A13/BA0 DQ13 51 MD30 MMA12 21 A11 DQ11 48 MD60
RCAS#2 15 DQ14 53 MD31 MMA11 20 A12/BA1 DQ12 50 MD61
RCAS#3 39 DQML DQ15 A13/BA0 DQ13 51 MD62
RMWEA# DQMH CKE0 RCAS#6 DQ14 MD63
16 37 15 53
6,8 RMWEA# WE# CKE DQML DQ15
ia
SCASA# 17 38 CLK_SDRAM0 RCAS#7 39
6,8 SCASA# CAS# CLK DQMH
SRASA# 18 36 MMA14 RMWEA# 16 37 CKE0
VSSQ
VSSQ
VSSQ
VSSQ
6,8 SRASA# RRAS#0 19 RAS# RVD 40 SCASA# 17 WE# CKE 38 CLK_SDRAM0
VSS
VSS
VSS
6 RRAS#0 CS# RVD SRASA# 18 CAS# CLK 36 MMA14
RAS# RVD
VSSQ
VSSQ
VSSQ
VSSQ
8MX16S RRAS#0 19 40
VSS
VSS
VSS
CS# RVD
28
41
54
12
46
52
6
as
8MX16S
28
41
54
12
46
52
6
3
ah 3
.R
+3V +3V +3V

w
C332 C368 C344 C331 C351 C389 C339 C335 C365 C362 C338 C485
.1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF
w
+3V +3V +3V

w
4 4
C352 C393 C364 C336 C367 C363 C329 C350 C392 C343 C482 C384
1000PF 1000PF 1000PF 1000PF 1000PF 1000PF 1000PF 1000PF 1000PF 1000PF 1000PF 1000PF

Title
T H I S S H E E T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND SCHEMATIC, M/B LA-1281
B 2A
401202
A B C D E
A B C D E
SO-DIM 144 PINS

RAM MODULE CONN. BANK2/3
MMA[0..14]
6,7 MMA[0..14]
1 MD[0..63] 1
6,7 MD[0..63]
RCAS#[0..7] +3V +3V

6,7 RCAS#[0..7]
om
RRAS#[2..3]
6 RRAS#[2..3]
JP20
1 2
MD0 3 VSS VSS 4 MD8
MD1 5 DQ0 DQ32 6 MD9
MD2 7 DQ1 DQ33 8 MD10
MD3 DQ2 DQ34 MD11
9 10
11 DQ3 DQ35 12
MD4 13 VCC VCC 14 MD12
MD5 15 DQ4 DQ36 16 MD13
.c
MD6 17 DQ5 DQ37 18 MD14
MD7 DQ6 DQ38 MD15
19 20
21 DQ7 DQ39 22
RCAS#0 23 VSS VSS 24 RCAS#1
RCAS#4 25 CE0# CE4# 26 RCAS#5
CE1# CE5#
op
27 28
MMA0 VCC VCC MMA3
29 30
MMA1 31 A0 A3 32 MMA4
MMA2 33 A1 A4 34 MMA5
35 A2 A5 36
MD32 37 VSS VSS 38 MD40
MD33 DQ8 DQ40 MD41
39 40
2 MD34 41 DQ9 DQ41 42 MD42 2
DQ10 DQ42
pt
MD35 43 44 MD43
45 DQ11 DQ43 46
MD37 DQ12 DQ44 MD45
49 50
MD38 51 DQ13 DQ45 52 MD46
MD39 53 DQ14 DQ46 54 MD47
DQ15 DQ47
La
55 56
57 VSS VSS 58
C298 R260 RESVD/DQ64 RESVD/DQ68
59 60
RESVD/DQ65 RESVD/DQ69
22PF 33
61 62 CKE2 +3V
11 CLK_SDRAM2 RFU/CLK0 RFU/CKE0 CKE2 6
63 64
VCC VCC
65 66
6,7 SRASA# RFU RFU SCASA# 6,7
ia
RMWEA# 67 68 CKE3
6,7 RMWEA# WE# RFU/CKE1 CKE3 6
RRAS#2 69 70 MMA14
RRAS#3 71 RE0# RFU 72 + C473 C483 C474 C484 C476 C477 C475 C488
73 RE1# RFU 74 10UF_1206 .1UF .1UF .1UF .1UF .01UF .01UF .01UF
OE#/RESVD RFU/CLK1 CLK_SDRAM3 11
75 76 6.3V
77 VSS VSS 78
as
79 RESVD/DQ66 RESVD/DQ70 80
81 RESVD/DQ67 RESVD/DQ71 82 R277
MD16 83 VCC VCC 84 MD24 33
MD17 DQ16 DQ48 MD25
85 86
MD18 87 DQ17 DQ49 88 MD26
MD19 89 DQ18 DQ50 90 MD27
91 DQ19 DQ51 92 +3V
MD20 93 VSS VSS 94 MD28 C319
3 MD21
MD22
95
97
DQ20
DQ21
ah DQ52
DQ53
96
98
MD29
MD30
22PF 3
MD23 99 DQ22 DQ54 100 MD31

101 DQ23 DQ55 102 + C472 C478 C479 C489 C358 C487
MMA6 103 VCC VCC 104 MMA7 10UF_1206 .01UF 1000PF 1000PF 1000PF 1000PF
MMA8 A6 A7 MMA11 6.3V
105 106
107 A8 A11/BA0 108
MMA9 109 VSS VSS 110 MMA12
.R
MMA10 111 A9 A12/BA1 112 MMA13
113 A10 A13/A11 114
RCAS#2 VCC VCC RCAS#3
115 116
RCAS#6 117 CE2#/RESVD CE6#/RESVD 118 RCAS#7
119 CE3#/RESVD CE7#/RESVD 120
MD48 121 VSS VSS 122 MD56
MD49 123 DQ24 DQ56 124 MD57
DQ25 DQ57
w
+3V MD50 125 126 MD58 +3V

MD51 127 DQ26 DQ58 128 MD59
129 DQ27 DQ59 130
R372 MD53 133 DQ28 DQ60 134 MD61 R278
10K MD54 DQ29 DQ61 MD62
135 136
w
10K
MD55 137 DQ30 DQ62 138 MD63
139 DQ31 DQ63 140
141 VSS VSS 142
9,11 SMBDATA SDA SCL SMBCLK 9,11
143 144
VCC VCC
w
SO-DIMM144
4 4
DIMM1
Title
B 2A
401202
A B C D E
1 2 3 4 5 6 7 8
17 PDD[0..15] PDD[0..15]
VT82C686A-A
U30A 2 1 1 2
R306 @33
PDD0 P16 W18 26 C369 @22PF
PDD0 SDD0/BITCLK IAC_BITCLK
PDD1 P18 V17
PDD1 SDD1/SDIN IAC_SDATAI 26
PDD2 P20 Y17 2 1
PDD2 SDD2
PDD3
PDD4
PDD5
R17
R19
T16
PDD3
PDD4
SDD3/SYNC
SDD4/SDOUT
V16
Y16
U15
2
R312
2
0
1 R300
2
1 R295
10K
0
1 IAC_SYNC
IAC_SDATAO
26
26
Signals Pullup
PDD5 SDD5/-ACRST IAC_RST# 26
PDD6 T18 W15 R310 22
PDD7 T20 PDD6 SDD6/JBY U14
PDD8 T19 PDD7 SDD7/JBX Y15
A A
PDD9 T17 PDD8 SDD8/JAY V15 +3V
PDD10 R20 PDD9 SDD9/JAX T15 RP92 RP86
PDD11 PDD10 SDD10/JAB2 PBTN#
R18 W16 1 10 1 8
PDD11 SDD11/JAB1 +3VS
PDD12 R16 U16 2 9 ATF_INT# 2 7
PDD13 P19 PDD12 SDD12/JBB2 W17 3 8 PX4_RI# 3 6
PDD13 SDD13/JBB1
om
PDD14 P17 Y18 4 7 IRQ8# 4 5
PDD15 N20 PDD14 SDD14/MSO Y19 2 1 5 6
PDD15 SDD15/MSI +3VS +3VS
R313 22 8P4R_10K
PDA0 M17 U19 SDA0 10P8R-10K
17 PDA0 PDA0 SDA0 SDA0 17
PDA1 M19 V18 SDA1
PDA2 M18 U20 SDA2 D29 1 8
PDCS1# L20 U17 SDCS1# PBTN# 2 1 LID# 2 7
17 PDCS1# PDCS1 SDCS1 SDCS1# 17 ON/OFF 20,26
PDCS3# M16 U18 SDCS3# SCI# 3 6
17 PDCS3# PDCS3 SDCS3 SDCS3# 17
PDDACK# M20 V19 SDDACK# VLB# 4 5
17 PDDACK# PDDACK SDDACK SDDACK# 17
PDDREQ N19 Y20 SDDREQ @RB751V
17 PDDREQ PDDREQ SDDREQ SDDREQ 18
PDIOR# N17 W19 SDIOR# RP82 8P4R_10K
.c
17 PDIOR# PDIOR SDIOR SDIOR# 17
PDIOW# N18 W20 SDIOW# D30 SUSCLK 2 1
17 PDIOW# PDIOW SDIOW SDIOW# 17
PIORDY N16 V20 2 1 R272 10K
17 PDIORDY PDRDY SDRDY SDIORDY 18 PBTN_OUT# 21
+3V
AD0 L17 Y7 RB751V
AD0 A20M SB_A20M# 32
op
AD1 L16 V8 1
AD1 CPURST CPURST# 2,4
AD2 K20 V7 FERR# R247 0
AD2 FERR FERR# 2
AD[0..31] AD3 K19 Y8 CLKRUN# 2 1
5,15,23,28 AD[0..31] SB_IGNNE# 23
AD3 IGNNE +3VS
AD4 K18 T6 1 R288 10K SUSA# 2 1
AD4 INIT CPUINIT# 2
AD5 K17 W8 R248 0 R268 10K
AD6 K16 AD5 INTR U7 SB_INTR 3 2 1
AD7 AD6 NMI SB_NMI 3 R289 @1K
J20 T7 2 1
AD7 SLP/GPO7 SLP# 2
B AD8 J18 U6 R8 0 2 1 B
AD8 SMI SMI# 2 +3VS
pt
AD9 J17 W7 R267 10K
AD10 J16 AD9 STPCLK STPCLK# 2
AD11 H20 AD10 U9 SB_SMC
AD11 SMBCLK SMBCLK 8,11
AD12 H19 T9 SB_SMD SPKR 2 1
AD12 SMBDATA SMBDATA 8,11
AD13 H18 R264 @10K
AD14 H17 AD13 W6
AD14 PWRGD SPWROFF# 5,20,27
La
AD15 H16 Y12
AD16 F16 AD15 CPUSTP/GPO4 V12 CPU_STP# 11
AD17 AD16 PCISTP/GPO5 CLKRUN# PCI_STP# 11 NOTE:DISABLE INTERNAL
E20 W12
AD17 CLKRUN CLKRUN# 5,12,15,23,28 AUDIO CTRL
AD18 E19 Y11 PBTN#
AD19 E18 AD18 PWRBTN V6 RSMRST#
AD20 E17 AD19 RSMRST RSMRST# 27
AD21 D20 AD20 T10 SUSCLK 2 1 +3VS
AD22 AD21 SUSCLK R275 0 RTCCLK 15,16
D19
AD22
ia
AD23 D18 V11 PX4_RI#
AD23 RING/GPI7 PX4_RI# 21
AD24 B20 V5 SPKR
1
AD24 SPKR SPKR 26
AD25 A20 R265
AD26 A19 AD25
AD27 AD26 ACIN_SYS# 4.7K
B19 U8
AD28 A18 AD27 GPIOD/GPIO11
as
AD29 B18 AD28 ACIN_SYS#
AD29
1 2
AD18 2 1 IDSEL AD30 C18 Y10
AD30 EXTSMI EXTSMI# 20 D25
R315 100 AD31 A17 T11 ATF_INT# Q40
AD31 PME/GPI5/THRM ATF_INT# 20
V10 1 2 2
SUSST1/GPO6 SUS_STAT# 5 20,26,29 ACIN
5,15,23,28 C/BE#0 J19 U11 VLB# 2N7002
G20 C/BE0 BATLOW/GPI2 W11 IRQ8#
5,15,23,28 C/BE#1 C/BE1 GPI1/IRQ8 IRQ8# 20
5,15,23,28 C/BE#2 F17 T14 133M/100M# RB751V
C/BE2 GPIOA/GPIO8
3
C19 T8
C 5,15,23,28
5,12,15,23,28 FRAME#
C/BE#3
FRAME# F18
C/BE3
ahGPO0
LID/APICREQ/GPI3
U10
W10
LID#
SCI# LID#
SCI#
21
20 2
D28
1 LLBATT# 21
C
IRDY# F19 FRAME SMBALT/GPI6 V9 SUSA#

5,12,15,23,28 IRDY# IRDY SUSA/APICACK/GPO1 SUSA# 11,20
5,12,15,23,28 TRDY# TRDY# F20 W9 SUSB#
STOP# G17 TRDY SUSB/APICCS/GPO2 Y9 SUSC# SUSB# 20 RB751V
5,12,15,23,28 STOP# STOP SUSC SUSC# 20
DEVSEL# G16
5,12,15,23,28 DEVSEL# DEVSEL
SERR# G18
5,12,15,23,28 SERR# SERR
PAR G19 F15
5,12,15,23,28 PAR
.R
PCLK_SB IDSEL C20 PAR GND G15 +3VS
PCIREQ# L18 IDSEL GND L15
5,12 PCIREQ# REQ GND
PCIGNT# L19 P15 1 2
1
5,12 PCIGNT# GNT GND +3VS

PCI_RST# B16 R15 R319 10K
R292 PCIRST GND
5
@22 A16 RP83 1
5,12,15 PIRQA# PINTA 2,27,32 VR_POK
D17 Y14 8 1 4 PCIRST# 1 2 133M/100M#
12,15,23 PIRQB# PINTB VSENS4(12V) PCIRST# 5,13,15,16,19,23,28
w
C17 7 2 PCI_RST# 2 R318 @10K

12,28 PIRQC#
2
B17 PINTC W14 6 3

12,23 PIRQD# PINTD VSENS3(5V)
C353 5 4 U45
@10PF PCLK_SB E16 U13 @7SH08FU Populate R318 and not
11 PCLK_SB PCICLK VSENS1(2.0V)
3
8P4R_10K populate R319 When
RTCX1 Y5 V13
w
100MHz SDRAM on board

RTCX1 VSENS2(2.2V)
As close
X3 as 686A Populate R319 and not
RTCX1 RTCX2 RTCX2 W5 PCI_RST# 2 1 PCIRST# populate R318 When
RTCX2 W13 2 1 R394 0
32.768KHZ TSEN1 R290 100K
133MHz SDRAM on board
R9
w
1 2 R10 VCCSUS T13

VCCSUS VREF +5VS
R386 +3V
@20M Y6 Y13 1 2
1
D +RTCVCC VBAT TSEN2 D

C288 C294 C359 .1UF THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
22PF 22PF C311 H15 T12 2 1 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
+3VS VCC FAN1 FAN_SENSE 20,22
1 2 J15 R299 0 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
2
K15 VCC U12 2 1 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.
VCC FAN2/GPIOB/GPIO9 +3VS
.01UF M15 R385
VCC +3VS 1 0 K
N15
VCC Compal Electronics, Inc.
R7 R12
1
R8 VCC VCCHWM C383

+C376 Title
1
R11 VCC
1
C263 C278 C277 C279 C360

R14 VCC R13 .1UF 10UF_1210 SCHEMATIC, M/B LA-1281
4.7U_1206 .1UF .1UF .1UF .1UF VCC GNDHWM Size Document Number Rev
2
VT82C686-B B 2A
401202
2

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
U30B The components most place cloely 686B

SDD0 W1 B15 LPD0
SDD1 V2 SA0 PRD0 D15 LPD1
SDD2 V1 SA1 PRD1 A14 LPD2
SDD3 U3 SA2 PRD2 B14 LPD3
SDD[0..15] SDD4 SA3 PRD3 LPD4 RP76
17 SDD[0..15] U2 C14
SDD5 U1 SA4 PRD4 D14 LPD5 USBP1+ 1 8
SA5 PRD5 USB1_D+ 25
LPD[0..7] SDD6 T4 E14 LPD6 USBP1- 2 7
24 LPD[0..7] SA6 PRD6 USB1_D- 25
SDD7 T3 A13 LPD7 USBP0+ 3 6
SA7 PRD7 USB0_D+ 25
SD[0..15] SDD8 T2 USBP0- 4 5
12,20 SD[0..15] SA8 USB0_D- 25
SDD9 T1 B13
SA9 ACK LPTACK# 24
SA[0..19] SDD10 R5 C13 8P4R-27
4
3
2
1
12,20 SA[0..19] SA10 BUSY LPTBUSY 24
SDD11 R4 D13
8
7
6
5
A LPTPE 24 A
SDD12 R3 SA11 PE E13 +5V CP7 RP77
SA12 SLCT LPTSLCT 24
SDD13 R2 A15 8P4C-47PF 8P4R-15K
SA13 ERROR LPTERR# 24
SDD14 R1 C15 JP1
SA14 PINIT INIT# 24
SDD15 P5 C16 LPTAFD# 24
5
6
7
8
SA16 P4 SA15 AUTOFD E15 1
SA16 SLCTIN SLCTIN# 24 1
1
2
3
4
om
SA17 P3 D16 2
SA17 STROBE LPTSTB# 24 2
SA18 K2 1 2 RXD1 3
SA19 SA18 TXD1 R285 1 0 K TXD1 3
K1 A11 4
J5 SA19 TXD1 D11 DTR#1 DSR#1 5 4
J4 LA20 DTR1 B11 RTS#1 RP84 RTS#1 6 5
J3 LA21 RTS1 C11 CTS#1 1 8 CTS#1 7 6
J2 LA22 CTS1 C12 DSR#1 DCD#1 2 7 +3VS DTR#1 8 7
LA23 DSR1 DCD#1 DSR#1 RI#1 8
A12 3 6 9
SD0 Y1 DCD1 E11 RI#1 4 5 DCD#1 10 9
SD1 Y2 SD0 RI1 B12 RXD1 10
SD2 W2 SD1 RXD1 8P4R_10K @96212-1011S
.c
SD3 Y3 SD2 D10
SD4 SD3 TXD2
W3 B9
SD5 V3 SD4 DTR2 E10 RP81
SD6 Y4 SD5 RTS2 A9 CTS2 RI2 1 8
SD7 W4 SD6 CTS2 C10 DSR2 CTS2 2 7 +3VS
SD7 DSR2
op
SD8 L5 A10 DCD2 DSR2 3 6 RP73
SD9 SD8 DCD2 RI2 DCD2 SDD0 SA0
M2 C9 4 5 4 5
SD10 M4 SD9 RI2 B10 1 2 SDD1 3 6 SA1
SD11 N1 SD10 RXD2 R284 1 0 K 8P4R_10K SDD2 2 7 SA2
SD12 N3 SD11 F9 VCCUSB SDD3 1 8 SA3
SD13 N5 SD12 VCCUSB
SD14 SD13 8P4R_0
P1
B SD15 P2 SD14 F8 GNDUSB RP71 B
SD15 GNDUSB
pt
SDD4 4 5 SA4
L2 C3 48M SDD5 3 6 SA5
DACK0/IDEIRQA/GPO16 USBCLK 48M 11
E1 SDD6 2 7 SA6
DACK1/IDEIRQB/GPO17 USBP0+ SDD7 SA7
D2 A3 1 8
1
L4 DACK3/AC97IRQ/GPO18 USBP0+ B3 USBP0- R263
12,15 SIRQ DACK5/MC97IRQ/GPO19/SERIRQ USBP0-
M3 C4 USBP1+ @33 8P4R_0
19 PHDRST# DACK6/USBIRQA/GPO20 USBP1+
La
N2 D4 USBP1-
191 SHDRST# DACK7/USBIRQB/GPO21 USBP1-
2 H3
+3VS DRQ2/OC1/SERIRQ/GPIOE OVCUR#1 25
R383 10K G5 OVCUR#0 25
12
1 2 64M#/128M L3 DACK2/OC0/GPIOF V14 C303 RP78
R384 @10K E2 DRQ0/GPI16 CHAS/GPIOC/GPIO10 SDD9 8 1 SA9
Populate R384 and not D3 DRQ1/GPI17 A4 RP80 1 8 @10PF SDD14 7 2 SA14
14 PID0 M1 DRQ3/GPI18 USBP2+ B4 2 7 SDD8 6 3 SA8
populate R383 When 64M 14 PID1 DRQ5/GPI19 USBP2-
2
M5 B5 3 6 SDD13 5 4 SA13
SDRAM on board 14 PID2 DRQ6/GPI20 USBP3+
ia
N4 E6 4 5
14 PID3 DRQ7/GPI21(CF/CG) USBP3-
Populate R383 and not 8P4R_15K 8P4R_0
B2 E5
populate R384 When 20 AEN AEN KBCK/KA20G GATEA20 20
H2 A5
128M SDRAM on board BALE KBDT/KBRC RC# 20 RP79
R253 1 2 1K F2 D5 IRQ1
+3VS SBHE MSCK/IRQ1 IRQ1 12,20 BIOSCS# 20
R254 1 2 1K E3 C5 IRQ12 SDD12 8 1 SA12
+3VS IRQ12 12,20
as
1 8 PIOR# D1 REFRESH MSDT/IRQ12 SDD11 7 2 SA11
12,20 IOR# IOR
2 7 PIOW# C2 C1 BIOSCS# 1 2 SDD10 6 3 SA10
12,20 IOW# IOW ROMCS/KBCS +3VS
MEMR# 3 6 PMEMR# U4 R255 4.7K SDD15 5 4 SA15
12,20 MEMR# MEMR
MEMW# 4 5 PMEMW# V4 D9
12,20 MEMW# MEMW DRVDEN0 3MODE# 19
A1 D6 PH: SOCKET 370; SLOT 1,SOCKET-A 8P4R_0
RP72 8P4R_22 B1 SMEMR DRVDEN1
SMEMW PL: SOCKET7
R240 1 2 1 K F3 D7
+3VS IOCS16 INDEX INDEX# 19
R251 1 2 4.7K F1 E9
C 14MOSC
12,20
+3VS
IOCHRDY IOCHK#
A2
F4
MEMCS16
IOCHRDY
ah MTR0
DS1
A8
B8
MTR0#
DRV0#
19
19,21
C
TC H1 IOCHK/GPI0 DS0 C8
1
R252 J1 TC MTR1 D8
RSTDRV DIR FDDIR# 19
@10 E8
STEP STEP# 19
14MOSC E4 A7
11 14MOSC OSC WDATA WDATA# 19
H5 B7
BCLK WGATE WGATE# 19
E7 TRACK0# 19
.R
TRAK00
12
C265 D12 A6
IRRX/GPO15 WRTPRT WP# 19
E12 B6
IRTX/GPO14 RDATA RDATA# 19
@10PF C7
HDSEL HDSEL# 19
IRQ3 G4 C6
12 IRQ3 DSKCHG# 19
2
IRQ4 G3 IRQ3 DSKCHG

12 IRQ4 IRQ4
IRQ5 G2 F6 +3VS
12 IRQ5 IRQ5 GND L38 0_0805
IRQ6 G1 F11
12 IRQ6 IRQ6/GPI4/SLPBTN# GND
w
IRQ7 F5 G6 VCCUSB 1 2
12 IRQ7 IRQ7 GND
IRQ9 H4 J9
1
12 IRQ9 IRQ9 GND
IRQ10 K3 J10 C333 C325
1
12 IRQ10 IRQ10 GND +
IRQ11 K4 J11 10UF_1206
12 IRQ11 IRQ11 GND
IRQ14 L1 J12 .1UF
12,17 IRQ14 IRQ14 GND
IRQ15 K5 K9
w
12,18 IRQ15
2
2
IRQ15 GND K10 GNDUSB 1 2
T5 GND K11 L37
21 FLASH# XDIR/GPO12 GND
U5 K12 0_0805
SOE/GPO13 GND L6
R250 4.7K GND
F7 L9
w
+3VS VCC GND

1 2 TC F10 L10
+3VS VCC GND
R239 4.7K F12 L11
1 2 IOCHK# F13 VCC GND L12
D +3VS VCC GND D
F14 M9
VCC GND
H6 M10
J6 VCC GND M11
K6 VCC GND M12
M6 VCC GND P6
VCC GND
C374 N6 R6 Compal Electronics, Inc.
1
C379 C366 C375 C373 VCC GND

4.7UF_1206 .1UF .1UF .1UF .1UF VT82C686-B Title
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
B 2A
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
401202
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C. Date: 星期三, 九月 04, 2002 Sheet 10 of 34
1 2 3 4 5 6 7 8
CLOCK GENERATOR & BUFFER
L32 L30
1 2 1 2
+3V CLK_CPUIO
CHB2012U170 @CHB2012U170 +3VBUFF
L34 L31 L36
+3VS 1 2 W=40MILS +3VCLK_CORE 1 2 W=30MILS +3VBUFF 1 2 W=30MILS CLK_CPUIO
+3VS +2.5V_CLK
CHB2012U170 CHB2012U170 CHB2012U170
1
C466 C469 C463 C464 C231 C235 C242
1
C462 C225 C236 C283 C270 C276 C262
4.7UF_10V_0805 C264 1000PF .1UF .1UF .1UF 4.7UF_10V_0805 .1UF .01UF 1000PF 1000PF 4.7UF_10V_0805
1000PF .01UF 1000PF .1UF
om
10V 10V 10V
2
U22
CLK_CPUIO 47 25 FS1
VDDL 24/48MHZ/FS1
+3VCLK_CORE 19 26 FS0 1 2 R187 22
VDDCOR 48MHZ/FS0 48M 10
+3VBUFF 36
+3VBUFF 30 VDDSDR 46 1 2 R387 22
.c
+3VCLK_CORE 27 VDDSDR CPUCLKF 45 1 2 R225 22
VDD48 CPUCLK0 HCLK_CPU 2
+3VCLK_CORE 14 43 1 2 R219 @22
VDDPCI CPUCLK1 HCLK_NB 4
+3VCLK_CORE 6 42
Y3 +3VCLK_CORE 1 VDDPCI CPUCLK2
1 2 VDDREF 7 MODE 1 2 R213 22
PCIF PCLK_SB 9
XIN 4
op
14.318MHZ XIN 8
1 2 XOUT 5 PCI0/FS3 10 1 2 R377 33
XOUT PCI1 APICCLK 2
R257 @2M 11 EARLY 1 2 R216 33
PCI2 PCLK_PCM 15
1
DCLKO 15 12 1 2 R206 33
6 DCLKO BUFIN PCI3 PCLK_MINI 23
DCLKO C281 C280 13 1 2 R202 33
PCI4 PCLK_1394 28
10PF 10PF 20 17
9 PCI_STP# PCI_STP# PCI5 R190 33
1
18 1 2
2
PCI6 PCLK_NB 5
R196 SUS_A# 21
pt
PWR_DWN# 39 1 2 R214 22
@22 SDRAMF DCLKWR 6
1 2 CPUSTP# 41 38 1 2 R204 10
9 CPU_STP# CLK_STP# SDRAM0 CLK_SDRAM0 7
R388 0 37
1 2 23 SDRAM1 35 1 2 R198 10
2
+3VS SDATA SDRAM2 CLK_SDRAM2 8

D45 R389 @10K 24 34 1 2 R197 10
SCLK SDRAM3 CLK_SDRAM3 8
C237 32
La
1 2 CPUSTP# 3 SDRAM4 31
@10PF +12VS 9 VSS SDRAM5 29
VSS SDRAM6
16 28
@RB751V 22 VSS SDRAM7 1 2
VSS 14.3M_TV 13
2
33 2 SPECTRUM R237 1 @10 2

VSS REF0 14MCRT 5
D20 R169 40 48 FS2 R238 1 10 2
VSS REF1/FS2 14MOSC 10
44 R243 10
10K VSS
1 2 SUS_A#
9,20 SUSA#
ia
ICS9248-195
2
1
@RB751V 1 2 C254 C260 C252

+3VS
2
R378 R406
1 2 R184 @10PF @10PF @15PF 150 49.9_1%
CPU_IO
R407 10K 10K 3 1
as
SMBCLK 8,9
2
B
11
2
3 1 2
E
3,32 VTTPWRGD Q27 TUAL5 2,3,32

3 1
SMBDATA 8,9
Q61 Q59
FMMT3904 2N7002 FDV301N
3
1
Q28
2
2N7002
ah Q60
TUAL5# 3
R176 R179 FDV301N
3
1 2 FS0 1 2 +3VS
2,6 BSEL1
R220 R227
@10K @10K 0 NO 1 2 EARLY 1 2
1 EARLY CLOCK
R186 R177 10K @10K
.R
1 2 FS1 1 2
R218
10K @10K 0 3.3V CPU MODE 1 2
CPU / PCI CLOCK

1 2.5V CPU
R246 10K
FS2 1 2
FS3 FS2 FS1 FS0 CPU / PCI R226
10K SPECTRUM 1 2
w
0 NO
1 SPREAD SPECTRUM
1 0 1 1 133 / 33 MHz 10K
1 0 0 0 100 / 33 MHz
w
1 1 1 0 66 / 33 MHz
w

Title

401202
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 2A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONIC S, INC. Date: 星期三, 九月 04, 2002 Sheet 11 of 34
A B C D E
ISA BUS Pullup PCI BUS Pullup

SD[0..15]
10,20 SD[0..15]
SA[0..19]
10,20 SA[0..19]
1 +3VS 1
1 2 IOCHRDY 10,20
R256 1K +3VS
om
RP87
1 8
PIRQC# 9,28
2 7 PIRQD# 9,23
3 6 PAR 5,9,15,23,28
4 5
+5VS PLOCK# 5,15 H4 H26 H32 H23 H13 H5
8P4R-10K S3.14X0.66mm S3.14X0.66mm S3.14X0.66mm S3.14X0.66mm S3.14X0.66mm S3.14X0.66mm
1 2 +3VS
IRQ14 10,17
R233 10K
RP90
R234 10K IRQ15 10,18 8 1
.c
DEVSEL# 5,9,15,23,28
1
7 2
FRAME# 5,9,15,23,28
6 3
+3VS IRDY# 5,9,15,23,28
5 4 H30 H31
TRDY# 5,9,15,23,28 H14 H15 H16 H17 H12 H9 S4X2.8mm S4X2.8mm
RP67 8P4R-10K C276PAD C276PAD C276PAD C276PAD C236PAD C236PAD
op
1 8
IRQ11 10 +3VS
2 7 IRQ12 10,20
3 6 R241
IRQ5 10
1
4 5 2 1
SIRQ 10,15
1
8P4R-10K 10K
2 RP69 H36 H19 H18 H21 H11 H10 H22 2
pt
1 10 +3VS S276D146X114 S4X1.5mm S4X1.5mm S6.5X3.8mm S6.5X3.8mm S6.5X3.8mm S6.5X3.8mm
2 9
10,20 IRQ1 3 8 IRQ6 10
10 IRQ3 IRQ7 10 RP91
4 7
10 IRQ4 IRQ9 10
5 6 1 10 +3VS
IRQ10 10 15,23,28 PERR#
1
+3VS 2 9
5,9 PCIGNT# PIRQA# 5,9,15
La
10P8R-10K 3 8
5,9,15,23,28 STOP# 4 7 PIRQB# 9,15,23
5,9,15,23,28 SERR# PCIREQ# 5,9 H27 H34 H38 H6 H24 H25 H20 H7 H8
5 6
+3VS CLKRUN# 5,9,15,23,28
RP74 S7X3.0mm S7X3.0mm C177D98 S7X3.0mm S7X3.0mm S7X3.0mm S7X3.0mm S7X3.0mm S7X3.0mm
SD3 1 10 +3VS
SD4 2 9 SD0 10P8R-10K
SD6 3 8 SD2
SD7 4 7 SD1
1
ia
+3VS 5 6 SD5
10P8R-4.7K
EP1 EP4 EP7 EP9 EP8 EP6 EP10 EP11

RP60 EMIPAD EMIPAD EMIPAD EMIPAD EMIPAD EMIPAD EMIPAD EMIPAD
as
SD15 6 5 +3VS
SD14 7 4 SD11 CF2 CF5 CF10 CF13
SD13 8 3 SD10 SMD40M80 SMD40M80 SMD40M80 SMD40M80
SD12 9 2 SD9
1
1
+3VS 10 1 SD8
10P8R-4.7K
1
EP2 EP5 EP3 EP12 EP13 EP14 EP15 EP16 EP17
3
RP66
+3VS
ah EMIPAD EMIPAD EMIPAD EMIPAD EMIPAD EMIPAD EMIPAD EMIPAD EMIPAD CF7
SMD40M80
CF9
SMD40M80
CF12
SMD40M80
CF14
SMD40M80
3
SA18 6 5
SA17 7 4
SA16 8 3 MEMW# 10,20
MEMR# 10,20
1
1
SA19 9 2 IOR# 10,20
1
+3VS 10 1 IOW# 10,20 CF8 CF11 CF3 CF6
.R
10P8R-4.7K SMD40M80 SMD40M80 SMD40M80 SMD40M80
H37 H28 H35 H33
2 2 2 2
RP75 2 3 2 3 2 3 2 3
SA13 1 10 3 4 3 4 3 4 3 4
+3VS 4 4 4 4
1
SA9 2 9 SA15 5 5 5 5
SA10 3 8 SA12 5 6 5 6 5 6 5 6 CF1 CF4
6 6 6 6
w
SA8 4 7 SA14 7 7 7 7 SMD40M80 SMD40M80

5 6 SA11 7 8 7 8 7 8 7 8
+3VS 8 8 8 8
9 9 9 9
9 9 9 9
10P8R-4.7K
SCREW-GND118 SCREW-GND118 SCREW-GND118 SCREW-GND118
1
+3VS
w
RP65
SA1 1 10 H1 H3 H2 H29 FD3 FD2 FD4 FD6 FD1 FD5
SA3 2 9 SA5 2 2 2 2 FIDUCAL FIDUCAL FIDUCAL FIDUCAL FIDUCAL FIDUCAL
SA2 3 8 SA7 2 3 2 3 2 3 2 3
SA0 SA6 3 3 3 3
4 7 4 4 4 4
w
5 6 SA4 4 5 4 5 4 5 4 5
+3VS 5 5 5 5
6 6 6 6
6 6 6 6
1
4 7 7 7 7 4
10P8R-4.7K 7 8 7 8 7 8 7 8
8 8 8 8
9 9 9 9
9 9 9 9
SCREW-GND150 SCREW-GND118 SCREW-GND169 SCREW-GND169

Title
B 2A
401202
A B C D E
5 4 3 2 1
L11
1 2 1 2
+3VS DVDD +5VS TVDD
D CHB1608B121 CHB1608B121 D
L10
1
C64 C50 C49
1
C48 C52 C51
.1UF .1UF 4.7UF_10V_0805
2
.1UF .1UF 4.7UF_10V_0805
om
TV-OUT Encode TV-GNDA
+3VS
TVDD DVDD
.c
2
2
R49 R50 D10 D8 D3
1
2.2K
2.2K
31
25
30
16
38
U4
5 DVDD
DVDD
DVDD
DVDD
VDD
AVDD
26 20 COMPS
5 SMDTV SD CVBS/B
op
1
1
27 @DAN217 @DAN217 @DAN217
5 SMCTV SC LUMA
22
3
TVD0 42 Y/R
5 TVD0 D0 +5VS
TVD1 43 21 CRMA
5 TVD1 TVD2 44 D1 C/G
5 TVD2 TVD3 1 D2 17 1 2 1 2
5 TVD3 TVD4 D3 CSYNC R48 @75_1%
2 35
5 TVD4 D4 DS/BCD
C TVD5 3 37 1 2 C20 47PF C
5 TVD5 D5 P-OUT TVCLK 5 JP8
pt
TVD6 4 R104 47 L7 CHB1608G301
5 TVD6 TVD7 6 D6 33 LUMA 1 2
5 TVD7 TVD8 7 D7 XTALO 1 2 1
5 TVD8 TVD9 D8/SUSP 14.3M_TVOUT 14.318MHZ C37 47PF 2
9 32
5 TVD9 D9 XTALI 3
TVD10 10 CRMA 1 2
5 TVD10 D10 Y2 4
TVD11 11 39 L5 CHB1608G301
5 TVD11 D11 XCLK TVCLKR 5 5
La
12 40 2 1
D12 HS TVHS 5 6
13 41 COMPS 1 2
D13 VS TVVS 5 7
14 L6 CHB1608G301
1
15 D14 24 C121 C122 1 2
D15 IRSET S CONN._SUYIN
1 2 29
1
DGND
DGND
DGND
DGND
5,9,15,16,19,23,28 PCIRST#
AGND
RESET#
GND
GND
18PF 18PF C41 47PF
2
R75 33 R59 R31 R30 R21
C35 C34 C19 C16 C18
1
C17
ia
360_1% 75_1% 75_1% 75_1%
34
23
19
18
36
28
8
150PF 150PF 150PF 270PF 270PF 270PF
2
CH7005
2
TV-GNDA
as
14.3M_TVOUT 1 2 14.3M_TV 11
R82 @0
C78
L17 CHB1608B121 1 2 1 2
1 2
R81 @10 @15PF
B
1
L16
ah
2
B
CHB1608B121
TV-GNDA
.R
w
w
w
A A

Title
B 2A
401202
5 4 3 2 1
A B C D E
+5VALW
C27 +5VALW
4.7UF_1210 JP2 RP16 RP101
1
C26 1 2 TXCLK0+ 5 4 L_LCD7 TZCLK0+ 8 1 L_LCD15
1 2 5 TXCLKO+ 5 TZCLKO+
TXCLK0- 6 3 L_LCD6 TZCLK0- 7 2 L_LCD14
@4.7UF_1210 3 4 5 TXCLKO- 5 TZCLKO-
TXOUT2+ 7 2 L_LCD5 TZOUT2+ 6 3 L_LCD13
2 5 6 5 TXOUT2+ 5 TZOUT2+
DISPOFF# PID[0..3] TXOUT2- 8 1 L_LCD4 TZOUT2- 5 4 L_LCD12
20 INVT_PWM 7 8 PID[0..3] 10 5 TXOUT2- 5 TZOUT2-
+5VALW 9 10 LCDVDD 8P4R-0 8P4R-0
11 12 RP17 RP102
+3VS 13 14 LVDDVGA TXOUT1+ 5 4 L_LCD3 TZOUT0- 8 1 L_LCD8
15 16 5 TXOUT1+ 5 TZOUT0-
+3VS TXOUT1- 6 3 L_LCD2 TZOUT0+ 7 2 L_LCD9
17 18 5 TXOUT1- 5 TZOUT0+
1 L_LCD0 RP18 TXOUT0+ 7 2 L_LCD1 TZOUT1+ 6 3 L_LCD11 1
19 20 5 TXOUT0+ 5 TZOUT1+
L_LCD1 5 4 PID3 TXOUT0- 8 1 L_LCD0 TZOUT1- 5 4 L_LCD10
21 22 5 TXOUT0- 5 TZOUT1-
PID0 6 3 PID2
PID1 23 24 L_LCD2 PID1 8P4R-0 8P4R-0
7 2
PID2 25 26 L_LCD3 8 1 PID0
PID3 27 28
29 30
om
ENVDD L_LCD4 8P4R-10K
DISPOFF# 31 32 L_LCD5 CP3 CP18
L_LCD15 33 34 TXCLK0+ TZCLK0+
4 5 1 8
L_LCD14 35 36 L_LCD6 TXCLK0- 3 6 TZCLK0- 2 7
37 38 L_LCD7 TXOUT2+ 2 7 TZOUT2+ 3 6
L_LCD13 39 40 TXOUT2- 1 8 TZOUT2- 4 5
L_LCD12 41 42 L_LCD8
43 44 L_LCD9 @8P4C-220PF @8P4C-220PF
L_LCD11 45 46
L_LCD10 47 48 CP5 CP19
49 50 TXOUT1+ 4 5 TZOUT1- 4 5
.c
TXOUT1- 3 6 TZOUT1+ 3 6
HEADER 25X2-LCD TXOUT0+ 2 7 TZOUT0+ 2 7
TXOUT0- 1 8 TZOUT0- 1 8
@8P4C-220PF @8P4C-220PF
op
+12V
LVDDVGA
R100
100K
+ C75
2 LCDVDD 4.7UF_1206 2
pt
+5V 10V
1
2
Q9
1
R74 SI2302DS +3VS

R101 C100
3
100 R83 200K 1000PF LCDVDD
1
10K Q13
La
R76
12
R84 4.7K
Q8 2 2 22K
2N7002 C71 + C90 D11 RB717F
22K 4.7UF_1206 1 DISPOFF# C24
1
47K 20 BKOFF#
Q6 .1UF 10V 3 DISPOFF#
DTC124EK
3
DTC124EK ENVEE 2 220PF

5,21 ENVEE
ia
3
ENVDD 2 D Q11
1
22K
5 ENVDD BLON# 2
22K 5 BLON#
G 2N7002
S
3
as
3
+5VS +5VS
D41
CRT Connector D4 D40 D5 2 1 1
F1
2
1
1
3
ah FUSE_1A
3
1
RB491D
C402
DAN217 DAN217 DAN217 .1UF JP9
2
CRT-15P
2
L2 6
.R
11
1 2 1
5 R FCM2012C80_0805 7 +12VS
L41 12
1 2 2
5 G FCM2012C80_0805 8 +5VS
13
2
L1
w
1 2 3 R32
5 B FCM2012C80_0805 CRT_VCC 9 100K
14
2
C7 C399 C14 C13 C398 C8 4

1
1
R11 R336 R9 10
1
18PF 18PF 18PF 15PF 15PF 15PF 15 R65 R44
w
75 75 75
5 2K 2K
2
2
G
1
L42
2
3 1 1 2 1 3
5 HSYNC1 DDC_DATA 5
S
CHB1608U121 Q4
w
2N7002
Q50 2N7002
L3
2
Q2
G
3 1 1 2 C43
1
4 5 VSYNC1 4
2
CHB1608U121 220PF C33 1 3 DDC_CLK 5
S
220PF
1
2N7002 Q3
R28 C397 C4 C403
2
68PF 68PF @100PF 2N7002

+12VS
2

2
100K
Title
B 2A
401202
A B C D E
A B C D E
S1_IOWR#
S1_IOWR# 16
S1_IORD# S1_IORD# 16
S1_OE# S1_A[0..25]
S1_OE# 16 S1_A[0..25] 16
S1_CE2# S1_D[0..15]
S1_CE2# 16 S1_D[0..15] 16
+3V +3VS +3VS

CBRST# 16,23,28
S1_IOWR#
S1_IORD#
S1_CE2#
S1_OE#
S1_D10
S1_D15
S1_D13
S1_D12
S1_D11
S1_A25
S1_A24
S1_A17
S1_A11
S1_A10
S1_D9
S1_D1
S1_D8
S1_D0
S1_D7
S1_D6
S1_D5
S1_D4
S1_D3
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A7
S1_A9
S1_VCC
1 1
U26
127
134
180
124
122
121
120
119
116
113
111
109
107
105
103
102
100
5,9,23,28 AD[0..31]
21
37
50
79
99
83
81
80
78
77
75
74
73
71
68
67
66
65
64
63
62
59
C246 C244 C247
6
PCI_VCC
PCI_VCC
PCI_VCC
PCI_VCC
AUX_VCC
CORE_VCC
CORE_VCC
CORE_VCC
A_IOWR/CAD15
A_IORD#/CAD13
A_D9/CAD30
A_D1/CAD29
A_D8/CAD28
A_D0/CAD27
A_A0/CAD26
A_A1/CAD25
A_A2/CAD24
A_A3/CAD23
A_A4/CAD22
A_A5/CAD21
A_A6/CAD20
A_A7/CAD18
A_A9/CAD14
A_CE2#/CAD10
A_D10/CAD31
A_A25/CAD19
A_A24/CAD17
A_A17/CAD16
A_A11/CAD12
A_OE#/CAD11
A_D7/CAD7
A_D6/CAD5
A_D5/CAD3
A_D4/CAD1
A_D3/CAD0
A_D15/CAD8
A_D13/CAD6
A_D12/CAD4
A_D11/CAD2
A_A10/CAD9
117 .1UF .1UF .1UF
GRST#
om
AD31 4 98
AD30 5 AD31 A_SKT_VCC 60
AD29 AD30 A_SKT_VCC
7
AD28 8 AD29 112
AD28 A_REG#/CCBE3# S1_REG# 16
AD27 9 97 S1_A12
AD26 10 AD27 A_A12/CCBE2# 82 S1_A8
AD25 11 AD26 A_A8/CCBE1# 70
AD24 AD25 A_CE1#/CCBE0# S1_CE1# 16
12
AD23 16 AD24 93 R208 1 2 33 S1_A16
AD22 17 AD23 A_A16/CCLK 96 S1_A23
AD21 18 AD22 A_A23/CFRAME# 95 S1_A15
.c
AD20 19 AD21 A_A15/CIRDY# 94 S1_A22
AD19 AD20 A_A22/CTRDY# S1_A21
20 92
AD18 22 AD19 A_A21/CDEVSEL# 90 S1_A20
AD17 23 AD18 A_A20/CSTOP# 84 S1_A13
AD16 24 AD17 A_A13/CPAR 86 S1_A14
AD16 A_A14/CPERR#
op
AD15 38 108
AD14 AD15 A_WAIT#/CSERR# S1_WAIT# 16
39 110
AD14 A_INPACK#/CREQ# S1_INPACK# 16
AD13 40 89
AD13 A_WE#/CGNT# S1_WE# 16
AD12 41 91
AD11 42 AD12 A_RDY_IRQ#/CINT# 88 S1_A19 S1_RDY# 16
AD10 43 AD11 A_A19/CBLOCK# 125
AD10 A_WP/CCLKRUN# S1_WP 16
AD9 45 106
AD9 A_RST/CRST# S1_RST 16
2 AD8 46 123 S1_D2 2
AD8 A_R2_D2/RFU
pt
AD7 48 69 S1_D14
AD6 49 AD7 A_R2_D14/RFU 85 S1_A18
AD5 51 AD6 A_R2_A18/RFU 76
AD4 AD5 A_VS1/CVS1 S1_VS1 16
52 104
AD4 A_VS2/CVS2 S1_VS2 16
AD3 53 61
AD3 A_CD1#/CCD1# S1_CD1# 16
AD2 54 126
AD2 A_CD2#/CCD2# S1_CD2# 16
La
AD1
AD0
55
56 AD1
AD0 CardBus Controller A_BVD2/CAUDIO
A_BVD1/CSTSCHG
114
118 S1_BVD2
S1_BVD1
16
16
5,9,23,28
5,9,23,28
5,9,23,28
C/BE#3
C/BE#2
C/BE#1
13
25
36
C/BE3#
C/BE2#
C/BE1#
OZ6933T (TQFP) B_BVD1/CSTCHG
B_BVD2/CAUDIO
B_CD2#/CCD2#
192
190
202
S2_BVD1
S2_BVD2
S2_CD2#
16
16
16
47 136
5,9,23,28 C/BE#0 C/BE0# B_CD1#/CCD1# S2_CD1# 16
R269 100 179
B_VS2/CVS2 S2_VS2 16
ia
1 2 15 152
5,9,23,28 AD15 IDSEL B_VS1/CVS1 S2_VS1 16
PCLK_PCM PCLK_PCM 1 161 S2_A18
11 PCLK_PCM PCI_CLK B_R2_A18/RFU
31 145 S2_D14
5,9,12,23,28 DEVSEL# DEVSEL# B_R2_D14/RFU
27 198 S2_D2
2
5,9,12,23,28 FRAME# FRAME# B_R2_D2/RFU

R283 29 182
5,9,12,23,28 IRDY# IRDY# B_RST/CRST# S2_RST 16
@33 30 201
5,9,12,23,28 TRDY# S2_WP 16
as
32 TRDY# B_WP/CCLKRUN# 164 S2_A19
5,9,12,23,28 STOP# STOP# B_A19/CBLOCK#
35 167
5,9,12,23,28 PAR PAR B_RDY_IRQ#/CINT# S2_RDY# 16
33 165
12,23,28 PERR# PERR# B_WE#/CGNT# S2_WE# 16
1
C326 34 186
5,9,12,23,28 SERR# SERR# B_INPACK#/CREQ# S2_INPACK# 16
@10PF 3 184
5 REQ#3 PCI_REQ# B_WAIT#/CSERR# S2_WAIT# 16
2 162 S2_A14
5 GNT#3 PCI_GNT# B_A14/CPERR#
203 159 S2_A13
5,9,12 PIRQA# IRQ9/INTA# B_A13/CPAR
204 166 S2_A20
3 9,12,23 PIRQB#
5,12 PLOCK#
5,9,13,16,19,23,28 PCIRST#
58
207 LOCK#
ah
IRQ4/INTB#/A_VPP_PGM B_A20/CSTOP#
B_A21/CDEVSEL#
168
170
S2_A21
S2_A22
3
RST# B_A22/CTRDY# 171 S2_A15

163 B_A15/CIRDY# 172 S2_A23
21 PCM_PME# IRQ12/PME# B_A23/CFRAME#
208 169 1 2 S2_A16
5,9,12,23,28 CLKRUN# IRQ14/CLKRUN# B_A16/CCLK
72 R291 33
23 PCM_RI#
SLATCH/SMBCLK/B_VCC_5#
128 IRQ15/RI_OUT# 147

26 PCM_SPK# SPKR_OUT# B_CE1#/CCBE0# S2_CE1# 16
IRQ10/B_VPP_VCC_PGM
133 157 S2_A8

IRQ9/A_VPP_VCC_PGM
21 PCM1_LED
.R
193 LEDO#/SKTA_ACTV B_A8/CCBE1# 173 S2_A12
21 PCM2_LED IRQ11/SKTB_ACTV B_A12/CCBE2# 188
SDATA/B_VCC_3#
B_REG#/CCBE3# S2_REG# 16
B_IOWR#/CAD15
SCLK/A_VCC_5#
B_IORD#/CAD13
IRQ3/A_VCC_3#
205
B_CE2#/CAD10
10,12 SIRQ
B_OE#/CAD11
IRQ5/SERIRQ#
B_D10/CAD31
B_A25/CAD19
B_A24/CAD17
B_A17/CAD16
B_A11/CAD12
206 143
B_D9/CAD30
B_D1/CAD29
B_D8/CAD28
B_D0/CAD27
B_A0/CAD26
B_A1/CAD25
B_A2/CAD24
B_A3/CAD23
B_A4/CAD22
B_A5/CAD21
B_A6/CAD20
B_A7/CAD18
B_A9/CAD14
B_D15/CAD8
B_D13/CAD6
B_D12/CAD4
B_D11/CAD2
B_A10/CAD9
IRQ7/SIN#/B_VPP_PGM B_SKT_VCC S2_VCC
B_D7/CAD7
B_D6/CAD5
B_D5/CAD3
B_D4/CAD1
B_D3/CAD0
160
B_SKT_VCC 200
B_SKT_VCC
GND
GND
GND
GND
GND
GND
GND
GND
w
C340 C345 C310

OZ6933TQFP
101
129
177
132
131
130
115
146
199
197
196
195
194
191
189
187
185
183
181
178
176
175
174
158
156
155
154
153
151
150
149
148
144
142
141
140
139
138
137
135
.1UF .1UF .1UF
14
26
28
44
57
87
w
+3VS
S2_D10
S2_D15
S2_D13
S2_D12
S2_D11
S2_A25
S2_A24
S2_A17
S2_A11
S2_A10
S2_D9
S2_D1
S2_D8
S2_D0
S2_D7
S2_D6
S2_D5
S2_D4
S2_D3
S2_A0
S2_A1
S2_A2
S2_A3
S2_A4
S2_A5
S2_A6
S2_A7
S2_A9
1
C302 C321 C341 C301

4.7UF_10V_0805 .1UF .1UF .1UF
w
2
+3V S2_CE2#
4 SLATCH 16 S2_CE2# 16 4
S2_OE#
+3VS SLDATA 16 S2_OE# 16
S2_IORD#
RTCCLK 9,16 S2_IORD# 16
C291 S2_IOWR# S2_IOWR# 16
C258 C245 C261 C282
.1UF .1UF .1UF .1UF .1UF S2_A[0..25] S2_A[0..25] 16
S2_D[0..15] S2_D[0..15] 16
Title
T R A D E S E C RET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom 2A
D E P A R T M E N T EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE 401202
U S E D B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 星期三, 九月 04, 2002 Sheet 15 of 34
A B C D E
PCMCIA POWER CTRL. Wire ZV PORT to Slot A
CARDBUS
+ 3 V + 5 V +12V S1_VPP
W=40mils
S1_VPP
S1_VCC
SOCKET
U36 JP19
25 8 A77 B77
1
VCC_5V AVPP C354 a68 b68
9 A76 B76
C355 7 AVCC 10 S1_CD2# A75 a34 b34 B75 S2_CD2#
12V AVCC 15 S1_CD2# a67 b67 S2_CD2# 15
1 2 1UF_25V_0805 24 11 4.7UF_10V_0805 S1_WP A74 B74 S2_WP
12V AVCC 15 S1_WP a33 b33 S2_WP 15
2
A73 B73
GND GND
om
1 2 C356 1 23 S2_VPP S1_D10 A72 B72 S2_D10
5V BVPP S2_VPP a66 b66
.1UF 2 20 S1_D2 A71 B71 S2_D2
1 2 C357 30 5V BVCC 21 S1_D9 A70 a32 b32 B70 S2_D9
5V BVCC
W=40mils S2_VCC a65 b65
.1UF 22 S1_D1 A69 B69 S2_D1
1 2 C395 15 BVCC S1_D8 A68 a31 b31 B68 S2_D8
1
.1UF 16 3.3V 6 C394 S1_D0 A67 a64 b64 B67 S2_D0
3.3V RESET a30 b30
1 2 C370 17 14 S1_BVD1 A66 B66 S2_BVD1
3.3V RESET# 15 S1_BVD1 a63 b63 S2_BVD1 15
.1UF 4.7UF_10V_0805 A65 B65
2
1 2 C381 3 26 S1_A0 A64 GND GND B64 S2_A0
15 SLDATA DATA NC a29 b29
.1UF 5 27 S1_BVD2 A63 B63 S2_BVD2
15 SLATCH LATCH NC 15 S1_BVD2 a62 b62 S2_BVD2 15
1 2 C382 4 28 S1_A1 A62 B62 S2_A1
.c
.1UF 9,15 RTCCLK CLOCK NC CBRST# S1_REG# a28 b28 S2_REG#
29 A61 B61 S2_REG# 15
NC 15 S1_REG# a61 b61
13 S1_A2 A60 B60 S2_A2
19 APWR_GOOD# S1_INPACK# A59 a27 b27 B59 S2_INPACK#
18 BPWR_GOOD# 12 15 S1_INPACK# S1_A3 A58 a60 b60 B58 S2_A3 S2_INPACK# 15
21 OCCB# OC# GND a26 b26
A57 B57
GND GND
op
+3V 1 2 S1_WAIT# A56 B56 S2_WAIT#
15 S1_WAIT# a59 b59 S2_WAIT# 15
TPS2206AI/TPS2216 S1_A4 A55 B55 S2_A4
R314 S1_RST A54 a25 b25 B54 S2_RST
100K 15 S1_RST S1_A5 A53 a58 b58 B53 S2_A5 S2_RST 15
S1_VS2 A52 a24 b24 B52 S2_VS2
15 S1_VS2 S1_A6 a57 b57 S2_A6 S2_VS2 15
A51 B51
S1_A25 A50 a23 b23 B50 S2_A25
A49 a56 b56 B49
GND GND
pt
S1_A7 A48 B48 S2_A7
S1_A24 A47 a22 b22 B47 S2_A24
S1_A12 a55 b55 S2_A12
A46 B46
S1_A23 A45 a21 b21 B45 S2_A23
S1_A15 A44 a54 b54 B44 S2_A15
S1_A22 A43 a20 b20 B43 S2_A22
a53 b53
La
A42 B42
S1_A16 GND GND S2_A16
A41 B41
A40 a19 b19 B40
S1_VPP a52 b52 S2_VPP
A39 B39
A38 a18 b18 B38
S1_VCC a51 b51 S2_VCC
A37 B37
S1_A21 a17 b17 S2_A21
A36 B36
S1_RDY# A35 a50 b50 B35 S2_RDY#
15 S1_RDY# a16 b16 S2_RDY# 15
ia
S1_A[0..25] S1_A20 A34 B34 S2_A20
15 S1_A[0..25] a49 b49
S1_D[0..15] S1_WE# A33 B33 S2_WE#
15 S1_D[0..15] S2_A[0..25] 15 S1_WE# S1_A19 A32 a15 b15 B32 S2_A19 S2_WE# 15
15 S2_A[0..25] a48 b48
S2_D[0..15] S1_A14 A31 B31 S2_A14
15 S2_D[0..15] a14 b14
S1_A18 A30 B30 S2_A18
+3V S1_A13 A29 a47 b47 B29 S2_A13
as
A28 a13 b13 B28
S1_A17 A27 GND GND B27 S2_A17
PCMRST# 20 S1_A8 a46 b46 S2_A8
A26 B26
14
S1_IOWR# A25 a12 b12 B25 S2_IOWR#

1
15 S1_IOWR# a45 b45 S2_IOWR# 15

S2_VPP W=30mils S1_A9 A24 B24 S2_A9
2 3 CBRST# S1_IORD# A23 a11 b11 B23 S2_IORD#
5,9,13,15,19,23,28 PCIRST# CBRST# 15,23,28 15 S1_IORD# a44 b44 S2_IORD# 15
A22 B22
1
C293 C300 S1_A11 GND GND S2_A11

A21 B21
.01UF 1UF_25V_0805
+3V POWER
ah 1
R262 15 S1_VS1 S1_VS1

S1_OE#
A20
A19
a10
a43
b10
b43
B20
B19
S2_VS1
S2_OE# S2_VS1 15
15 S1_OE# a9 b9 S2_OE# 15
2
U28A S1_CE2# A18 B18 S2_CE2#

74LVC125 10K 15 S1_CE2# S1_A10 A17 a42 b42 B17 S2_A10 S2_CE2# 15
a8 b8
A16 B16
C494 S1_D15 A15 GND GND B15 S2_D15
2
S1_CD1# 1 2 S1_CE1# A14 a41 b41 B14 S2_CE1#

+3V 15 S1_CE1# S1_D14 A13 a7 b7 B13 S2_D14 S2_CE1# 15
S1_VPP W=30mils 1000PF
.R
S1_D7 A12 a40 b40 B12 S2_D7
C468 S1_D13 a6 b6 S2_D13
A11 B11
1
C292 C299 S1_CD2# 1 2 S1_D6 A10 a39 b39 B10 S2_D6

A9 a5 b5 B9
1000PF GND GND
.01UF 1UF_25V_0805 C493 S1_D12 A8 B8 S2_D12
a38 b38
2
S2_CD1# 1 2 S1_D5 A7 B7 S2_D5

S1_D11 a4 b4 S2_D11
1000PF A6 B6
a37 b37
w
S1_D4 A5 B5 S2_D4
C467 S1_CD1# A4 a3 b3 B4 S2_CD1#
15 S1_CD1# a36 b36 S2_CD1# 15
S1_VCC S2_CD2# 1 2 S1_D3 A3 B3 S2_D3
A2 a2 b2 B2
1000PF a35 b35
A1 B1
a1 b1
w
C308 C305
1
C312 PCMC154PIN
C322
10UF_1206 56PF .1UF 1000PF
w
2
S2_VCC

C309 C306 C313 Title
1
C323
10UF_1206 56PF .1UF 1000PF SCHEMATIC, M/B LA-1281
2
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B 2A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401202
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.
SDD[0..15]
10 SDD[0..15]
IDE Series Resistor 9 PDD[0..15] PDD[0..15]
Place them close SB 18 SBD[0..15]

SBD[0..15]
PBD[0..15]
19 PBD[0..15]
RP89
PDD8 16 1 PBD8
PDD9 15 2 PBD9
PDD10 14 3 PBD10 R232 RP64
PDD11 13 4 PBD11 1 2 IIRQ14 SDD15 16 1 SBD15
10,12 IRQ14 IIRQ14 19
PDD7 12 5 PBD7 SDD14 15 2 SBD14
PDD6 11 6 PBD6 82 SDD13 14 3 SBD13
PDD5 10 7 PBD5 R331 SDD12 13 4 SBD12
PDD4 9 8 PBD4 PDDREQ 1 2 SDD11 12 5 SBD11
9 PDDREQ PBDREQ 19 SDD10 11 6 SBD10
82 SDD9 10 7 SBD9
16P8R-33 SDD8 9 8 SBD8
R329
om
1 2 PBIORDY 16P8R-33
RP93 9 PDIORDY PBIORDY 19
PDD12 16 1 PBD12 82 RP70
PDD13 15 2 PBD13 R328 SDD7 16 1 SBD7
PDD14 14 3 PBD14 1 2 PBIORDY SDD6 15 2 SBD6
PDD15 13 4 PBD15 +5VS SDD5 14 3 SBD5
PDD3 12 5 PBD3 SDD4 13 4 SBD4
PDD2 11 6 PBD2 1K SDD3 12 5 SBD3
PDD1 10 7 PBD1 R330 SDD2 11 6 SBD2
PDD0 9 8 PBD0 1 2 PDDREQ SDD1 10 7 SBD1
SDD0 9 8 SBD0
.c
16P8R-33 4.7K 16P8R-33
RP95
8 1 PCS3# RP85
9 PDCS3# PCS3# 19
op
7 2 PBA0 5 4 S_DA2
9 PDA0 PBA0 19 9 SDA2 S_DA2 18
6 3 PCS1# 6 3 S_DA0
9 PDCS1# PCS1# 19 9 SDA0 S_DA0 18
5 4 7 2 S_DCS3#
9 SDCS3# S_DCS3# 18
8 1 S_DCS1#
9 SDCS1# S_DCS1# 18
8P4R-33
8P4R-33
1 R332 2 PBA1 R298 1 2 33 S_DA1
9 PDA1 PBA1 19 9 SDA1 S_DA1 18
33
pt
RP94
8 1 PBDIOW# RP88
9 PDIOW# PBDIOW# 19
La
7 2 PBDIOR# 8 1 S_DIOR#
9 PDIOR# PBDIOR# 19 9 SDIOR# S_DIOR# 18
6 3 SDDACK# 7 2 S_DDACK#
9 PDDACK# PBDACK# 19 9 SDDACK# S_DDACK# 18
5 4 PBA2 6 3 S_DIOW#
9 PDA2 PBA2 19 9 SDIOW# S_DIOW# 18
5 4
8P4R-22 8P4R-22
ia
as
ah
.R
w
w
w

Title
+5VCD R93
+5VCD 1 2 CD_SIORDY +5VOZ 1 2
RP21 L14 CHB1608U301
MODE1 8 1 1K 1 2
CDASPN 7 2 L13 CHB1608U301+5VCD
CD_IRQ 6 3 CDD[0..15] CDD[0..15] 19
ISCDROM 5 4 +5VOZ C57 C28 C53 C68
+5VCD .1UF .1UF .1UF .1UF
8P4R-10K SBD[0..15] SBD[0..15] 17
RP12
INTN 8 1
GPIO_1 7 2
GPIO_0 6 3
5 4 U2
44
58
OZ163
9
8P4R-10K
VDD
VDD
VDD
SBD0 76 77 CDD0
SBD1 78 HDD0 CDD0 79 CDD1
HDD2 CDD2
om
SBD3 83 84 CDD3
SBD4 HDD3 CDD3 CDD4
86 87
SBD9 HDD8 CDD8 CDD9
4 3
.c
SBD14 HDD13 CDD13 CDD14
20 19
HDD15 CDD15
S_DA0 68 69 CD_SBA0
17 S_DA0 HDA0 CDA0 CD_SBA0 19
op
S_DA1 70 71 CD_SBA1
S_DA2 66 67 CD_SBA2
S_DCS1# 63 64 CD_SCS1#
R88 17 S_DCS1# HCS0 CCS0 CD_SCS1# 19
S_DCS3# 61 62 CD_SCS3#
17 S_DCS3# HCS1 CCS1 CD_SCS3# 19
1 2 SDDREQ
S_DIOR# 99 100 CD_SIOR#

17 S_DIOR# HDIOR# CDIOR# CD_SIOR# 19
pt
4.7K S_DIOW# 6 5 CD_SIOW#
17 S_DIOW# HDIOW# CDIOW# CD_SIOW# 19
72 73 CIOCS16#
R92 HIOCS16# CIOCS16#
1 2 82 93 94 CD_SIORDY
9 SDIORDY HIORDY CIORDY CD_SIORDY 19
R86 1 2 33 74 75 CD_IRQ +5VCD

X1 10,12 IRQ15 HINTRQ CHINTRQ CD_IRQ 19
La
SDDREQ R87 1 2 82 12 13 CD_DREQ
9 SDDREQ HDMARQ CDMARQ CD_DREQ 19
OSC1 OSC2 S_DDACK# 88 89 CD_DACK# RP5
17 S_DDACK# HDMACK# CHDMACK# CD_DACK# 19 REVBTN 8 1
FRDBTN 7 2
8MHZ 1 2 24 23 CD_RSTDRV# PLAYBTN 6 3
R43 19 SIDERST# HRESET# CRESET# CD_RSTDRV# 19
R41 33 59 60 CDASPN STOPBTN 5 4
HDASPN CDASPN
48 47 8P4R-10K
HSYNC SSYNC
ia
53 52
1M HBIT_CLK SBIT_CLK
55 54 +5VCD
50 HDATA_OUT SDATA_OUT 49 RP23
C29 C42 HDATA_IN SDATA_IN CDD7
46 45 1 16
HACRSTN SACRSTN 1 2 CDD6 2 15
10PF 10PF +5VCD
DM_ON 28 R33 @10K CDD5 3 14
as
PLAYBTN 36 PAV_EN 51 1 2 CDD4 4 13
26 PLAYBTN PLAY/PAUSE PWR_CTL
FRDBTN 35 CDD3 5 12
26 FRDBTN FFORWARD R39 10K
REVBTN 34 CDD2 6 11
26 REVBTN REWIND
STOPBTN 37 80 ISCDROM CDD1 7 10
26 STOPBTN STOP/EJECT ISCDROM CDD0 8 9
10UF_1206 39 GPIO_1
C15 R42 DM_ON 29 GPIO[1]/VOL_UP 40 GPIO_0
0 PCSYSTEM_OFF GPIO[0]/VOL_DN 16P8R_4.7K
R29 10K INTN 25
+5VCD 1 2 21 CD_INTA# 30 INTN
RESET#
ah 56
R45
1
1K
2 CDD8 8
RP15
9
D9 MODE0 57 MODE1 CDD9 7 10
1 2 1 3 26 MODE1 CDD10 6 11
2,20,24 SMD SDATA
Q15 CDD11 5 12
2N7002 38 1 2 CDD12 4 13
1N4148 27 PAVMODE CDD13 3 14
R22 10K
1 3 SCLK 41 CDD14 2 15
2,20,24 SMC
.R
CSN
2
42 CDD15 1 16
Q12 OSC1 INCN
31 43
2N7002 OSC2 32 OSCI UDN 16P8R_4.7K
R116 OSCO +5VCD
2
1 2
GND
GND
GND
GND
GND
+12VS
+5VALW
w
100K R85
16
33
65
85
92
+5VCD +5VCD 100K

CD_DREQ 1 2
C138 C136 R51 5.6K

10UF_1206 1UF_0805 U5 R71 DM_ON
w
DM_ON 26
1 8 100K
+5VALW S D
2 7 C58 C66 Q14
1
R113 240K 3 S D 6 10UF_1206 .1UF SUSP# 2 CIOCS16# 1 2
S D 2N7002 +5VCD
1 2 4 5
+5VALW G D R72 47K
DM_ON#
w
DM_ON# 26
SI4425DY
3
C137 Q7
1
1 2 DM_ON 2
2N7002
1UF_0805 R114 10K
1
SUSP# 2 22K 22K 2 CDPLAY

20,22,31,32 SUSP# CD_PLAY 21 Title
22K 22K
Q20 Q16 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
DTC124EK DTC124EK AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B 2A
401202
3
IDE,CD-ROM & FDD Module CONN. +5VS
RP99 RP100
HDSEL# 1 8 MTR0# 6 5
+5VS +5VS RDATA# 2 7 DSKCHG# 7 4 FDDIR# +5VS
WP# 3 6 INDEX# 8 3 STEP#
TRACK0# 4 5 9 2 WDATA#
10 1 WGATE#
+5VS
8P4R_1K
C385 C388 C386 C500 C498 C497
C387 C499 10P8R-1K
1
1
1000PF 10UF_1210 1UF_25V_0805 .1UF 1000PF 10UF_1210 1UF_25V_0805 .1UF
2
2
Place component's closely H DD CONN. Place component's closely FDD CONN. 1 2 DRV0#
+5VS
R376 1K
+5VS JP7
17 PBD[0..15] PBD[0..15]
om
CDD[0..15] 1
18 CDD[0..15] INDEX# 1
2
10 INDEX# 2
3
DRV0# 4 3
10,21 DRV0# 4
5
DSKCHG# 6 5
10 DSKCHG# 6
7
8 7
9 8
MTR0# 10 9
10 MTR0# 11 10
.c
JP22 FDDIR# 11
12
10 FDDIR# 12
R324 10K PIDERST# 3MODE# 13
1 2 10 3MODE# 13
1 2 PBD7 PBD8 STEP# 14
PBD6 3 4 PBD9 10 STEP# 15 14
PBD5 5 6 PBD10 WDATA# 16 15
7 8 10 WDATA# 16
op
PBD4 PBD11 17
PBD3 9 10 PBD12 WGATE# 18 17
11 12 10 WGATE# 18
PBD2 PBD13 19
PBD1 13 14 PBD14 TRACK0# 20 19
15 16 10 TRACK0# 20
PBD0 PBD15 21
17 18 WP# 21
22
19 20 10 WP# 22
17 PBDREQ 23
21 22 RDATA# 24 23
17 PBDIOW# 23 24 10 RDATA# 24
pt
25
17 PBDIOR# 25 26 PCSEL 1 2 HDSEL# 26 25
17 PBIORDY 27 28 10 HDSEL# 26
R322 470
17 PBDACK# 29 30
IIRQ14 85201-2605
17 IIRQ14 31 32
PBA1
17 PBA1 33 34
PBA0 PBA2
17 PBA0 35 36 PBA2 17
La
PCS1# PCS3#
17 PCS1# 37 38 PCS3# 17
DASP#
21 PHDD_LED# 39 40
+5VS 41 42 +5VS +5VS
1 2
+5VS R326 100K 43 44
HDD 44P
1
R325
ia
100K
D24 RB717F
2
PCIRST# 1
3 PIDERST#
as
2
10 PHDRST#
+5VS
ah
JP14
1
R235
26 CDROM_L 1 2 CDROM_R 26
26 CD_AGND 3 4 100K
CD_RSTDRV# CDD8
18 CD_RSTDRV#1 5 6 D26 RB717F
2 CDD7 CDD9
.R
CDD6 7 8 CDD10 PCIRST# 1
R60 10K 9 10 5,9,13,15,16,23,28 PCIRST#
2
CDD5 CDD11 3 SIDERST#
11 12 SIDERST# 18
CDD4 CDD12 2
13 14 10 SHDRST#
CDD3 CDD13
CDD2 15 16 CDD14
CDD1 17 18 CDD15
CDD0 19 20
21 22 CD_DREQ 18
w
23 24 CD_SIOR# 18
18 CD_SIOW# 25 26
18 CD_SIORDY 27 28 CD_DACK# 18
18 CD_IRQ 29 30 R80 100K
PDIAG# 1 2
18 CD_SBA1 31 32 +5VCD
w
W=80mils
18 CD_SBA0 33 34 CD_SBA2 18 +5VCD
18 CD_SCS1# 35 36 CD_SCS3# 18 C115 C97
SHDD_LED# C86 C112
1
1
W=80mils
21 SHDD_LED# 37 38
39 40 +5VCD 1000PF 10UF_1210 1UF_25V_0805 .1UF
+5VCD 41 42 1 2
w
+5VCD
2
43 44
45 46 C85 .1UF
47 48 Place component's closely CD-ROM CONN.
49 50
1 2 SHDD_LED#
1
+5VCD R107
R98 100K 470 CD-ROM CONN.

2
Title
R192 1 2
+3V
KBA[0..18] 1 2
21 KBA[0..18] +12VS
ADB[0..7] 2N7002 C348 .1UF
21 ADB[0..7] L33
SA[0..18] Q31 100K
2
G
14
10,12 SA[0..18] SD[0..7] 2 1 U31A
10,12 SD[0..7] +3VALW
KSI[0..7] 1 3
21 KSI[0..7] BIOSCS# 10
KSO[0..15] @CHB1608U800 SYSON 1 2
21 KSO[0..15]
2
G
1 2 74LVC14 R304
51AVCC
R178 0 1 3 +3V POWER U34B 1 2 +3V
MEMR# 10,12 74LVC125
4
D
7
L29 Q39 Q38 1K
2
G
+3VALW 1 2 2N7002 2N7002 ECSMI# 5 6 EXTSMI# EXTSMI# 9
1 3 MEMW# 10,12
CHB1608U800
S
ECAGND
+3V POWER
AEN 10
C253 C205 C251 C289 C243 C228
1
1
IOR# 10,12
.1UF
SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
SA10
SA11
SA12
SA13
SA14
SA15
SA16
SA17
SD0
SD1
SD2
SD3
SD4
SD5
SD6
SD7
IOW# 10,12
.1UF .1UF 1000PF .1UF 1000PF IOCHRDY 10,12
2
om
U21
109
160
108
161
166
167
168
169
170
171
172
173
174
157
162
163
158
159
24
26
66
23
67
91
80
92
10
11
15
16
17
18
19
20
21
22
13
14
43
44
45
46
87
88
3
4
5
6
7
8
9
1
2
HIOCHRDY
NC
NC
NC
NC
NC
NC
NC
NC
VCC
VCC
VCC
VCC
AVCC
GND
GND
GND
GND
GND
AVREF
AGND
HA10
HA11
HA12
HA13
HA14
HA15
HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7
HA0
HA1
HA2
HA3
HA4
HA5
HA6
HA7
HA8
HA9
HIOR#
HIOW#
HAEN/FXASTB#
HMEMRD#/PA1
HMEMWR#/PA2
HMEMCS#/PA0
HA16/PA3
HA17/PA4
ATFOUT#
KSI0 36 114 KBA0 U34C
10
KSI1 35 KBSIN0 A0 115 KBA1 74LVC125
KSI2 34 KBSIN1 A1 116 KBA2
.c
KSI3 KBSIN2 A2 KBA3
33 117 9 8 ATFINT#
KBSIN3 A3 ATF_INT# 9
KSI4 32 118 KBA4
KSI6 30 KBSIN5 HRMS#(Host Reset Mode Select) A5 120 KBA6 +3V POWER +3V
KBSIN7 A7
op
Environment ENV0 ENV1 Mode (P105) HRMS# 122 KBA8
KSO0 56 A8 123 KBA9 VGASUSP#_1
2
(P104) (P103)
KSO1 55 KBSOUT0 A9 124 KBA10 R302
KSO2 54 KBSOUT1 IRE 0 0 Reset host when shared A10 125 KBA11 U34D
13
KSO3 53 KBSOUT2 m e m o r y a c c e s s can not 1 A11 126 KBA12 74LVC125 10K
KSO4 KBSOUT3 A12 KBA13
52 be completed 127
KSO5 51 KBSOUT4 IRD 0 1 A13/BE0 128 KBA14 12 11 VGASUSP 5
1
KSO6 50 KBSOUT5 A14/BE1 129 KBA15
KBSOUT6 A15/PG1
pt
KSO7 49 Extend access until completed 0 130 KBA16
KSO8 48 KBSOUT7 Development 1 0 A16/PA5 135 KBA17
KSO9 KBSOUT8 A17/PA6
47 +3V POWER
KSO10 42 KBSOUT9 137 ADB0 +3V
KSO11 41 KBSOUT10 FXBUSEN#(FX Bus Interface Enable) D0 138 ADB1
KSO12 40 KBSOUT11 (P136) D1 139 ADB2 570SCI#
KBSOUT12 D2
La
KSO13 39 140 ADB3
1
SHBM#(Shared/Non-Shared BIOS Memory) Mode (P130) FXBUSEN#
KSO14 KBSOUT13 D3 ADB4 +3V R303
38 141
R203 @10K KSO15 37 KBSOUT14 D4 142 ADB5
1
KBSOUT15 D5 C377
2 1 1 Non Shared Memories FX Bus Interface Enabled 1 143 ADB6 U34A 10K
+3VALW
14
D6 144 ADB7 .1UF 74LVC125
1
156 D7
10,12 IRQ1 D23 SCI# 9
IRQ1
2
2 1 155 0 Shared Memories ISA Bus Compatible Mode 0 111 HDEN# 2 3 SCI#
9 IRQ8# IRQ8# RD# FRD# 21
154 105 HRMS#
IRQ11 SEL0# FSEL# 21
ia
@RB751V 153 112 +3V POWER
10,12 IRQ12 IRQ12 WR0# FWR# 21
R188 1 0 K HDEN#(Host Device Enable)
1 2 79 110 SELIO#
+3VALW PFAIL# PG0/SELIO# SELIO# 21
7
EC_HPOWON 165 Mode (P111) HDEN# TRIS(TRI-STATE) (P102) 107 VGASUSP#_1
5,9,27 EC_HPOWON HPWRON PG2/CLK
+RTCVCC 28 106 PCMRST#
VBAT PG3/SEL1# PCMRST# 16 RP51
113 ATFOUT#
2
as
R231 Device are enabled o reset 1 0 Normally PG4/WR1# 10 1 HRMS#
100K 145 ENV1 9 2 ECSMI#
PF0/D8 PIIX4_LID# 21
146 N3/F5# KBA15 8 3 KBA18
PF1/D9 BQ_BATT 29
Devices are disabled on reset 0 1 TriState 147 KBA16 7 4 ENV0
PF2/D10 SUSA# 9,11
148 KBA17 6 5
PF3/D11 SUSB# 9
1
149
PF4/D12 SUSC# 9
150 SYSON 10P8R-10K
PF5/D13 SYSON 22 RP68
+3VS 151 ACIN
ah PF6/D14
PF7/D15
152 BKOFF# ACIN
BKOFF#
9,26,29
14 +5VS 10
9
1
2
KBD_DATA
KBD_CLK
PC4/EXTINT11
164 8 3 PS2_DATA
PC5/EXINT15
PC7/PSDAT3
PC6/PSCLK3
51RST 26
PC3/EXINT0
PB6/HRSTO
HMR EXT_DATA 7 4 PS2_CLK

2
PB5/GA20
PH0/BST0
PH1/BST1
PH2/BST2
PE0/HA18
PB7/SWIN
PH3/PFS#
PB0/RING
PH5/ISE#
PH4/PLI#
PB2/SDA
PE1/A18
PD0/AD0
PD1/AD1
PD2/AD2
PD3/AD3
PD4/AD4
PD5/AD5
PD6/AD6
PD7/AD7
PB1/SCL
PSDAT1
PSDAT2
PSCLK1
PSCLK2
R156 R163 EXT_CLK 6 5

PB3/TA
PB4/TB
+5VS
32KX1
32KX2
10K 10K
PC0
PC1
PC2
DA0
DA1
DA2
DA3
NC
NC
NC
NC
NC
NC
NC
NC
10P8R-10K
D17 PC87570-176PIN
.R
136
104
103
102
101
100
131
132
133
134
175
176
2 1 G20 RP59
25
27
12
71
72
73
74
75
76
77
78
61
62
63
64
65
68
70
69
58
60
57
59
81
82
83
84
85
86
93
94
95
96
97
98
99
89
90
10 GATEA20
1
1 8 PCMRST#
+3V
RB751V CRY1 C224 .01UF 2 7
CRY2 570SCI# VBATT 1 2 ECAGND 3 6
2
D18 R173 4 5 RING#

51ON 26
2 1 RCL# SA18 ECSMI# C222 .01UF
10 RC# KBA18 10K BATT_CHGI 1 2 +3VALW 8P4R_10K
ACOFF 30 RP52
w
RB751V 23 RING# ENV1

RING# SUSP# 18,22,31,32
CLK_SMB ENV0 C226 .01UF 10 1 N3/F5#
2,18,24 SMC MMO_ON 21,22
1
DAT_SMB BATT_TEMP 1 2 HDEN# 9 2 BKOFF#

2,18,24 SMD SELIO# 8 3 G20
1
PWM
14 INVT_PWM RCL# R153
7 4
+3VALW
21,26 LID_SW# 6 5
w
EN_DFAN# 22 +3VALW @0
VOL_AMP 26
R258 BNI/ILI# 29
G20 10P8R-4.7K
OCP 30
2
CRY1 1 2 CRY2 RCL# D31
VOL_DW# 21,26 1
2
w
9,26 ON/OFF BATT_CHGI 30 21 CDON#/MAIL

22M R155 3
2
23 EN_WOL# VOL_UP# 21,26 CDON_BTN# 26

R259 FAN_SENSE VBATT 47K_1% 2
9,22 FAN_SENSE VBATT 29 26 CDON#
51K
26 NUM_LED# BATT_TEMP
26 CAPS_LED# BATT_TEMP 29
X2 EXT_DATA DAN202U
26 ARROW_LED# EXT_DATA 25
1
EXT_CLK EXT_CLK 25
1 1
KBD_DATA KBD_DATA 25
32.768KHZ KBD_CLK Compal Electronics, Inc.
1
R199 KBD_CLK 25
C296 C290 PS2_DATA
PS2_DATA 26
10PF 33PF 2 4.7K 1 CLK_SMB PS2_CLK Title
PS2_CLK 26
2
2 1 DAT_SMB
+5VALW THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
R193 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B 2A
4.7K DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401202
+5VCD
+3VALW
+3VALW
8
7
6
5
RP55 C204 .1UF
1
R95 1 2 +5VALW
8P4R-100K C193
100K .1UF 1 2
20,26 VOL_DW#
20
1
2
3
4
20,26 VOL_UP# U17
20
2
2 18 ADB0 U10
20 CDON#/MAIL
VCC
1A1 1Y1 ADB1 +3VALW ADB0
4 16 3 2
VCC
18 CD_INTA# 1A2 1Y2 D0 Q0 SMB_SEL# 24
6 14 ADB2 RP37 +3VALW ADB1 4 5
26 BUTTON_LOCK# 1A3 1Y3 C198 D1 Q1 DQ_BATT# 29
PCM_LED 8 12 ADB3 ADB2 7 6
1A4 1Y4 D2 Q2 MAIL_ACT_LED# 26
SHDD# 11 9 ADB4 DD 1 8 1 2 ADB3 8 9
19 SHDD_LED# 2A1 2Y1 D3 Q3
13 7 ADB5 AA 2 7 ADB4 13 12
19 PHDD_LED# 2A2 2Y2 D4 Q4 FSTCHG 30
15 5 ADB6 BB 3 6 ADB5 14 15
10,19 DRV0# 2A3 2Y3 U13A D5 Q5 CD_PLAY 18
17 3 ADB7 CC 4 5 .1UF ADB6 17 16
16 OCCB# S W_CLK/HDD_LED# 26
14
2A4 2Y4 74LVC32 ADB7 18 D6 Q6 19
D7 Q7 S W _ DATA/CD_FDD_LED# 26
+3VALW 1 8P4R_100K KBA3 1
1G
om
19 3 AA 11
GND
U13B 2G SELIO# LARST# CLK
2 1
GND
14
74LVC32 74LVC244 CLR
KBA2 4 74HCT273
10
6 CC R154 10K
10
7
SELIO# 5 1 2
20 SELIO# +3V R140 C194
D15 +5VALW 1 2 1 2
MMO_ON 1 2
20,22 MMO_ON VR_ON 32
7
20K 1UF_25V_0805
.c
RB751V
D14
1 D12
15 PCM1_LED 3 PCM_LED LID_SW# 1 2 LID# LID# 9
2
15 PCM2_LED
2
@RB751V
op
R148 +5VALW
DAN202U D22 C192
100K +5VALW +3VALW 1 2 1 2
C191 20 PIIX4_LID#
5
6
7
8
RP35 1 2 .1UF
1
RB751V
20
8P4R-100K .1UF U16
20
U11 D16 ADB0 3 2 PWR_LED# 26
VCC
D0 Q0
pt
E_MAIL# 2 18 ADB0 51RING# 1 2 ADB1 4 5
26 E_MAIL# PX4_RI# 9
VCC
1A1 1Y1 D1 Q1 TRICKLE 30
4
3
2
1
INTERNET# 4 16 ADB1 ADB2 7 6 51RING#

26 INTERNET# 1A2 1Y2 D2 Q2
6 14 ADB2 ADB3 8 9
26 BUTTON3# 1A3 1Y3 D3 Q3 BATT_LOW_LED# 26
8 12 ADB3 RB751V +3VALW ADB4 13 12
26 BUTTON4# 1A4 1Y4 D4 Q4 PBTN_OUT# 9
11 9 ADB4 ADB5 14 15
2 ATF# 2A1 2Y1 U13C D5 Q5 LLBATT# 9
13 7 ADB5 ADB6 17 16
20,26 LID_SW# BATT_CHGI_LED# 26
14
2A2 2Y2 74LVC32 D6 Q6
La
15 5 ADB6 ADB7 18 19
5,14 ENVEE 2A3 2Y3 D7 Q7 BEEP# 26
PME# 17 3 ADB7 KBA4 9
2A4 2Y4 8 BB 11
+3VALW 1 SELIO# 10 LARST# 1 CLK
GND
19 1G CLR
GND
U13D 2G 74HCT273
14
74LVC32 74LVC244
10
7
KBA1 12
10
ia
11 DD
SELIO# 13
+3VALW
+3VALW
7
U9
1
as
1 2 R143
KBA18 1 32 +12V R142 100K 10K
U7 KBA16 NC VCC FWE#
2 31
KBA15 3 A16 WE* 30 KBA17 Q25 KSI[0..7]
2
A15 A17 KSI[0..7] 20
KBA11 1 32 FRD# KBA12 4 29 KBA14 2N7002 KSO[0..15]
A11 OE# A12 A14 KSO[0..15] 20
2
KBA9 2 31 KBA10 KBA7 5 28 KBA13 3 1
A9 A10 A7 A13 15 PCM_PME#
KBA8 3 30 FSEL# KBA6 6 27 KBA8
KBA13 A8 CE# ADB7 KBA5 A6 A8 KBA9
4 29 7 26
KBA14
KBA17
5
6
A13
A14
DQ7
DQ6
28
27
ADB6
ADB5
KBA4
KBA3
8
9
A5
A4
ah A9
A11
25
24
KBA11
FRD# 23 MDMPME# JP6
KSI1 1 8
FWE# 7 A17 DQ5 26 ADB4 KBA2 10 A3 OE* 23 KBA10 1 2 24 KSI7 2 7 CP12
8 WE# DQ4 25 ADB3 KBA1 11 A2 A10 22 FSEL# +12V R139 100K 23 KSI6 3 6 8P4C-220PF
+3VALW VCC DQ3 A1 CE* 22
KBA18 9 24 KBA0 12 21 ADB7 KSO9 4 5
KBA16 10 A18 VSS 23 ADB2 ADB0 13 A0 DQ7 20 ADB6 Q24 21 KSI4 1 8
2
KBA15 11 A16 DQ2 22 ADB1 ADB1 14 DQ0 DQ6 19 ADB5 2N7002 20 KSI5 2 7 CP13
KBA12 12 A15 DQ1 21 ADB0 ADB2 15 DQ1 DQ5 18 ADB4 3 1 PME# 19 KSO0 3 6 8P4C-220PF
28 1394_PME# PME# 23
.R
KBA7 13 A12 DQ0 20 KBA0 16 DQ2 DQ4 17 ADB3 18 KSI2 4 5
KBA6 A7 A0 KBA1 VSS DQ3 17 KSI3
14 19 1 8
KBA5 15 A6 A1 18 KBA2 16 KSO5 2 7 CP14
KBA4 16 A5 A2 17 KBA3 @29F040 15 KSO1 3 6 8P4C-220PF
A4 A3 14 KSI0 4 5
13 KSO2 1 8
12
SST39VF040_TSOP For Test Only(PLCC 11
KSO4 2 7 CP15
w
C199 KSO7 3 6 8P4C-220PF

1 2 +3VALW
Socket) 10 KSO8 4 5
U8 9 KSO6 1 8
.1UF 8 KSO3 2 7 CP16
KBA11 FRD# 7 KSO12 8P4C-220PF
1 32 3 6
A11 OE# FRD# 20 6
KBA9 2 31 KBA10 KSO13 4 5
w
KBA8 3 A9 A10 30 FSEL# +3VALW 5 KSO14 1 8

KBA13 4 A8 CE# 29 ADB7 FSEL# 20 4 KSO11 2 7 CP17
KBA14 5 A13 DQ7 28 ADB6 3 KSO10 3 6 8P4C-220PF
KBA17 A14 DQ6 ADB5 R141 2 KSO15
6 27 4 5
1
FWE# 7 A17 DQ5 26 ADB4 +3VALW R144 1 2 1

w
WE# DQ4 +12VS

8 25 ADB3 100K
VCC DQ3 100K
KBA18 9 24 int. kb-85201-2405
2
G
KBA16 10 A18 VSS 23 ADB2 Q26

5
KBA15 A16 DQ2 ADB1

11 22 2 1 3 FLASH# 10
2
KBA12 12 A15 DQ1 21 ADB0 FWE# 4

D
KBA7 13 A12 DQ0 20 KBA0 1 2N7002

KBA6 14 A7 A0 19 KBA1 U15 FWR# 20
A6 A1
KBA5
KBA4
15
16 A5 A2
18
17
KBA2
KBA3
7SH32FU Compal Electronics, Inc.
3
A4 A3 Title
@29F040 SCHEMATIC, M/B LA-1281

KBA[0..18] THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
20 KBA[0..18] AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
ADB[0..7] B 2A
20 ADB[0..7] DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401202
A B C D E
+3V
+ C271
C272 1UF_0805
10UF_1206
+3VALW 6.3V
U23
8 1
7 D1 S1 2
6 D1 G1 3
1 1
5 D2 S2 4 SYSON_ALW
D2 G2 +12VALW
R205 100K
8936
1
+ C274 R230 2N7002 2 SYSON#
C241 Q36
10UF_1206
om
.01UF @1M
6.3V +3VS +5VS +12VS +3V +5V +12V +5VALW +5VALW
3
2
+3VS R308 R307
R323 R327 R120 R215 R301 R320 10K 10K
470 470 470 470 470 470
+3VALW Q49 Q32 SUSP SYSON#

C257
.c
+
C269 1UF_0805 2N7002 2N7002
1
U25
8 1 10UF_1206 2 SUSP 2 SUSP 2 SUSP 2 SYSON# 2 SYSON# 2 SYSON# SUSP# 2 SYSON 2
D1 S1 20 SYSON
7 2 6.3V
6 D1 G1 3 Q48 Q21 Q42 Q46 Q43 Q44
5 D2 S2 4 2N7002 2N7002 2N7002 2N7002 2N7002 2N7002
D2 G2
op
3
3
R270
8936 5VS_GATE +12VALW
100K
1
+ C284 R276 2N7002 2 SUSP

10UF_1206 C307
6.3V .01UF @1M Q41
2 2
3
pt
2
+12VALW +12VALW
+5VALW +5VS +12VALW +12VALW
U37
La
8 1
7 D1 S1 2 R355 R356
C455 C456
D1 G1 100K 100K
6 3 .1UF .1UF
5 D2 S2 4 + C378 C453 C452
D2 G2 C391 1UF_0805 1UF_0805_50V 1UF_0805
3
8936 4.7UF_1206 +5V 2 50V 2 50V
+ C390 16V
Q51 Q52
4.7UF_1206 R358 R357
ia
1 NDS352P NDS352P
16V
1
R360 51K 51K
+12V +12VS
100K
5VS_GATE + C450 + C454
1UF_1206_25V 1UF_1206
1
2
as
2 Q53 25V SUSP# 2 Q54 25V
18,20,31,32 SUSP#
C371 2N7002 2N7002
.01UF
3
3
FAN CONN.
3
+5VALW
ah +12V
3
+12VS
U27
8 1 +5V
D1 S1 +5V
7 2
6 D1 G1 3
1
5 D2 S2 4 +5VS R135
8
.R
D2 G2 +2.5VS EN_DFAN# 5 C471
1
+ C
C318 20 EN_DFAN# +
8936 C315 100K 7 2 Q55 D44
+ 4.7UF_1206 1UF_0805 6 B 2SC2411K 10UF_1206
C286 - R371
1
1
D E
4.7UF_1206
2
2
16V R124 2 Q18 U24B 100 C470 1SS355
16V
3
G LM358 FAN1 JP21
2
100K SI2302DS .1UF
2
S 9,20 FAN_SENSE 1
2
w
C179
1
1
+2.5V_CLK
3
SYSON_ALW 2 R132 .1UF D43 2

2
200K 1N4148 3
1
2
Q23 + C163 FAN_CON_3P

C297 2N7002 4.7UF_25V_1206
1
.01UF CC3216 R228

w
2
R223 8.2K
2
2 22K Q22 10K

20,21 MMO_ON DTC124EK
22K
w
4 4
3

Title
B 2A
401202
A B C D E
Q10
+3VALW @SI2301DS +3.3VAUX R346
3 1 1 2
S
JP11
D
+3V
0
1
2 1
1
G
C108 C82 3 2
3
2
@1UF_25V_0805 @1UF_25V_0805 4
5 4
2
6 5 D13
6 MINI_RI# 2
om
3
R103 RJ11/RJ45 RING# 20
PCM_RI# 1
15 PCM_RI#
1 2
20 EN_WOL# +5VALW RB717F
@100K
.c
op
JP17
TIP 1 2 RING
1 2
3 KEY KEY 4 1 2 PCIRST#
3 4 PCIRST# 5,9,13,15,16,19,28
5 6 R69 0
5 6 MINI_RST#
7 8 1 2
7 8 CBRST# 15,16,28
LAN RESERVED 9 10 LAN RESERVED R77 @0
11 9 10 12
11 12
pt
13 14
+3VS_MINIPCI 13 14
15 16
PIRQB# 15 16 +5VS_MINIPCI
L24 17 18 W=30mils
W=40mils9,12,15 PIRQB# 17 18
1 2 19 20 PIRQD#
+3V 19 20 PIRQD# 9,12
21 22
5 REQ#0 21 22 GNT#0 5 +3VS_MINIPCI
CHB1608U121 23 24 W=40mils +3.3VAUX
23 24
La
0603 25 26 MINI_RST# L25
11 PCLK_MINI 25 26
27 28 W=40mils 1 2
27 28 +3V
29 30 GNT#1
5 REQ#1 29 30 GNT#1 5
31 32 CHB1608U121
AD31 33 31 32 34 0603
AD29 35 33 34 36 MDMPME# 21
35 36 AD30
37 38
AD27 39 37 38 40
39 40
ia
AD25 41 42 AD28
AD28 1 2 43 41 42 44 AD26
R99 100 45 43 44 46 AD24 R105
5,9,15,28 C/BE#3 45 46
AD23 47 48 MINI_IDSEL 1 2 AD27
49 47 48 50
AD21 51 49 50 52 AD22
as
AD19 53 51 52 54 AD20 100
55 53 54 56
55 56 PAR 5,9,12,15,28
AD17 57 58 AD18
59 57 58 60 AD16
5,9,15,28 C/BE#2 59 60 IDSEL : AD27
61 62
5,9,12,15,28 IRDY# 63 61 62 64
63 64 FRAME# 5,9,12,15,28
65 66
5,9,12,15,28 CLKRUN# 65 66 TRDY# 5,9,12,15,28
67 68
5,9,12,15,28 SERR#
12,15,28 PERR#
69
71
67
69
68
70
70
72
ah STOP#
DEVSEL#
5,9,12,15,28
5,9,12,15,28
+5VS_MINIPCI
73 71 72 74 C221 C197 C408
1
5,9,15,28 C/BE#1 AD14 75 73 74 76 AD15 C206
75 76 AD13 @1000PF @.1UF @.1UF @10UF_1210
77 78
AD12 79 77 78 80 AD11
2
AD10 81 79 80 82
83 81 82 84 AD9
.R
AD8 85 83 84 86
PCLK_MINI AD7 85 86 C/BE#0 5,9,15,28
87 88
89 87 88 90 AD6
AD5 91 89 90 92 AD4
91 92 +3VS_MINIPCI
93 94 AD2
1
R79 AD3 95 93 94 96 AD0

10 95 96 C152 C93 C423 C413 C67 C157 C183 C177
97 98
1
W=30mils
+5VS_MINIPCI 97 98
w
AD1 99 100 C190

101 99 100 102 .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF 10UF_1210
103 101 102 104
103 104
12
2
105 106
C84 105 106
107 108
33PF 109 107 108 110
w
MOD_AUDIO_MON 111 109 110 112

111 112
2
113 114
115 113 114 116 MOD_AUDIO_MON L27
115 116 MD_SPK 26
117 118 1 2
119 117 118 120
w
MINI_RI# 121 119 120 122 0.5_0805

1 2 W=30mils 123 121 122 124
+5VS 123 124
W=20mils +3.3VAUX
L26 0
C220
1
0603 Mini-PCI SLOT

.1UF
+5VS_MINIPCI
2

Title
AD[0..31] PROPRIETARY NOTE Size Document Number Rev
AD[0..31] 5,9,15,28 T R A D E S E C RET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 2A
401202
+5VALW
C240
1
@.1UF
U19 +5VALW
2
SMD_EE 3 16
SMC_EE 6 1A VCC 4 SMD SMD 2,18,20 +5VALW
SMD_BATT 2A 1Y SMC C202
11 7
1
29 SMD_BATT 3A 2Y SMC 2,18,20
SMC_BATT 14 10 1 2 R145
29 SMC_BATT 4A 3Y
2 13 100K
SMB_SEL 5 1OE 4Y 1 .1UF
2OE NC
om
12 9 U12
SMB_SEL# 3OE NC
15 8 8 1
2
+5VALW 4OE GND 7 VCC A0 2
@QS3125 SMC_EE 6 WC A1 3
SMD_EE 5 SCL A2 4
SDA GND
2
R171 NM24C16
@10K
1
SMB_SEL +5VALW
.c
1
R146
D SMD 2 1 SMD_EE 2 1 100K
1
SMB_SEL# 2 Q29 R379 0 R161 @4.7K
21 SMB_SEL#
G @2N7002 SMC 2 1 SMC_EE 2 1
2
S R380 0 R160 @4.7K
op
3
+5VALW
SMD 2 1 SMD_BATT 2 1
R381 0 R200 @4.7K
SMC 2 1 SMC_BATT 2 1
R382 0 R201 @4.7K
pt
La
+5V_PRN
LPTSLCT
LPTPE
PARALLEL PORT
LPTBUSY
LPTACK#
ia
+5V_PRN
10
CP8
9
8
7
6
RP3 FD1 1 8
10P8R-2.7K D6 LPTERR# 2 7
as
2 1 FD0 3 6
+5VS AFD#/3M# 4 5
RB420D R338 8P4C-220PF
2.2K C401 CP11
R339 220PF LPTACK# 4 5
1
2
3
4
5
33 LPTBUSY 3 6
+5V_PRN LPTSTB# LPTPE 2 7
FD7
FD6
ah 10 LPTSTB#
AFD#/3M#
LPTSLCT 1 8
FD5 R16 8P4C-220PF

FD4 33 1 CP9
R15 14 FD3 1 8
10 LPTAFD#
33 FD0 2 LPTSLCTIN# 2 7
1 2 LPTINIT# LPTERR# 15 FD2 3 6
10 INIT# 10 LPTERR# FD1 3 LPTINIT# 4 5
.R
+5V_PRN R14 LPTINIT# 16
1 33 2 LPTSLCTIN# FD2 4 8P4C-220PF
10 SLCTIN#
AFD#/3M# LPTSLCTIN# 17 CP10
LPTERR# FD3 5 FD4 4 5
LPTINIT# 18 FD5 3 6
LPTSLCTIN# FD4 6 FD6 2 7
19 FD7 1 8
w
FD5 7
20 8P4C-220PF
10
FD6 8
9
8
7
6
RP4 RP96 21 JP10

10P8R-2.7K 8P4R-68 FD7 9 LPTCN-25
LPD3 8 1 FD3 22
w
LPD2 7 2 FD2 LPTACK# 10

LPD1 6 3 FD1 10 LPTACK# 23
LPD0 5 4 FD0 LPTBUSY 11
10 LPTBUSY
LPD7 8 1 FD7 24
LPD6 7 2 FD6 LPTPE 12
w
10 LPTPE
1
2
3
4
5
+5V_PRN LPD5 6 3 FD5 25

LPD4 5 4 FD4 LPTSLCT 13
FD3 10 LPTSLCT
FD2 RP97
FD1 8P4R-68
FD0
LPD[0..7]
10 LPD[0..7]
Title
T H I S S H E E T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND Size Document Number Rev
2A
401202
PROPRIETARY NOTE T R A D E S E C RET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
U S E D B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 星期三, 九月 04, 2002 Sheet 24 of 34
Keyboard CONN. USB_VCCA
1
Q17
@SMO5 +5VS
1
L45 C447 C440 F2 C36
1
+
om
CHB1608U800 220PF 220PF POLYSWITCH_0.75A .1UF C38
1
EXT_CLK 1 2 R340 150UF_E
20 EXT_CLK
2
470K
2
EXT_DATA 1 2 USB_AGND
20 EXT_DATA L44 JP18
CHB1608U800 KBD/PS2_6 10 OVCUR#0
2
KB_VCC
+5VS 4 6
1
F4 2 C407 R341
1
POLYSWITCH_1.1A C436 C432 1 1000PF 560K
1000PF 220PF 3 5
.c
2
L22
2
CHB1608U800
2
1 2
20 KBD_DATA
JP13
1 2 L9
20 KBD_CLK N1608Z301T01 1
op
L21 USB0_D- 1 2
10 USB0_D- 2
CHB1608U800 USB0_D+ 1 2
10 USB0_D+ 3
L8
1
Q19 C176 C175 N1608Z301T01 4
@SMO5 220PF 220PF USB_CONN1
1
pt
L4
1
1
CHB4516G750_1806 C32
4516 .1UF
2
La
USB_VCCB
+5VS
ia
F3 C99
1
+
POLYSWITCH_0.75A .1UF C91
1
R106 150UF_E
470K
2
USB_BGND
as
FIR Module +3VS 10 OVCUR#1
2
1
1
+
C145 R115
C396 1000PF 560K
1
+3VS R1 @10UF 6.3V_A
2
@4.7_1206 R2
ah @4.7_1206
2
FIR_VCC
C2 U1 1/4W
1
JP15
L15
2
@0.47UF 1 10 W=40mils
+ VCC LEDA N1608Z301T01 1
C1 USB1_D- 1 2
10 USB1_D- 2
@10UF 6.3V_A 7 2 USB1_D+ 1 2
10 USB1_D+
2
R334 GND AGND L12 3

4
2
@10K 4 9 IRTXOUT N1608Z301T01

.R
1 2 MODE0 TXD USB_CONN1
1 2 5 8 IRRX
R335 @10K MODE1 RXD
1
IRMODE 3 6
FIR_SEL N.C L43
1
CHB4516G750_1806 C419
2
R333 @HSDL-3600 4516 .1UF

w
@10K
2
1
w
w

Title
B 2A
401202
5 4 3 2 1
CHGRTC
51ON#
Reset Button
1
1
1
+3VALW R309
R316 R317 D38 @100K CDON_BTN# is Low , enable CD_PLAY
100K 560K @RB751V MAIL is High , enable
MAIL
1
JP4
2
2 Q45
2
D1 2N7002 1
3
1N4148 BTN1# 2
1
D D
EMAIL_ON# 1 2 1 2 2 BTN2# 3
3
D2 10K Q1 4
21 MAIL_ACT_LED#
SW3 1 2 DTA114EK D37 C380 Q47 BTN4# 5
1
2
3 10K RB751V 1UF R321 @2N7002 BTN3# 6
3
2 @5.6M 7
20 CDON_BTN#
om
MEOFFBTN 8
1
20 CDON# 20,21 VOL_UP#
DAN202U C3 9
20,21 VOL_DW#
1
1UF_25V_0805 10
3
20 VOL_AMP
2
11
2
1 2 51RST 51ON_RST# 2 4 12
51RST 20 21 PWR_LED# BUT_LOCK# 13
R17 U46 EMAIL_ON# 14
4.7K C507 7SH14 15
20 PS2_CLK
1 2 16
20 PS2_DATA
5
17
.1UF D36 18
.c
51ON_RST# CHGRTC 1 19
3 BUT_LOCK# 20
BUTTON_LOCK# 2 21
21 BUTTON_LOCK# 22
9 IAC_BITCLK 23
9 IAC_SDATAI
op
DAN202U 24
9 IAC_SDATAO
+3VALW 25
9 IAC_SYNC 26
9 IAC_RST# 27
28
1
21 BATT_LOW_LED#
3 1 R195 29
100K D33 30
18 DM_ON
C RB751V 31 C
18 DM_ON#
pt
D21 2 1 BTN1# 32
18 FRDBTN INTERNET# 21
1 ON/OFF 33
ON/OFF 9,20 21 BATT_CHGI_LED#
2
4 2 ON/OFFBTN# 3 34
2 51ON# 35
51ON# 30 23 MD_SPK
D34 36
SW2 +3VALW DAN202U RB751V MONO_IN_R 37
La
HCH SMT1-02 2 1 BTN2# 38
18 REVBTN E_MAIL# 21 19 CD_AGND 39
19 CDROM_L
40
1
1
19 CDROM_R
R207 C229 41
1
1
4.7K C 1000PF D19 D32 42
+3VS
RLZ20A RB751V 43
2
2
2 1 BTN3# 44
18 STOPBTN BUTTON3# 21
1 2 2 22K 45
20 51ON
2
ia
B 46
+5VCD
R209 E 47
33K Q30 22K D39 48
DTC124EK RB751V +5VALW 49
2 1 BTN4# 50
18 PLAYBTN BUTTON4# 21 +5VS
3
D
1
as
2 HEADER 50
G
1
S
Q37 C304 C295 C287
3
2N7002 10UF_1206 10UF_1206 10UF_1206
2
B
+3V
ah B
+3V
1
21 BEEP# R261
100K
System Window Connector
.R
10
14
R266 U31B
8.2K
2
9 8 1 2 3 4 1 2 1 2
JP3
74LVC14 C316 R273 1
1
+3V POWER
+5VALW 1
U28C C314 +3V POWER 1UF 560 2
9,20,29 ACIN 2
74LVC125 .22UF 3
21 S W_CLK/HDD_LED# 3
7
4
21 S W _ DATA/CD_FDD_LED#
2
5 4
20 CAPS_LED# 5
6
20 ARROW_LED# 6
7
20 NUM_LED# 7
8
MONO_IN_R 8
1 2 1 2 9
w
15 PCM_SPK# +5VS 9
10
+3VS 10
C327 R287
1UF 560 96212-1011S
LID_SW# 3 SW1 1
20,21 LID_SW#
+3V
w 14
A U31C A
4 2
5 6 1 2 1 2
9 SPKR HORNG CHIH
74LVC14 C320 R279
1
+3V POWER 1UF 560 R282 D27

10K RB751V Compal Electronics, Inc.
7
Title
2
T H I S S H E E T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
B 2A
401202
5 4 3 2 1
A B C D E
1 +3V CPU_CORE 1
+12V
1 2
1
C268
om
R224 R242 .1UF
150K_1% 56K
8
3 Q35
1
2
2
+ 1 1 2 2 2N7002
2
1
- R245
1
U24A 10K
3
R229 C273 LM358
4
RTC BATT 100K_1% 0.33UF_0805 R244
10K
+3V
.c
2
+3V +3V
R297
- BATT1 + 47K
14
14
2 1 +RTCBATT +3V CPU_IO
op
+5V 9 8 11 10 RSMRST# RSMRST# 9
1 2 R296 U31D U31E
1
RTCBATT 330K C347 74LVC14 74LVC14
C238 .1UF
1
+3V POWER
7
D35 R183 R194 @.1UF
@150K_1% @56K +3V
8
HSM1265
3
1
2 +3V POWER 2
pt
+
+RTCVCC 1 2 Q34 1 2
2 @2N7002 C334
1
- .1UF
3
U20A
5
3
R189 C239 @LM358 +5V 2
CHGRTC
4
@100K_1% @0.33UF_0805 4
La
1
2
2
J4 C342 +3V
JOPEN .1UF R293
47K U32
1
3
14
7SH32FU
+3V
13 12
+3V +2.5V_CLK +5V
ia
R294 U31F
1
330K C346 74LVC14
R217 .1UF
1
1
+3V POWER
7
10K
DC/DC INTERFACE R182 R191
as 2
@100K_1% @56K
5 8
1
2
+ 7 2 Q33
J2 6 @2N7002 +3VS
1
-
2 1 +12VALW (120mA)
+12VALWP U20B
1
3
JOPEN/+12V R181 C230 @LM358
4
@200K_1% @0.33UF_0805 +3VS

3 J1
ah 3
1
2
1 2 +5VALW (5A) C328

+5VALWP .1UF
1
PAD-OPEN 4x4m
2
+5VS 1 C337
J3 2,9,32 VR_POK
4 .1UF
1 2 +3VALW (4A) 2
+3VALWP EC_HPOWON 5,9,20
2
1
.R
13
U33
PAD-OPEN 4x4m R281 7SH08FU U29
2
3
240K 1 7 12 11
VCC
MR# RST# SPWROFF# 5,9,20
J5
2 1 CPU_IO (2.7A) 4 8
+CPU_IOP PFI RST
2
U28D
1
3MMA/CPU_IO 6 5 74LVC125 R271
NC PFO#
w
10K
GND
1
+3V POWER
J6 R280
1
2 1 +2.5VS (2A) 100K C317 C324 MAX708

+2.5VSP .01UF .1UF
2
3MMA/+2.5VS
2
2
w
2
w
4 4

Title
B 2A
401202
A B C D E
A B C D E
+3V
+3V +3V
1
C65 C72 C107 C102
AD[0..31] R66 C69 C73 C104
5,9,15,23 AD[0..31]
2
2
4.7K .01UF .01UF .01UF .01UF .01UF .1UF 4.7UF_10V_0805
+3V R68
2
4.7K R46
R408 4.7K C45 C106 C103
4.7K .1UF .1UF .1UF
1
1
4 4
U3
TSB43AB22
20
35
48
62
78
87
86
96
10
11
+3V
VDDP
VDDP
VDDP
VDDP
VDDP
CYCLEIN
TEST7
TEST17
TEST16
CYCLEOUT
15
om
AD31 22 DVDD 27
AD30 24 PCI_AD31 DVDD 39
PCI_AD30 DVDD
1
AD29 25 51 C105 C405 C40 C406
AD28 PCI_AD29 DVDD
26 59
PCI_AD28 DVDD +3V .1UF
AD27 28 72 .1UF .1UF .1UF
2
AD23
AD22
37
38
PCI_AD24
PCI_AD23 TSB43AB22 PLLVDD
AVDD
1
2
PCI_AD22 AVDD +3V
.c
AD21 40 107
AD20 41 PCI_AD21 AVDD 108
AD19 42 PCI_AD20 AVDD 120
AD18 PCI_AD19 AVDD
43
AD17 45 PCI_AD18 PCI BUS INTERFACE R36
AD16 46 PCI_AD17 106 1 2 1K
op
AD15 61 PCI_AD16 CPS
AD14 63 PCI_AD15 C39
AD13 65 PCI_AD14 125 1 2 1UF_10V_0603
AD12 66 PCI_AD13 PHY PORT 2 TPBIAS1 124
AD11 67 PCI_AD12 TPA1+ 123 R35
AD10 69 PCI_AD11 TPA1- 122 1 1K 2
AD9 70 PCI_AD10 TPB1+ 121 1 2
PCLK_1394 AD8 PCI_AD9 TPB1- R342
3 1 2 71 3
PCI_AD8
pt
AD7 74 BIAS CURRENT 118 1K
R70 C59 AD6 76 PCI_AD7 R0
22 10PF AD5 77 PCI_AD6
AD4 79 PCI_AD5 R34
AD3 80 PCI_AD4 6.34K_1%
AD2 81 PCI_AD3 119
AD1 82 PCI_AD2 R1 1 2
La
AD0 84 PCI_AD1 6 C55
C/BE#3 34 PCI_AD0 OSCILLATOR X0 10PF
5,9,15,23 C/BE#3 PCI_C/BE3
C/BE#2 47 Y1
5,9,15,23 C/BE#2 PCI_C/BE2
C/BE#1 60
5,9,15,23 C/BE#1 PCI_C/BE1
C/BE#0 73 5 24.576 MHz
5,9,15,23 C/BE#0 PCI_C/BE0 X1
PCLK_1394 16 1 2
11 PCLK_1394 PCI_CLK
R102 GNT#2 18 C44
5 GNT#2 PCI_GNT
100 REQ#2 19 3 1 2 10PF
ia
5 REQ#2 PCI_REQ FILTER FILTER0
AD24 1 2 36 C56
FRAME# 49 PCI_IDSEL 4 .1UF R55
5,9,12,15,23 FRAME# PCI_FRAME FILTER1
IRDY# 50 220
5,9,12,15,23 IRDY# PCI_IRDY
TRDY# 52 92 1 2
5,9,12,15,23 TRDY# PCI_TRDY EEPROM 2 WIRE BUS SDA
DEVSEL# 53
5,9,12,15,23 DEVSEL# PCI_DEVSEL
as
STOP# 54 91 1 2
5,9,12,15,23 STOP# PCI_STOP SCL
PERR# 56 R56 TPBIAS0
12,15,23 PERR# PCI_PERR
PIRQC# 13 POWER CLASS 99 220 R23
9,12 PIRQC# PCI_INTA PC0
2
1394_PME# 21 98 56.2_1%
21 1394_PME# PCI_PME PC1
SERR# 57 97 C31
5,9,12,15,23 SERR# PCI_SERR PC2
PAR 58 1UF_10V_0603
5,9,12,15,23 PAR PCI_PAR
12 116 R24 JP12
1
5,9,12,15,23 CLKRUN# PCI_CLKRUN PHY PORT 1 TPBIAS0
PCIRST# 85 115 56.2_1% TPA_0+ TPB_0- R4 1 2 0 TPB0- 1
5,9,13,15,16,19,23 PCIRST# PCI_RST TPA0+ 1
2
ah TPA0-
TPB0 +
114
113
112
TPA_0-
TPB_0+
TPB_0-
TPB_0+
TPA_0-
TPA_0+
R3
R13
R12
1
1
1
2
2
2
0
0
0
TPB0+
TPA0-
TPA0+
2
3
4
2
3
2
+3V TPB0 - 4
R345 @2.2K
FOXCONN-UV31413
2 1 94 R52 1 2 220
C409 @4.7UF_0805 TEST9 95 R40 1 2 220 R19 R20
14 TEST8 56.2_1% 5.11K_1%
15,16,23 CBRST# G_RST
R393 0 101 R38 1 2 220
.R
89 TEST3 102 R37 1 2 220
90 GPIO3 TEST2 104 R343 1 2 220
PLLGND1
PLLGND2
GPIO2 TEST1 R344 220 R18 C30

105 1 2
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
TEST0 56.2_1% 220PF

2
109
110
111
117
126
127
128
103
17
23
30
33
44
55
64
68
75
83
93
8
9
R63 R62
220 220
1
w 2
For TSB43AA22
C81 C89 C46 C54
w
.1UF @0 @0 .1UF C46,C89

change to 0
1
1
ohm to short 1
to GND
TSB43AB22 USE
Title
T H I S SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND SCHEMATIC, M /B LA-1281
T R A DE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
401202
D E P A RTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B 2A
U S E D BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A B C D E
A B C D E
PF1 7A
PJP1
+5VALWP +3VALWP BATT+
VMB 1
PR114 PF2 @5A VBS
BNI/ILI# 2
3 @10K PC1 PC2 PC3 PC4 TS 3 PR2
PR3 4.7UF_1210_25V 4.7UF_1210_25V 4.7UF_1210_25V EEPROMVCC 4
4.7UF_1210_25V 51AVCC BSCL 5
1 BQ_BATT/SMD
PR1 6.49K_1% BQ_BATT/SMD 6 @0
2 200 +3VALWP 1 2 3 7
20 BNI/ILI# 8
PR115 PR4 0 1 PQ1
PD1 25063A-08G1-C
PR6 @SI2303DS
@BAS40-04 SMD_BATT 24 +5VALWP 10K 2 PR5 1 3 +5VALWP
1
0 1K 1
PR116 VS
PZD1 3 PD2
BQ_BATT 20 PR7 BAS40-04
RLZ10C
2
@0 1 BSCL PR8
1 2 20 BATT_TEMP 51AVCC
2 200 PR9 @10K
om
2.2K_1206
PU2B
PD3 SMC_BATT 24 3.3V FOR 87570 AVCC LM358A
@BAS40-04
PC5 VS
8
PC6
1UF_25V_1206 5
4700PF 7 + PR10
2 1 6 PD4
DBV - AS2431 PR11 @0
PR12 +3VALWP
PR14 1.62K_0.1%
3
100K_1%
.c
4
3
301K_0.1%
PD5 PR13 PC7 2
BAS40-04 100K_1% DQ_BATT# 21
0.1UF_0805_25V
1
PU1B PD6
PR15
LM358A 1SS355
1
8
op
5 PR16 5.11K_0.1%
1
+
7 PR17 PU2A 150K_0.1%
4
2
6 10K - 2
-
PC8 1
20 VBATT 3
1UF_25V_1206
+
PR19 LM358A
4
2
PC9 100K_1% PR18 34.8K_1% 2
150PF
pt
PR20
8
PC10 DBV VBS
@2.2K
100PF
PR21 15K_0.1%
VS
PR23
PR22 PU4A 1K_1%
La
100K_1%
LM358A
8
VIN 3
+
1
PJP2 2DC-S315-B01 PD7 PL1 2
-
EC10QS04 PF3 5A CHC4532UX PR24
1
1 1 2 1M_0.1% PR25
453K_1%
ia
4
3
1
2 PC14 PC15
3 PC12 PC13 100PF 1000PF
2 1000PF 100PF PL2 PQ2
CHC4532UX D 2N7002
1
1 2 PC11 2
as
2
1000PF G
S
3
3
ah +3VALWP
PD8
3
PR26 1 2
30 LI/NIMH# 210K_1%
30 ACOFF#
VS 1SS355
PR27
10K
.R
ACIN:VH:17.8V/VL:16V
VIN
D
1
PR28 402K_1% LI/NIMH# 2 PQ3
PACIN 30 G 2N7002
PR29 S
174K_1%
1
w
3
PR30 PU1A PQ4
10K
DTC115EK
8
LM358A
3 PR31 PR32 3.3K BNI/ILI# 2 100K
+
1 ACIN 9,20,26
w
2 PR34
+RTCVREF - 5.1K D 47K
1
100K
PR33 2 PQ5
PR35 10K G 2N7002
4
3
PC16 45.3K_1% S
w
1000PF
1
3
PZD2
PC17 RLZ3.6B
2
4
0.22UF_0805_16V 4

Title
B 2A
U S E D B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401202
A B C D E
A B C D E
P4
ACIN: CC:2.87A/ OCP:3.48A
P1 P2 B+ C h a r g er : CC:2.2A CV:16.8V for LI-ION/CV:14.4V for NI-MH
PR37
P1 1 2
0.015_2512_1%
PQ6 PQ7 PQ8 PC18 2N7002
VIN
8 1 1 8 1 8 1UF_0805_25V PR36 PQ9
7 D S 2 2 S D 7 2 S D 7 110K_1% D
1
6 D S 3 3 S D 6 3 S D 6 2
D S S D S D LI/NIMH# 29
DBV 5 4 4 5 4 5
D G PR38 G D G D G
PR39 PR40 PR41 200K PU3A S
10K SI4835DY SI4835DY SI4835DY PU3B
150_1% 150_1% PR43
3
LM358A LM358A
8
PU4B 10K PD9 PD10 PR42
1 51AVCC 5 RB751V RB751V 3 24K_0.5% 1
PR44 47K + 7 1 +
8
LM358A
5 22K PR45 6 2
+ PR46 VIN - -
7
1
150K
6 PR47 PR48
-
2.2K_1206 Charger : CC:2.2A CV:14.4V
om
ACOFF# ACOFF# 29
PR50 2.2K_1206
4
PC19 D P4
1
47K PC21 VMB
2
100PF PQ10 2 PACIN PR49 PQ14
0.022UF_0805
D 2N7002 80.6K_1% TP0610T
1
1
G PR51
PQ12 2 PQ13
3
S PR52
2N7002 PD11 100K 2 1 3 TP0610T 2 100K
G
3
2 1 4.7K +5VALWP
S PC20
0.22UF_0805_16V
3
100K PQ11 P3
2
1SS355 DTC115EK
.c
1
2
CP PQ15 PL3 PR53
ACOFF 20
3
1 8 SPC-1207P-220
1
47K
2 S D 7 1 2
S D P4
PR54 3 6
4 S D 5
G D
op
2
11.5K_1% PD12 PR55 100K 2
1
RLS4148 PR57 SI4835DY PR56
2
0.02_2512_1%
PC22 PC23 PC24 1.5K_1%
2
4.7UF_1210 25V 4.7UF_1210 25V 4.7UF_1210 25V PU5A 100K
47K DTC115EK
PR58 VMB LM358A
VS
8
6.8K_0805 PQ16
3
2 3
1
1
+
2 PD13 1 PR59 2
1 PR60
pt
EA60QC04 2 2 1K_1%
PU6A
1000PF
PQ17
3
-
PC25
1.5K_1%
3
PR62 2SC2411K DBV
8
1
LM358A
10K_1% 3 PR61
2
+
1
20 OCP 1K_1%
2 PC28 PU5B
-
La
1UF_0805_25V 1 2
LM358A
8
PQ18 PC26
2
PC27 2SA1036K 5
4
+
.1UF PR63 100PF 7
4.7UF_1206_16V
61.9K_1% 6 -
P1 D
1
PC29
PQ19 2
2N7002
1
G
4
ia
PC30
2
S
PD14 100PF
3
D
2
RLS4148 2
5
G
PR64 PU7 S
1
as
1.5K TL5001 PQ20
PD15
3
2N7002
RLS4148 PR65 VS
4
2 1
P4 33_1206
4
CHARGER_D
PQ21 PU6B
PR66 PZD3 SI2303DS PQ22
3
3 1
ah TP0610T LM358A 3
8
2 1
VS
VIN 3 1 5001-3 5 + +3VALWP
200_1206 7
RLZ4.3B 6 -
PC32
1
PR67
2
PC33 .01UF_50V_0805 PD16

100K
2
0.1UF_0805_25V
1
1SS355
4
PR68 PR72
.R
PR69 PR70 10K_1% 10K
100K PC31 10K 1 2 1 2 BATT_CHGI 20
2
0.1UF_0805_25V
PR71
2
PR74 1 2 16.9K_1%
26 51ON# 100K PC36
PR73 PC34 PR75 4.7UF_1206_16V
1
22K PD17 10K
w
PC35 1000PF
0.22UF_1206_25V 1 2 PR76
VMB 22K_0.5%
PR77
1SS355 47K
1
+5VALWP
2
2N7002
w
PQ25
1
PD18 PQ23 D
1
CHGRTC RTC: 3.5V FSTCHG 1 2 2 100K DTC115EK 2
1
21 FSTCHG
PU8 G
PR78 100K 2
w
S-81235SG 1SS355 S TRICKLE 21

100K 100K_1%
+RTCVREF
3
PC37
4 .1UF 100K 4
1 PR80
3
2
3 2 PACIN 2 PQ24
3 2 29 PACIN DTC115EK
47K
3
PR79 PZD4
1
200_0805 PC39
1
PC38 RLZ16B
2
4.7UF_1206_16V 4.7UF_1206_16V
1
Title
B 2A
401202
A B C D E
A B C D E
B+
PR81
10_1206
B+
P6 +12VALWP
PQ27 PD19 RB751V
SI4800DY 1 2
PC41 PD20 PC40

4.7UF_1206_16V PC42
1 RB751V 1
4.7UF_1206_25V VL PL4 2.2UF_1206_25V
2 1
8
7
6
5
8
7
6
5
BLM32A06_3216
1 2
D
D
D
D
D
D
D
D
PQ26
SI4800DY PC43
1
PC44 4.7UF_1206_25V
om
PC45 PC48 PD21
PC46 PC47 1UF_0805_25V EC11FS2
G
S
S
S
S
S
S
4.7UF_1210 25V 4.7UF_1210 25V 0.1UF_0805_25V 470PF_0805_100V
PC50
1
2
3
4
1
2
3
4
22
21
PC49 1 PR82 2
0.1UF_0805_25V
4 2
25 4
BST3 12OUT
V+
VL
5 47_1206
2
0.1UF_0805_25V VDD
27 18
1
DH3 BST5 16 PT1
PU9 DH5
PD22 26 17 B+ P7 CDRH124B
24 LX3 LX5 19
.c
EC10QS04 PQ28
DL3 DL5 20
PGND SI4800DY
P5 14
3
1 CSH5 13
2
2 CSH3 CSL5 12
8
7
6
5
3 CSL3 FB5 15
MAX1632
D
D
D
D
FB3 SEQ
op
PL5 10 9
8
7
6
5
SKIP# REF
10UH_SLF12565T 23 6
D
D
D
D
SHDN# SYNC 11 PC51
7 RST# PC52 4.7UF_1210 25V
G
S
S
S
TIME/ON5 PQ29
4.7UF_1210 25V SI4800DY
1
PD24 28
G
S
S
S
RUN/ON3
1
2
3
4
GND
PR83 P9
2 EC10QS04 PZD5 2
1
2
3
4
pt
RLZ4.3B 0.015_2512_1%
1
+3VALWP
PD23
8
EC10QS04
PR84
PC55 0.015_2512_1%
47UF_D_6.3V_SP
1
+ +
PC54
2
La
1
+
150UF_D_6.3V_KO
2
2
PR85 +5VALWP
PC53 100K
150UF_D_6.3V_KO SUSP#
18,20,22,32 SUSP# 51AVCC PZD6
ia
1
PC61 PC57 RLZ6.2C PD25
1
+ + +
4.7UF_1206_25V EC10QS04
0.01UF
2
as
51AVCC
PC58 PC59 PC60
47UF_D_6.3V_SP 47UF_D_6.3V_SP 150UF_D_6.3V_KO
PR86
10K
3
33 MAX1632_SHDN#
ah 3
PC62
1000PF
.R
w
w
w
4 4

Title
B 2A
401202
A B C D E
A B C D E
B+
PR87 PD26
0 MAX1711VDD 2 1 MAX1711BST
1
+5VALWP
PL7
PR88 RB751V PQ30 PQ31 PQ32 FBM_L11_322513_201_LMAT
20
SI4894DY SI4894DY SI4894DY
PC64
2
0.22UF_0805_16V CPU_B+
PC63
0.1UF_0805_25V PC91 PC65 PC66 PC67 PC68 PC92
8
7
6
5
8
7
6
5
8
7
6
5
1 1
D
D
D
D
D
D
D
D
D
D
D
D
4.7UF_1210_25V 4.7UF_1210_25V 4.7UF_1210_25V 4.7UF_1210_25V 4.7UF_1210_25V 4.7UF_1210_25V
15
7
1 PC69
G
S
S
S
S
S
S
S
S
S
0.1UF_0805_25V
VDD
VCC
V+
om
PR89 PR90 PC93 PC94
1
2
3
4
1
2
3
4
1
2
3
4
VCC_ON 0 2 22 2.2
SHDN# BST 4.7UF_1210_25V 4.7UF_1210_25V
PR91
SUSP# 21 24 MAX1711DH
18,20,22,31 SUSP# SKIP# DH
PL6 HK-RM136-22A0R7
0 VID0 20 23 MAX1711LX 2 1
D0 LX CPU_CORE
PR92
.c
100K
VID1 19 13 MAX1711DL
8
7
6
5
8
7
6
5
8
7
6
5
1
D1 DL PQ33 PQ34 PQ35 PD27 + +
D
D
D
D
D
D
D
D
D
D
D
D
SI4404 SI4404 SI4404 BYS10-45
VID2 18 PU10 14
D2 MAX1711 PGND
op
G
G
S
S
S
S
S
S
S
S
S
2
VID3 17 3
1
VID[0..3] D3 FB PD28
3 VID[0..3]
1
2
3
4
1
2
3
4
1
2
3
4
BYS10-45 PC70 PC71
5 16 220UF_D_4V
CC D4
PC73 220UF_D_4V
2
2 0.22UF_0805_16V 9 4 CPU_CORE 2
REF FBS
pt
PR93 PR94
0 8 11 GNDS 1K_1%
+5VALWP TON GNDS
PC72
PR123 PR112
1
1
220PF
52.3K_1% 39K_1% 6 12
ILIM PGOOD
La
PU12 1
CPU_CORE AMS1503
GND
Sense
+3VALWP +2.5VSP
2
2
PR95 5 3
10
GNDS Vpower Output

D 150K_1%
1
TUAL5 PQ40 Control Adjust

2
ia
G PQ38
2N7002 4 2
1
S VR_POK 2,9,27 PC76 +5VALW TP0610T
1
3
10UF_1210_16V 3 1 PC77
10UF_1210_16V
2
as
2
+3V
PQ36 PR113 PC79
SI3441DV 100K 0.1UF
+3V
PU11 +CPU_IOP
4
5
6
3 AMS1085CD
ah 3
1
D
D
S
3 2 PR117 PR118
IN OUT
ADJUST 10K 22K PR98
G
D
D
PR96 SUSP# 0 2 100K

1 PU14A
PC74 PR97 VCC_ON
3
2
1
200K PC75 100_1%
8
LM393
0.1UF 4.7UF_1206_16V 3 PQ39 100K
.R
+
1
2 PC86 DTC115EK
1
VCMOS
3
-
4.7UF_1206_16V
PR99 PR119 PC87
1
4
2
PR100 20_1% PR120 10K 4.7UF_1206_16V
1K
w
10K PR121
2
PU15 2.37K_1%
PC78 4 5
1
100PF 2200PF PC88 VIN VOUT

2 6
PR101 PQ37 DELAY SENSE
w
VR_ON 2 100K DTC115EK 7 1

ERROR CNOISE
0 D VR_ON 8 3 PR122
1
21 VR_ON ON/OFF# GND

PQ41 2 TUAL5 PC89 10K_1%
1
100K TUAL5 2,3,11
2N7002 SI9182AD
w
G
S .1UF
3
2
PC90
4 3,11 VTTPWRGD 4
1000PF

Title
B 2A
401202
A B C D E
5 4 3 2 1
D For CPU thermal protection 90/60 VS D

度C
PR102
51AVCC 47K_1%
om
PR103 PR104
1K
5.62K_1%
8
3 MAX1632_SHDN# 31
+ 1
PR105 2 - PU13A
3.65K_1% LM393
4
PC80 PC81
.1UF
.c
PC82 PTH1 1000PF
.1UF
10K_1%_0805 PR106
100K_1%
op
51AVCC
PR107
100K_1%
C For Battery thermal protection 83/54 C

度C
pt
PR108
47K_1%
51AVCC
La
PR109 PR110
6.04K_1% 1K
8
5 + 7
6 -
PR111
ia
3.65K_1% PU13B
PC83 PC84
LM393
4
.1UF .1UF
PTH2 PC85
as
10K_1%_0805
1000PF
B
ah B
.R
w
w
w
A A
Title
S C HEMATIC, M/B LA-1281

B 401202 2A

5 4 3 2 1
CY23 PIR LIST
08/28/01 Written by Jerry
P 11: Add Q61 and R407 for VTTPWRGD
* * *********** Rev1.0 PIR List **************
P26: Add @ at R309 and Q47

Add C507 and U46
Change value of R317 to 510K
P 2 7 : Remove @ at R224, R229, R242, R245, R244, C273, and Q35
P 32: Add PC91, PC92, PC93, and PC94.
om
P 0 6 : Change value of RP34, RP50, RP54, RP62, RP38, RP33, RP57,
R P61,RP53, and RP56 to 16P8R-22
P 26: Change value of R317 to 560K
P 29: Change value of PR29 to 174K_1%

P 32: Change value of PR123 to 52.3K_1%
.c
* * *********** Rev2.0 PIR List **************
P 02: Change value of R27 to 180

Delete R395
op
R 395's Pin 1 tie to RP98's pin5
P 03: Change value of R353 to 56.2 1%
P 2 8: Add R408 between +3V and pin 87 of U3
P 1 1 , P13, P28: Change footprint of Y1, Y2, and Y3

P 23: Change footprint of JP11
pt
P 28: Change footprint of JP12
P31: Change footprint of PL5
P26: Change footprint of SW1
La
P 0 2 : Add @ at RP25, RP24, RP28, RP27, RP31, RP30, RP 42, RP41,
R P 4 0 , RP43, RP44, RP45, RP46, RP47, RP48, RP49, RP7, RP1, RP6,
R P 1 4, RP20, RP19, RP22, RP9, RP10, RP11, RP8, RP2, and R7
P06: Remove @ at R164
P11: Add @ at R176
ia
as
ah
.R
w
w
w

Title
B 2A
401202
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Compal La-1281 R2a Schematics

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A B C D E

Compal confidential Block Diagram

Slot 0& 1 Slot 0 S D ( 0..15) Resistor

I/O Buffer KBD

Power Circuit BIOS Touch Pad

RS#2 AK28 RS1# DEP1# A33 CPURST# 1 2 RP22 RP47 RP31

C533 reserve for

Intel Celeron THERMDA AL31 AG1 1 2 C94 HA#7 7 2 HA#6 7 2 HD#21 2 7

1 * For Intel New CPU 1

00 66MHZ CPU_IO Compal Electronics, Inc.

C501 220UF_E * For Intel New CPU

K32 H34 CPU_CORE FC-PGA370

VCC43 VSS56 I1D

AM12 AM14 CPU_CORE

FMMT3904 B18 X36

D36 VCC69 + C140 0 6X ON ON ON OFF

D6 .1UF SB_NMI 1 2 NMI

E17 VCC72 VEDT/RSVD* 0 6.5X ON ON OFF OFF

CPU_CORE 7.5X ON OFF OFF OFF

150_1% C70 C83

* For Intel New CPU

220UF_E 220UF_E 220UF_E 220UF_E 220UF_E 220UF_E

6.3V 6.3V 6.3V 6.3V 6.3V 6.3V Title

C158 C153 C148

Compal Electronics, Inc.

SCHEMATIC, M/B LA-1281

C502 C503 C504 C505 C506 F10 AC1 H3

D42 AC22 SUS_STAT# C1 .1UF

NC2 PCIRST# PCIRST# 9,13,15,16,19,23,28 GNDDAC

RP63 .1UF 1000PF

SCHEMATIC, M/B LA-1281

Y26 M23 MDD0 MDD5 8 9 MD5

L21 MD59 AC17 MDD60 MDD57 4 13 MD57

MA2 6 11 MMA2 RP53

1 2 T=40iml MA12 4 13 MMA12 16P8R-22

+3V +3V +3V

+3V +3V +3V

Compal Electronics, Inc.

SO-DIM 144 PINS

RCAS#[0..7] +3V +3V

MD23 99 DQ22 DQ54 100 MD31

+3V MD50 125 126 MD58 +3V

IRDY# F19 FRAME SMBALT/GPI6 V9 SUSA#

5,12 PCIGNT# GNT GND +3VS

C17 7 2 PCI_RST# 2 R318 @10K

B17 PINTC W14 6 3

100MHz SDRAM on board

1 2 R10 VCCSUS T13

D +RTCVCC VBAT TSEN2 D

R8 VCC VCCHWM C383

C263 C278 C277 C279 C360

Date: 星期三, 九月 04, 2002 Sheet 9 of 34

U30B The components most place cloely 686B

IRQ4 G3 IRQ3 DSKCHG

+3VS VCC GND

C379 C366 C375 C373 VCC GND

+3VS SDATA SDRAM2 CLK_SDRAM2 8