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Li et al., 2003 - Google Patents

Selective Deposition of C-axis Oriented Pb5Ge3O11 on the Patterned High k Gate Oxide by MOCVD Processes

Li et al., 2003

Document ID
6002631211319976438
Author
Li T
Hsu S
Ulrich B
Evans D
Publication year
Publication venue
MRS Online Proceedings Library (OPL)

External Links

Snippet

For the high density FeRAM applications, the integration process-induces damages such as etching damage that degrades the properties of FRAM devices and the high surface roughness of ferroelectric thin film that results in the difficulty for alignment are critical issues …
Continue reading at www.cambridge.org (other versions)

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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
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