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WO2017166868A1 - 一种基板及移动终端 - Google Patents

一种基板及移动终端 Download PDF

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Publication number
WO2017166868A1
WO2017166868A1 PCT/CN2016/109540 CN2016109540W WO2017166868A1 WO 2017166868 A1 WO2017166868 A1 WO 2017166868A1 CN 2016109540 W CN2016109540 W CN 2016109540W WO 2017166868 A1 WO2017166868 A1 WO 2017166868A1
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WO
WIPO (PCT)
Prior art keywords
resin layer
substrate
circuit pattern
thin resin
component
Prior art date
Application number
PCT/CN2016/109540
Other languages
English (en)
French (fr)
Inventor
鲍宽明
Original Assignee
华为技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to EP16896636.4A priority Critical patent/EP3426010A4/en
Publication of WO2017166868A1 publication Critical patent/WO2017166868A1/zh
Priority to US16/145,966 priority patent/US20190037701A1/en

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/183—Components mounted in and supported by recessed areas of the printed circuit board
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H05K1/186—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or connecting to patterned circuits before or during embedding
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/421—Blind plated via connections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0183—Dielectric layers
    • H05K2201/0191—Dielectric layers wherein the thickness of the dielectric plays an important role
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0364—Conductor shape
    • H05K2201/0376—Flush conductors, i.e. flush with the surface of the printed circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10439—Position of a single component
    • H05K2201/10477—Inverted
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10507—Involving several components
    • H05K2201/10545—Related components mounted on both sides of the PCB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10742—Details of leads
    • H05K2201/10886—Other details
    • H05K2201/10901—Lead partly inserted in hole or via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954—Other details of electrical connections
    • H05K2201/10977—Encapsulated connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0147—Carriers and holders
    • H05K2203/0156—Temporary polymeric carrier or foil, e.g. for processing or transferring
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/0207—Partly drilling through substrate until a controlled depth, e.g. with end-point detection
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1305—Moulding and encapsulation
    • H05K2203/1316—Moulded encapsulation of mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1305—Moulding and encapsulation
    • H05K2203/1322—Encapsulation comprising more than one layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1461—Applying or finishing the circuit pattern after another process, e.g. after filling of vias with conductive paste, after making printed resistors
    • H05K2203/1469—Circuit made after mounting or encapsulation of the components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/15—Position of the PCB during processing
    • H05K2203/1572—Processing both sides of a PCB by the same process; Providing a similar arrangement of components on both sides; Making interlayer connections from two sides
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • H05K3/0035—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material of blind holes, i.e. having a metal layer at the bottom
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H05K3/282—Applying non-metallic protective coatings for inhibiting the corrosion of the circuit, e.g. for preserving the solderability

Definitions

  • the present invention relates to the field of electronic technologies, and in particular, to a substrate and a mobile terminal.
  • Embedded Substrate A new packaging technology that embeds components in a substrate/PCB according to substrate/PCB processing technology and component assembly characteristics; it enhances product integration and reduces module form factor; and improves product reliability And electrothermal performance.
  • the device embedded in the resin layer is embedded.
  • the buried structure in the prior art is difficult to guarantee due to the difference in height of the plurality of devices.
  • the pad of the device has the same height as the copper layer on the surface of the substrate, which results in different depths of the holes to be opened when the device is connected.
  • the processing depth of each hole is different, which greatly affects the substrate.
  • the working efficiency during processing and the difference in the buried depth of the components cause the components to differ in the size of the pads when they are connected to the circuit pattern. When the circuit pattern is formed, the connection effect between the components and the circuit patterns is affected.
  • the invention provides a substrate and a mobile terminal for improving the connection effect between the components on the substrate and the circuit pattern.
  • the present invention provides a substrate having an electrical pattern and a plurality of components, the substrate further comprising: a resin layer and a thin resin layer, the plurality of elements a member is embedded in the resin layer, and an end surface of the component for connecting to the circuit pattern exposes the resin layer and is flush with a surface of the resin layer; the thin resin layer is attached a side of the resin layer on which the component legs are exposed, the thin resin layer is provided with a through hole corresponding to each leg, and the circuit pattern is attached to a side of the thin resin layer facing away from the resin layer, and The circuit pattern is connected with pads that extend into each of the through holes and are electrically connected to the legs.
  • the substrate further includes a protective layer covering the thin resin layer, and the protective layer is provided with a plurality of window structures, and the plurality of window structures and the external port of the circuit pattern are A correspondence.
  • the substrate is wrapped by the protective layer, thereby preventing the copper wire from being oxidized by the circuit pattern lines on the substrate, thereby improving the use effect of the entire substrate.
  • a circuit pattern on the substrate is distributed over the two thin resin layers, and the two-layer circuit patterns are connected by metallized via holes penetrating the resin layer and the thin resin layer, and
  • the legs of each component face one side of the circuit pattern. That is, the circuit pattern on the substrate is arranged in two layers, and is disposed on opposite surfaces of the substrate, thereby improving the distribution efficiency of the circuit pattern, and when the components are disposed, the legs of the component are oriented toward the corresponding connected circuit patterns.
  • the connection point simplifies the layout of the circuit pattern, reduces the length of the trace, and improves the utilization rate of the substrate, thereby improving the overall effect of the substrate.
  • the thickness of the thin resin layer is from 20 ⁇ m to 30 ⁇ m. Thereby, the depth of the punching and the occupied area of the pad can be effectively controlled, and in a more specific arrangement, the thickness of the thin resin layer is 20 ⁇ m.
  • the present invention also provides a mobile terminal including a housing and a power module disposed in the housing and a control module coupled to the power module, wherein the power module and the control module respectively include The substrate according to any of the above.
  • the same resin is used in the same plane to pass the thin resin; the pad to the copper layer has the same depth requirement, and the pad size and the pad pitch are reduced. It is convenient to process, which improves the effect of the circuit pattern when it is connected, and solves the problem of the rationality of the overall layout of the module and the miniaturization and thinning of the product, thereby improving the miniaturization and thinness of the electrical connection of the power module and the control module.
  • the effect of theization is convenient for the processing and thinning development of the mobile terminal.
  • the mobile terminal can be a different terminal, such as a mobile phone or a worn communication device.
  • FIG. 1 is a schematic structural diagram of a substrate according to an embodiment of the present invention.
  • FIG. 2 is a schematic structural diagram of another substrate according to an embodiment of the present invention.
  • 3a-3m are process diagrams of a substrate according to an embodiment of the present invention.
  • FIG. 1 is a schematic structural diagram of a substrate provided by an embodiment of the present invention.
  • a substrate is provided, and the substrate is disposed on the substrate.
  • the substrate further includes a resin layer 1 and a thin resin layer 2, a plurality of components 3 are embedded in the resin layer 1, and the legs of each component 3 are used for the circuit
  • the end face of the pattern 4 is exposed to expose the resin layer 1 and is flush with the surface of the resin layer 1; the thin resin layer 2 is attached to the exposed side of the component 3 on the resin layer 1, and the thin resin layer 2 is only for each leg.
  • the circuit pattern 4 is attached to the side of the thin resin layer 2 facing away from the resin layer 1, and the circuit layer 4 is connected with pads which extend into each of the through holes and are connected to the legs.
  • the same component pad surface ie, the legs of the component 3
  • the pad to the copper layer has the same depth requirement, thereby
  • the thin resin layer 2 is used to punch the legs of the exposed component 3
  • the depth of the punching is the same, the controllability of the punching is achieved, and the pad size and the pad pitch are reduced.
  • the processing is facilitated, thereby improving the effect of the circuit pattern 4 at the time of connection, and solving the problem of rational layout of the module as a whole and miniaturization and thinning of the product.
  • the substrate provided in this embodiment is formed by laminating three layers, including two thin resin layers 2 and a resin layer 1 interposed between two thin resin layers 2; 3 is embedded in the resin layer 1.
  • the component 3 includes a first component 32 and a second component 31.
  • the first component 32 is a component 3 of the component 3 facing in one direction.
  • the second component 31 is a component 3 in which the legs of the component 3 are oriented in the opposite direction to the legs of the first component 32, that is, the legs of the first component 32 and the second component 31 are disposed opposite each other.
  • the number of the first component 32 and the second component 31 provided in this embodiment is multiple, and the number of the first component 32 and the second component 31 can be based on the actual substrate. Function to choose.
  • the circuit patterns 4 on the substrate are distributed over the two thin resin layers 2, and the metallized through holes 6 passing through the resin layer 1 and the thin resin layer 2 are passed between the two circuit patterns 4.
  • the legs of each component 3 face one side of which the circuit pattern 4 is connected.
  • the first component 32 and the second component 31 are embedded in the resin layer 1, and the end faces of the legs of the first component 32 and the second component 31 are flush with the surface of the resin layer 1, the surface To attach the surface of the thin resin layer 2; and the through hole 21 corresponding to the legs of the first component 32 and the second component 31 is provided on the thin resin layer 2, through the through hole provided in the thin resin layer 2. 21, the legs of the first component 32 and the second component 31 are exposed and connected to the circuit pattern 4. Further, the two circuit patterns 4 are connected to each other to form an integral circuit pattern 4 by metallized through holes 6 which are provided in the two thin resin layers 2 and the resin layer 1.
  • the path of the circuit pattern 4 on the substrate is shorter, the layout of the circuit pattern 4 is reasonable, and the performance of the circuit pattern 4 is improved, and the area of the circuit pattern 4 can be effectively reduced.
  • the conventional ECP (Electronic Circuit Protector) on the substrate in the prior art adopts a design in which the device is placed up/down, and the device placement design only considers whether the module space is considered. Meet the demand; the copper layer utilization on the back of the pad is low, and the interconnect signal is required to be drilled to increase the module area.
  • the substrate provided by the embodiment of the present invention is designed and placed, the interconnection factor considering the space constraints and the interconnection factor is considered, thereby ensuring the overall utilization of the module and reducing the area of the module.
  • the pads of the same component 3 to the circuit pattern 4 have the same height, which ensures the laser drilling process.
  • the invention adopts the device pad surface to increase the thin resin, reduce the drilling depth, reduce the upper and lower deviation of the drilling hole, and ensure the chip design of the chip using the small pad.
  • the substrate further includes a protective layer 5 covering the thin resin layer 2, and the protective layer 5 is provided with a plurality of window structures 51, a plurality of The window structure 51 has a one-to-one correspondence with the external ports of the circuit pattern 4.
  • the substrate is wrapped by the protective layer 5, thereby preventing the copper wire from being oxidized by the circuit pattern 4 on the substrate, thereby improving the use effect of the entire substrate.
  • the specific thickness of the thin resin layer 2 is between 20 ⁇ m and 30 ⁇ m. Thereby, the depth of the punching and the occupied area of the pad can be effectively controlled, and in a more specific arrangement, the thickness of the thin resin layer 2 is 20 ⁇ m.
  • a circuit pattern 4 is formed on the thin resin layer 2, and the circuit pattern 4 is connected to the first component 32.
  • the same device pad surface ie, the legs of the component 3 are in the same plane, and the thin resin is pressed; the pad of the device is solved to the copper layer.
  • the same depth requirement so that in the substrate preparation process, when the thin resin layer 2 is punched to expose the legs of the component 3, the depth of the punching is the same, the controllability of the punching is achieved; and the pad size and the soldering are reduced.
  • the requirement of the disc pitch facilitates the processing, thereby improving the effect of the circuit pattern 4 at the time of connection, and solving the problem that the overall layout of the module is rational and the product is miniaturized and thinned.
  • Step 1 As shown in FIG. 3a to FIG. 3c, the mold 20 is placed on the first adhesive film 10, and the mold 20 has a hollow structure 201 for accommodating the first component 32; the first component 32 is placed in the hollow Structure 201, and the legs of the first component 32 are bonded to the first adhesive film 10; and the hollow structure 201 of the mold 20 is filled with a resin.
  • the mold 20 is disposed on the first adhesive film 10 having a viscous side, and the mold 20 has a plurality of hollow structures 201 for accommodating the first Component 32.
  • the first component 32 is placed into the hollow structure 201, and when placed, the legs of the first component 32 face the first adhesive film 10, and the first component 32 is fixed by the adhesiveness of the first adhesive film 10.
  • the hollow structure 201 is filled with resin so that the surface layer of the resin is flush with the top surface of the hollow structure 201.
  • the component 3 is placed by the provided mold 20, which facilitates the embedding of the component 3 and improves the production. Efficiency and product qualification rate.
  • Step 2 As shown in FIG. 3d to FIG. 3h, the second adhesive film 11 is pasted on the opposite side of the mold 20 from the first adhesive film 10; the mold 20 is removed, and the first adhesive film 10 is removed; and the second component 31 is placed. The legs of the second component 31 are bonded to the second adhesive film 11; the filling resin encloses the second component 31.
  • the side of the mold 20 opposite to the first adhesive film 10 is attached.
  • the second adhesive film 11, that is, the filled resin is adhered by the second adhesive film 11, and then, as shown in Fig. 3e, the first adhesive film 10 is removed, and as shown in Fig. 3f, the mold 20 is removed, at this time, The filled resin is stuck on the second adhesive film 11.
  • the second component 31 is placed on the second adhesive film 11, at which time the legs of the second component 31 are attached to the second adhesive film 11. Thereafter, as shown in FIG. 3h, the resin is filled and the second component 31 is wrapped.
  • the distribution efficiency of the circuit pattern 4 is improved, and when the component 3 is provided, the legs of the component 3 are oriented toward the connection of the correspondingly connected circuit pattern 4. The point simplifies the layout of the circuit pattern 4, reduces the length of the trace, improves the utilization rate of the substrate, and further improves the overall effect of the substrate.
  • Step 3 as shown in FIGS. 3i to 3j, the second adhesive film 11 is removed, and the thin resin layer 2 is adhered to both sides of the formed resin layer 1, and is opened on the thin resin layer 2 to expose the first component 32 and the second element.
  • the legs of the device 31; and the holes 21 are opened in the resin layer 1 and the thin resin layer 2 in accordance with the designed circuit pattern 4.
  • the second adhesive film 11 is removed.
  • the first component 32 and the second component 31 are embedded in the resin layer 1, and the first component 32 and the second component 31 are embedded.
  • the legs are exposed on the surface of the resin layer 1 for attaching the thin resin layer 2.
  • the thin resin layer 2 is adhered to the opposite surfaces of the resin layer 1, and the thickness of the thin resin layer 2 is, in a specific arrangement, between 20 ⁇ m and 30 ⁇ m. Thereby, the depth of the punching and the occupied area of the pad can be effectively controlled, and in a more specific arrangement, the thickness of the thin resin layer 2 is 20 ⁇ m. As shown in FIG.
  • a through hole 21 is formed in the adhered thin resin layer 2, and the through hole 21 corresponds to the legs of the first component 32 and the second component 31. Further, a through hole 21 is formed in the thin resin layer 2 and the resin layer 1, and the through hole 21 is used to form the metallized through hole 6 and to connect the circuit patterns 4 on the two thin resin layers 2 into a single body. Circuit pattern 4.
  • Step 4 copper plating is performed on the thin resin layer 2 to form a copper clad layer 41, and the copper clad layer 41 is etched to form the circuit pattern 4. That is, copper is plated on both surfaces of the thin resin layer 2, and copper plating is etched to form the circuit pattern 4.
  • the two thin resin layers 2 are respectively covered with copper, and when copper plating, the copper-clad layer 41 communicates with the legs of the first component 32 and the second component 31, and Copper layer
  • the metallized through hole 6 is formed through the through hole 21 penetrating the thin resin layer 2 and the resin layer 1.
  • the copper plating layer is etched to form a circuit pattern 4.
  • a complete circuit pattern 4 is formed on the substrate, and the first component 32 and the second component 31 are formed on the circuit pattern 4.
  • the legs are all facing the side of the correspondingly connected circuit pattern 4, thereby reducing the arrangement of the circuit pattern 4, avoiding excessive use of the metallized vias 6, and improving the rationality of the layout of the circuit pattern 4.
  • Step 5 As shown in FIG. 3m, the protective layer 5 is coated, and a window structure 51 corresponding to the external port of the circuit pattern 4 is opened on the protective layer 5.
  • the circuit pattern 4 is protected by the protective layer 5 provided to prevent the circuit pattern 4 from being oxidized, thereby improving the safety of the entire substrate during use.
  • the protective layer 5 also fills the metallized via holes 6 to protect the metal in the metallized via holes 6, thereby improving the safety of the entire substrate.
  • the protective layer 5 may be a lacquer layer.
  • the substrate provided by the above embodiments can be applied to different products, such as communication equipment or electrical equipment.
  • products such as communication equipment or electrical equipment.
  • an embodiment of the present invention further provides a mobile terminal, including a housing, a power module disposed in the housing, and a control module connected to the power module, where The power module and the control module respectively include the substrate of any one of the above.
  • the power module and the control module respectively use the substrate in the above embodiment. It should be understood that when the power module and the control module use the substrate, the circuit pattern on the substrate and the embedded components are according to the power module and The function of the control module is selected. It can be seen from the above embodiment that the substrate is in the same plane through the same device pad surface, which solves the same depth requirement of the device from the pad to the copper layer, and reduces the pad size and pad pitch requirements. Convenient processing, thereby improving the effect of the circuit pattern on the connection, and solving the problem of the overall layout of the module and the miniaturization and thinning of the product.
  • the power module and the control module provided by the embodiment are provided by the effect of the substrate.
  • the processing efficiency of the power module and the control module, and the electrical connection effect can be effectively improved, and the development of miniaturization and thinning can be facilitated.
  • the product of the electrical connection of the power supply module and the control module and the like using the structure of the above-described substrate is reduced in size and thickness.
  • the effect of the control module and the power module is improved by the substrate, thereby improving the processing efficiency of the mobile terminal during production and the effect of electrical connection, and at the same time facilitating the miniaturization and thinning of the mobile terminal.
  • the mobile terminal may be a different terminal, such as a mobile phone or a worn communication device.

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Abstract

公开了一种基板及移动终端。基板具有电路图案（4）以及多个元器件（3），基板还包括：树脂层（1）以及薄树脂层（2），元器件镶嵌在树脂层内且支脚的端面与树脂层的表面齐平；薄树脂层贴附在树脂层上元器件支脚外露的一面，薄树脂层上设置有与每个支脚对应的通孔（21），电路图案附着在薄树脂层背离树脂层的一面，且电路图案连接有伸入每个通孔内并与支脚电连接的焊盘。通过同向的器件焊盘面都处于在同一个平面，通过压合薄树脂，解决了器件的焊盘到铜层有相同深度需求，同时减少焊盘大小和焊盘间距的要求，方便了加工，进而提高了电路图案在连接时的效果，并且解决模块整体布局合理性和产品小型化、薄型化的问题。

Description

一种基板及移动终端
本申请要求在2016年03月31日提交中国专利局、申请号为201610200436.4、发明名称为“一种基板及移动终端”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及到电子技术领域，尤其涉及到一种基板及移动终端。
背景技术
目前业界采用ECP技术的主要目的：提升产品性能、集成度更高；向产品需求更薄、更小的方向发展。埋嵌式基板：根据基板/PCB加工工艺和元器件装配特点，将元器件埋嵌入基板/PCB中的新的封装技术；它提升产品集成度，减少模块外形尺寸；同时能提升产品的可靠性和电热性能。
但是现有技术中的埋设普通正常ECP加工流程中同树脂层埋嵌的器件，当多颗器件应用到埋嵌基板中时，由于多个器件的高度不同，现有技术中的埋设结构难以保障器件的焊盘到基板表面的铜层有相同高度，从而导致器件在连接时，需要开设的孔的深度不同，在生产过程中，造成每个孔的加工深度不同，极大的影响到基板在加工时的工作效率，且由于元器件埋设深度的不同，造成元器件在与电路图案在连接时的焊盘的大小不同，在形成电路图案时，影响到元器件与电路图案的连接效果。
发明内容
本发明提供了一种基板及移动终端，用以提高基板上元器件与电路图案的连接效果。
为了解决上述技术问题，本发明提供了一种基板，所述基板具有电气图案以及多个元器件，所述基板还包括：树脂层以及薄树脂层，所述多个元器 件镶嵌在所述树脂层内，且每个元器件的支脚上用于与所述电路图案连接的端面外露出所述树脂层且与所述树脂层的表面齐平；所述薄树脂层贴附在树脂层上元器件支脚外露的一面，所述薄树脂层上设置有与每个支脚对应的通孔，所述电路图案附着在所述薄树脂层背离所述树脂层的一面，且所述电路图案连接有伸入每个通孔内并与支脚电连接的焊盘。
在上述技术方案中，通过将多个元器件埋设在薄树脂层，并且在埋设时，多个元器件的支脚与树脂层的表面齐平，从而使得在基板制备过程中，在薄树脂层进行打孔外露元器件的支脚时，打孔的深度相同，实现了打孔的可控性，方便了加工，并且多个元器件的支脚采用在同一表面设置，提高了焊盘的可能性，进而提高了电路图案在连接时的效果。
在上述具体设置时，该基板还包括覆盖在所述薄树脂层上的保护层，且所述保护层上设置有多个窗口结构，所述多个窗口结构与所述电路图案的外接端口一一对应。通过设置的保护层包裹住基板，从而避免基板上的电路图案线外露造成铜线氧化的情况，提高了整个基板的使用效果。
在一种具体的情况中，基板上的电路图案分布在所述两个薄树脂层，所述两层电路图案之间通过穿过所述树脂层及薄树脂层的金属化通孔连接，且所述多个元器件中，每个元器件的支脚朝向其连接电路图案的一面。即基板上的电路图案采用两层设置的方式，设置在基板上相对的两个表面上，提高了电路图案的分布效率，并且在设置元器件时，元器件的支脚朝向其对应连接的电路图案的连接点，从而简化电路图案的布局，降低走线长度，提高基板的使用率，进而提高基板的整体效果。
在上述设置时，所述薄树脂层的厚度介于20μm～30μm。从而可以有效的控制打孔的深度，以及焊盘的占用的面积，在更具体的设置中，所述薄树脂层的厚度为20μm。
本发明还提供了一种移动终端，该移动终端包括壳体以及设置在所述壳体内的电源模块以及与所述电源模块连接的控制模块，其中，所述电源模块与所述控制模块分别包括上述任一项所述基板。
在上述技术方案中，通过同向的器件焊盘面都处于在同一个平面，通过压合薄树脂；解决了器件的焊盘到铜层有相同深度需求，同时减少焊盘大小和焊盘间距的要求，方便了加工，进而提高了电路图案在连接时的效果，并且解决模块整体布局合理性和产品小型化、薄型化的问题，进而改善电源模块和控制模块等电气连接的产品小型化及薄型化的效果，便于移动终端的加工以及薄型化发展。
该移动终端可以为不同的终端，如手机或穿戴的通讯设备。
附图说明
图1为本发明实施例提供的基板的结构示意图；
图2为本发明实施例提供的另一种基板的结构示意图；
图3a～图3m为本发明实施例提供的基板的流程工艺图。
附图标记：
1-树脂层 2-薄树脂层 21-通孔 3-元器件
31-第二元器件 32-第一元器件 4-电路图案
41-覆铜层 5-保护层 51-窗口结构
6-金属化通孔 10-第一粘性膜 11-第二粘性膜 20-模具
201-镂空结构
具体实施方式
为了使本发明的目的、技术方案和优点更加清楚，下面将结合附图对本发明作进一步地详细描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其它实施例，都属于本发明保护的范围。
如图1所示，图1示出了本发明实施例提供的基板的结构示意图。
为了解决上述技术问题，在本实施例中提供了一种基板，该基板上设置 有电路图案4及多个元器件3，该基板还包括：树脂层1以及薄树脂层2，多个元器件3镶嵌在树脂层1内，且每个元器件3的支脚上用于与电路图案4连接的端面外露出树脂层1且与树脂层1的表面齐平；薄树脂层2贴附在树脂层1上元器件3支脚外露的一面，薄树脂层2上述和只有与每个支脚对应的通孔，电路图案4附着在薄树脂层2背离树脂层1的一面，且电路图层4连接有伸入到每个通孔内并与支脚连接的焊盘。
在上述实施例中，通过同向的元器件焊盘面(即元器件3的支脚)都处于在同一个平面，通过压合薄树脂；解决了器件的焊盘到铜层有相同深度需求，从而使得在基板制备过程中，在薄树脂层2进行打孔外露元器件3的支脚时，打孔的深度相同，实现了打孔的可控性；同时减少焊盘大小和焊盘间距的要求，方便了加工，进而提高了电路图案4在连接时的效果，并且解决模块整体布局合理性和产品小型化、薄型化的问题。
为了方便理解本实施例提供的基板的结构，下面结合附图对其结构以及原理进行详细的说明。
如图1及图2所示，本实施例提供的基板由三层层叠而成，包括两层薄树脂层2以及夹设在两层薄树脂层2之间的树脂层1；其中，元器件3埋设在树脂层1，在本实施例中，该元器件3包括第一元器件32和第二元器件31，其中，第一元器件32为元器件3朝向一个方向的元器件3，第二元器件31为元器件3的支脚朝向与第一元器件32支脚相反的方向的元器件3，即第一元器件32和第二元器件31的支脚相背设置。
继续参考图2，本实施例提供的第一元器件32和第二元器件31的个数均为多个，且该第一元器件32和第二元器件31的个数可以根据实际基板的功能进行选择。在具体设置时，如图2所示，基板上的电路图案4分布在两个薄树脂层2，两层电路图案4之间通过穿过树脂层1及薄树脂层2的金属化通孔6连接，且多个元器件3中，每个元器件3的支脚朝向其连接电路图案4的一面。具体的，第一元器件32和第二元器件31埋设在树脂层1内，且第一元器件32和第二元器件31的支脚的端面与树脂层1的表面齐平，该表面 为贴附薄树脂层2的表面；并且薄树脂层2上设置了与第一元器件32及第二元器件31的支脚相对应的通孔21，通过在薄树脂层2上设置的通孔21，使得第一元器件32和第二元器件31的支脚外露并与电路图案4连接。此外，两层电路图案4之间通过穿设在两层薄树脂层2及树脂层1的金属化通孔6连接组成一个整体电路图案4。
在采用上述设置时，基板上的电路图案4路径更短，电路图案4布局合理，进而电路图案4的性能得到提升，且电路图案4的面积能够有效的降低。与现有技术中的基板相比，现有技术中的基板上普通ECP(Electronic Circuit Protector，电子电路图案4保护装置)采用器件向上/向下放置的设计，器件放置设计时仅考虑模块空间是否满足需求；焊盘背面的铜层利用率偏低，需要互连信号采用钻孔连接，增加模块的面积。本发明实施例提供的基板在设计放置元器件3时，考虑空间制约条件同时也考量的互连的因素，保障模块的整体利用率提升，减少模块的面积。
在具体设置时，多颗元器件3应用到埋嵌的基板中时，同向的元器件3的焊盘到电路图案4层都是相同高度，保障激光钻孔工艺流程。同时本发明采用器件焊盘面都是增加薄树脂，减少钻孔深度，降低钻孔上下偏差，保障芯片采用小焊盘的芯片设计。
此外，在具体的设置过程中，为了提高基板在使用时的安全性，该基板还包括覆盖在薄树脂层2上的保护层5，且保护层5上设置有多个窗口结构51，多个窗口结构51与电路图案4的外接端口一一对应。通过设置的保护层5包裹住基板，从而避免基板上的电路图案4线外露造成铜线氧化的情况，提高了整个基板的使用效果。
在上述实施例中，具体设置时，薄树脂层2的厚度介于20μm～30μm。从而可以有效的控制打孔的深度，以及焊盘的占用的面积，在更具体的设置中，所述薄树脂层2的厚度为20μm。
为了理解本实施例提供的基板的结构，下面结合附图3a～附图3m，详细说明本实施例提供的基板的制备方法。该方法具体为：
放置第一元器件32，且第一元器件32的支脚位于同一平面；
填充树脂形成包裹第一元器件32；且第一元器件32的支脚与树脂的表面齐平；
在树脂的表面贴附薄树脂层2；
在薄树脂层2上形成电路图案4，且该电路图案4与第一元器件32连接。
在上述技术方案中，在上述实施例中，通过同向的器件焊盘面(即元器件3的支脚)都处于在同一个平面，通过压合薄树脂；解决了器件的焊盘到铜层有相同深度需求，从而使得在基板制备过程中，在薄树脂层2进行打孔外露元器件3的支脚时，打孔的深度相同，实现了打孔的可控性；同时减少焊盘大小和焊盘间距的要求，方便了加工，进而提高了电路图案4在连接时的效果，并且解决模块整体布局合理性和产品小型化、薄型化的问题。
为了方便理解上述方法，下面结合具体的附图对其步骤进行详细的描述。
步骤一：如图3a～图3c所示，将模具20放置在第一粘性膜10上，且模具20上具有容纳第一元器件32的镂空结构201；将第一元器件32放入到镂空结构201，且第一元器件32的支脚粘接在第一粘性膜10上；并在模具20的镂空结构201中填充树脂。
具体的，其中的第一粘性膜10的一面具有粘性，模具20设置在第一粘性膜10上具有粘性的一面，该模具20上具有多个镂空结构201，该镂空结构201用于容纳第一元器件32。将第一元器件32放置到镂空结构201中，且在放置时，第一元器件32的支脚朝向第一粘性膜10，并且通过第一粘性膜10的粘性将第一元器件32进行固定。之后，在镂空结构201中填充树脂，使得树脂的表层与镂空结构201的顶面齐平，在上述方法中，通过设置的模具20放置元器件3，方便了元器件3埋设，提高了生产的效率以及产品的合格率。
步骤二：如图3d～图3h，在模具20上与第一粘性膜10相对的一面粘贴第二粘性膜11；取下模具20，并祛除第一粘性膜10；放置第二元器件31，且第二元器件31的支脚粘接在第二粘性膜11；填充树脂包裹第二元器件31。
具体的，如图3d所示，在模具20上与第一粘性膜10相背的一面贴附第 二粘性膜11，即通过第二粘性膜11将填充的树脂粘住，之后，如图3e所示，将第一粘性膜10去掉，并如图3f所示，将模具20祛除，此时，填充的树脂粘贴在第二粘性膜11上。
如图3g所示，将第二元器件31放置到第二粘性膜11上，此时，第二元器件31的支脚粘贴在第二粘性膜11上。之后，如图3h所示，填充树脂，将第二元器件31包裹起来。通过采用采用在树脂层1的另一面设置第二元器件31，从而提高了电路图案4的分布效率，并且在设置元器件3时，元器件3的支脚朝向其对应连接的电路图案4的连接点，从而简化电路图案4的布局，降低走线长度，提高基板的使用率，进而提高基板的整体效果。
步骤三、如图3i～图3j，祛除第二粘性膜11，在形成的树脂层1的两面分别粘贴薄树脂层2，在薄树脂层2上开口，露出第一元器件32及第二元器件31的支脚；并根据设计的电路图案4在树脂层1及薄树脂层2上开通孔21。
具体的，如图3i所示，祛除第二粘性膜11，此时，第一元器件32及第二元器件31均埋设在树脂层1中，且第一元器件32及第二元器件31的支脚外露在树脂层1的表面，该表面用于贴附薄树脂层2。继续参考图3i，在树脂层1的两个相对的表面粘贴薄树脂层2，在具体设置时，薄树脂层2的厚度介于20μm～30μm。从而可以有效的控制打孔的深度，以及焊盘的占用的面积，在更具体的设置中，所述薄树脂层2的厚度为20μm。如图3j所示，在粘贴完后两层薄树脂层2后，在粘贴的薄树脂层2中开设通孔21，该通孔21对应第一元器件32和第二元器件31的支脚，并且薄树脂层2及树脂层1上还开设了贯穿的通孔21，该通孔21用于形成金属化通孔6以及使得位于两个薄树脂层2上的电路图案4连接成一个整体的电路图案4。
步骤四、在薄树脂层2上镀铜形成覆铜层41，并将覆铜层41刻蚀形成电路图案4。即在薄树脂层2的两面分别镀铜，并对镀铜进行刻蚀形成电路图案4。
具体的，如图3k所示，在两个薄树脂层2上分别镀铜覆盖，并且在镀铜时，覆铜层41与第一元器件32及第二元器件31的支脚连通，此外，覆铜层 41穿过贯穿薄树脂层2及树脂层1的通孔21形成金属化通孔6。如图3l所示，对镀铜层进行刻蚀，形成电路图案4，此时，在基板上形成一个完整的电路图案4，该电路图案4上，第一元器件32及第二元器件31的支脚均朝向其对应连接的电路图案4所在的一面，从而减少了电路图案4的设置，避免过多的使用金属化通孔6，提高了电路图案4布局的合理性。
步骤五、如图3m所示，涂覆保护层5，并在保护层5上开设与电路图案4的外接端口对应的窗口结构51。
具体的如图3m所示，通过设置的保护层5保护电路图案4，避免电路图案4被氧化，提高整个基板的在使用时的安全性。在涂覆保护层5时，保护层5也会填充金属化通孔6，保护金属化通孔6内的金属，从而提高了整个基板的安全性。在具体设置时，该保护层5可以为漆层。
上述实施例提供的基板可以应用到不同的产品上，如通讯设备或电气设备。如：手机、平板电脑、无线路由器、穿戴电子设备、灯具、空调、电热水器、电表、摄像机、电话、电脑等。
在一个具体的实施例中，本发明实施例还提供了一种移动终端，该移动终端包括壳体以及设置在所述壳体内的电源模块以及与所述电源模块连接的控制模块，其中，所述电源模块与所述控制模块分别包括上述任一项所述基板。
在上述实施例中，电源模块和控制模块分别采用上述实施例中的基板，应当理解的是，电源模块与控制模块在采用上述基板时，基板上的电路图案以及埋设的元器件根据电源模块和控制模块的功能进行选择。由上述实施例可以看出，该基板通过同向的器件焊盘面都处于在同一个平面，解决了器件的焊盘到铜层有相同深度需求，同时减少焊盘大小和焊盘间距的要求，方便了加工，进而提高了电路图案在连接时的效果，并且解决模块整体布局合理性和产品小型化、薄型化的问题，通过上述基板的效果，使得本实施例提供的电源模块和控制模块在采用上述基板时，能够有效的改善电源模块和控制模块的加工效率，以及电气连接效果，并且有利于小型化及薄型化的发展， 进而改善电源模块和控制模块等采用上述基板的结构的电气连接的产品小型化及薄型化。通过基板改善控制模块及电源模块的效果，进而可以改善移动终端在生产时的加工效率，以及电气连接的效果，同时，还便于移动终端的小型化和薄型化的发展。
在具体设置时，该移动终端可以为不同的终端，如手机或穿戴的通讯设备。
显然，本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样，倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内，则本发明也意图包含这些改动和变型在内。

Claims (7)

  1. 一种基板，所述基板具有电气图案以及多个元器件，其特征在于，所述基板还包括：树脂层以及薄树脂层，所述多个元器件镶嵌在所述树脂层内，且每个元器件的支脚上用于与所述电路图案连接的端面外露出所述树脂层且与所述树脂层的表面齐平；所述薄树脂层贴附在树脂层上元器件支脚外露的一面，所述薄树脂层上设置有与每个支脚对应的通孔，所述电路图案附着在所述薄树脂层背离所述树脂层的一面，且所述电路图案连接有伸入每个通孔内并与支脚电连接的焊盘。
  2. 如权利要求1所述的基板，其特征在于，还包括覆盖在所述薄树脂层上的保护层，且所述保护层上设置有多个窗口结构，所述多个窗口结构与所述电路图案的外接端口一一对应。
  3. 如权利要求1所述的基板，其特征在于，所述多个元器件的支脚外露到所述树脂层相对的两个表面，所述电路图案分布在两个薄树脂层，所述两层电路图案之间通过穿过所述树脂层及薄树脂层的金属化通孔连接，且所述多个元器件中，每个元器件的支脚朝向其连接电路图案的一面。
  4. 如权利要求1所述的基板，其特征在于，所述薄树脂层的厚度介于20μm～30μm。
  5. 如权利要求4所述的基板，其特征在于，所述薄树脂层的厚度为20μm。
  6. 一种移动终端，其特征在于，包括壳体以及设置在所述壳体内的电源模块以及与所述电源模块连接的控制模块，其中，所述电源模块与所述控制模块分别包括如权利要求1～5任一项所述基板。
  7. 如权利要求6所述的移动终端，其特征在于，所述移动终端为手机或穿戴的通讯设备。
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