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WO2008111208A1 - 半導体集積回路 - Google Patents

半導体集積回路 Download PDF

Info

Publication number
WO2008111208A1
WO2008111208A1 PCT/JP2007/055205 JP2007055205W WO2008111208A1 WO 2008111208 A1 WO2008111208 A1 WO 2008111208A1 JP 2007055205 W JP2007055205 W JP 2007055205W WO 2008111208 A1 WO2008111208 A1 WO 2008111208A1
Authority
WO
WIPO (PCT)
Prior art keywords
polysilicon
substrate
integrated circuit
semiconductor integrated
wiring
Prior art date
Application number
PCT/JP2007/055205
Other languages
English (en)
French (fr)
Inventor
Hideyuki Komuro
Koji Nozoe
Original Assignee
Fujitsu Microelectronics Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Microelectronics Limited filed Critical Fujitsu Microelectronics Limited
Priority to PCT/JP2007/055205 priority Critical patent/WO2008111208A1/ja
Priority to JP2009503848A priority patent/JP5093224B2/ja
Publication of WO2008111208A1 publication Critical patent/WO2008111208A1/ja
Priority to US12/484,656 priority patent/US8637906B2/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/201—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits
    • H10D84/204—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors
    • H10D84/206—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors of combinations of capacitors and resistors

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Networks Using Active Elements (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

　半導体集積回路は、基板と、基板の上面に形成された酸化膜と、少なくとも１つの第１のポリシリコン部材と複数の第２のポリシリコン部材とを含み、酸化膜の上面に等間隔に配列状に配置される複数のポリシリコン部材と、第１のポリシリコン部材の下部において基板に形成され第１の電源電圧を供給する配線に電気的に結合される拡散層と、を含み、第１のポリシリコン部材は配列の最外周部に位置し第２の電源電圧を供給する配線に電気的に結合され、複数の第２のポリシリコン部材は配列の最外周部ではない内側に位置することを特徴とする。
PCT/JP2007/055205 2007-03-15 2007-03-15 半導体集積回路 WO2008111208A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
PCT/JP2007/055205 WO2008111208A1 (ja) 2007-03-15 2007-03-15 半導体集積回路
JP2009503848A JP5093224B2 (ja) 2007-03-15 2007-03-15 半導体集積回路
US12/484,656 US8637906B2 (en) 2007-03-15 2009-06-15 Semiconductor integrated circuit having polysilicon members

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/055205 WO2008111208A1 (ja) 2007-03-15 2007-03-15 半導体集積回路

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/484,656 Continuation US8637906B2 (en) 2007-03-15 2009-06-15 Semiconductor integrated circuit having polysilicon members

Publications (1)

Publication Number Publication Date
WO2008111208A1 true WO2008111208A1 (ja) 2008-09-18

Family

ID=39759159

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/055205 WO2008111208A1 (ja) 2007-03-15 2007-03-15 半導体集積回路

Country Status (3)

Country Link
US (1) US8637906B2 (ja)
JP (1) JP5093224B2 (ja)
WO (1) WO2008111208A1 (ja)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6657982B2 (ja) * 2016-01-18 2020-03-04 富士電機株式会社 半導体装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0269972A (ja) * 1988-09-05 1990-03-08 Seiko Epson Corp 半導体集積装置
JP2001118988A (ja) * 1999-10-15 2001-04-27 Mitsubishi Electric Corp 半導体装置
US20030169101A1 (en) * 2002-03-06 2003-09-11 Mitsubishi Denki Kabushiki Kaisha Semiconductor integrated circuit including a filter
US20050116268A1 (en) * 2003-04-12 2005-06-02 Sony Corporation Semiconductor device

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6429469B1 (en) * 2000-11-02 2002-08-06 International Business Machines Corporation Optical Proximity Correction Structures Having Decoupling Capacitors
JP2006073696A (ja) * 2004-09-01 2006-03-16 Matsushita Electric Ind Co Ltd スタンダードセルを用いた半導体集積回路とその設計方法
JP4841204B2 (ja) * 2005-08-31 2011-12-21 ルネサスエレクトロニクス株式会社 半導体装置
US20080122032A1 (en) * 2006-08-16 2008-05-29 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor devices with MIM-type decoupling capacitors and fabrication method thereof

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0269972A (ja) * 1988-09-05 1990-03-08 Seiko Epson Corp 半導体集積装置
JP2001118988A (ja) * 1999-10-15 2001-04-27 Mitsubishi Electric Corp 半導体装置
US20030169101A1 (en) * 2002-03-06 2003-09-11 Mitsubishi Denki Kabushiki Kaisha Semiconductor integrated circuit including a filter
US20050116268A1 (en) * 2003-04-12 2005-06-02 Sony Corporation Semiconductor device

Also Published As

Publication number Publication date
JPWO2008111208A1 (ja) 2010-06-24
JP5093224B2 (ja) 2012-12-12
US8637906B2 (en) 2014-01-28
US20090273059A1 (en) 2009-11-05

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