UST101201I4 - Method for making stable nitride-defined Schottky barrier diodes - Google Patents
Method for making stable nitride-defined Schottky barrier diodes Download PDFInfo
- Publication number
- UST101201I4 UST101201I4 US06/254,039 US25403981A UST101201I4 US T101201 I4 UST101201 I4 US T101201I4 US 25403981 A US25403981 A US 25403981A US T101201 I4 UST101201 I4 US T101201I4
- Authority
- US
- United States
- Prior art keywords
- nitride
- oxide
- ring
- cavity
- schottky barrier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000004888 barrier function Effects 0.000 title abstract 2
- 150000004767 nitrides Chemical class 0.000 abstract 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 3
- 229910052710 silicon Inorganic materials 0.000 abstract 3
- 239000010703 silicon Substances 0.000 abstract 3
- 239000000758 substrate Substances 0.000 abstract 2
- 238000000151 deposition Methods 0.000 abstract 1
- 230000008030 elimination Effects 0.000 abstract 1
- 238000003379 elimination reaction Methods 0.000 abstract 1
- 239000002184 metal Substances 0.000 abstract 1
- 238000001020 plasma etching Methods 0.000 abstract 1
- 239000000126 substance Substances 0.000 abstract 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/32051—Deposition of metallic or metal-silicide layers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
- H10D30/6737—Thin-film transistors [TFT] characterised by the electrodes characterised by the electrode materials
- H10D30/6738—Schottky barrier electrodes
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/674—Thin-film transistors [TFT] characterised by the active materials
- H10D30/675—Group III-V materials, Group II-VI materials, Group IV-VI materials, selenium or tellurium
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/64—Electrodes comprising a Schottky barrier to a semiconductor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D8/00—Diodes
- H10D8/60—Schottky-barrier diodes
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Excessive leakage after initial forward stress, exhibited by subsequently reverse stressed nitride defined, Schottky barrier diodes is solved by the elimination of the "mouse hole" or undercut cavity in the oxide layer beneath the nitride ring defining the Schottky contact to the underlying silicon. The aforementioned cavity is filled by depositing chemical vapor deposited (CVD) oxide onto the nitride layer, into the nitride ring and the undercut oxide cavity beneath the ring and onto the underlying silicon substrate exposed through the nitride ring. The CVD oxide is then reactively ion etched to remove it except along the vertical walls of the nitride ring and the oxide cavity. The Schottky metal is deposited on the silicon substrate exposed by the reactive ion etching step.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/254,039 UST101201I4 (en) | 1980-03-24 | 1981-04-14 | Method for making stable nitride-defined Schottky barrier diodes |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13306980A | 1980-03-24 | 1980-03-24 | |
US06/254,039 UST101201I4 (en) | 1980-03-24 | 1981-04-14 | Method for making stable nitride-defined Schottky barrier diodes |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US13306980A Continuation | 1980-03-24 | 1980-03-24 |
Publications (1)
Publication Number | Publication Date |
---|---|
UST101201I4 true UST101201I4 (en) | 1981-11-03 |
Family
ID=26831007
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US06/254,039 Pending UST101201I4 (en) | 1980-03-24 | 1981-04-14 | Method for making stable nitride-defined Schottky barrier diodes |
Country Status (1)
Country | Link |
---|---|
US (1) | UST101201I4 (en) |
-
1981
- 1981-04-14 US US06/254,039 patent/UST101201I4/en active Pending
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