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TWI743778B - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device Download PDF

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TWI743778B
TWI743778B TW109115523A TW109115523A TWI743778B TW I743778 B TWI743778 B TW I743778B TW 109115523 A TW109115523 A TW 109115523A TW 109115523 A TW109115523 A TW 109115523A TW I743778 B TWI743778 B TW I743778B
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lead frame
resin material
semiconductor device
manufacturing
groove portion
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TW109115523A
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Chinese (zh)
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TW202044420A (en
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黄善夏
高橋和宏
石橋幹司
礒野早織
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日商Ｔｏｗａ股份有限公司
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561—Batch processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814—Conductive parts
    • H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5252—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive
    • H01L23/5254—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive the change of state resulting from the use of an external beam, e.g. laser beam or ion beam
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Laser Beam Processing (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

半導體裝置的製造方法包括：在形成有槽部（5）的引線框架（1）接合有半導體晶片（6）的狀態下，通過樹脂材（9）來密封引線框架（1）及半導體晶片（6）的步驟；對槽部（5）內的樹脂材（9）照射雷射，以去除槽部（5）內的樹脂材（9）的步驟；在去除了槽部（5）內的樹脂材（9）後，對引線框架（1）進行鍍敷處理的鍍敷步驟；以及沿著槽部（5）來切斷進行了鍍敷處理的引線框架（1）的步驟。The method of manufacturing a semiconductor device includes: sealing the lead frame (1) and the semiconductor wafer (6) with a resin material (9) in a state where the lead frame (1) formed with the groove (5) is joined to the semiconductor wafer (6) ) Step; irradiate the resin material (9) in the groove part (5) with a laser to remove the resin material (9) in the groove part (5); after removing the resin material in the groove part (5) After (9), a plating step of plating the lead frame (1); and a step of cutting the plated lead frame (1) along the groove (5).

Description

半導體裝置的製造方法Manufacturing method of semiconductor device

本說明書是有關於一種半導體裝置的製造方法。This specification relates to a method of manufacturing a semiconductor device.

半導體裝置正逐漸大容量化，引腳端子的數量也存在增加傾向。Semiconductor devices are gradually increasing in capacity, and the number of pin terminals also tends to increase.

此種背景下，正在開發和製造小外型無引腳封裝（Small Outlined Non-leaded Package，SON）型及方形扁平無引腳封裝（Quad Flat Non-leaded Package，QFN）型等所謂的無引腳型半導體裝置（參照日本專利特開2011-77278號公報）。Under this background, so-called unleaded packages (Small Outlined Non-leaded Package, SON) type and Quad Flat Non-leaded Package (QFN) type are being developed and manufactured. Foot-type semiconductor device (refer to Japanese Patent Laid-Open No. 2011-77278).

日本專利特開2011-77278號公報所公開的半導體裝置的製造方法中，在通過鍍敷膜來包覆引腳的表面後，進行樹脂密封。對用於密封的樹脂材中與鍍敷膜接觸的部分照射雷射，以局部去除樹脂材，由此，使包覆著引腳表面的鍍敷膜露出至外部。所述製造方法中，在通過雷射照射來去除與鍍敷膜接觸的樹脂材時，鍍敷膜容易產生損傷等，作為鍍敷膜的功能，甚而作為半導體裝置的品質有可能下降。In the method of manufacturing a semiconductor device disclosed in Japanese Patent Application Laid-Open No. 2011-77278, after covering the surface of the lead with a plating film, resin sealing is performed. The part of the resin material used for sealing that is in contact with the plating film is irradiated to partially remove the resin material, thereby exposing the plating film covering the pin surface to the outside. In the above-mentioned manufacturing method, when the resin material in contact with the plating film is removed by laser irradiation, the plating film is likely to be damaged, etc., and the function of the plating film may decrease the quality as a semiconductor device.

本說明書的目的在於公開一種半導體裝置的製造方法，在包含通過雷射照射來去除樹脂材的步驟的半導體裝置的製造方法中，與如上所述的以往方法相比，能夠獲得作為鍍敷膜、甚而作為半導體裝置的高品質。The purpose of this specification is to disclose a method of manufacturing a semiconductor device. In the method of manufacturing a semiconductor device including a step of removing resin material by laser irradiation, it is possible to obtain a plated film, Even as a high-quality semiconductor device.

本說明書中公開的半導體裝置的製造方法包括：樹脂密封步驟，在形成有槽部的引線框架接合有半導體晶片的狀態下，通過樹脂材來密封所述引線框架及所述半導體晶片；雷射照射步驟，對所述槽部內的所述樹脂材照射雷射，以去除所述槽部內的所述樹脂材；鍍敷步驟，在去除了所述槽部內的所述樹脂材後，對所述引線框架進行鍍敷處理；以及切斷步驟，沿著所述槽部來切斷進行了所述鍍敷處理的所述引線框架。The method of manufacturing a semiconductor device disclosed in this specification includes: a resin sealing step of sealing the lead frame and the semiconductor wafer with a resin material in a state where the lead frame formed with the groove portion is bonded to the semiconductor wafer; and laser irradiation Step, irradiating the resin material in the groove portion with a laser to remove the resin material in the groove portion; in the plating step, after removing the resin material in the groove portion, apply a laser to the lead The frame is subjected to a plating treatment; and a cutting step of cutting the lead frame subjected to the plating treatment along the groove portion.

本發明的所述及其他目的、特徵、方面及優點，當根據與圖式關聯地理解的跟本發明相關的接下來的詳細說明而明確。The above and other objects, features, aspects and advantages of the present invention will be clarified from the following detailed description related to the present invention which is understood in connection with the drawings.

以下，一邊參照圖式，一邊說明實施方式。在以下的說明中，對於相同的零件及相當的零件標注相同的參照編號，且有時不再重複其說明。實施方式的半導體裝置的製造方法包括準備步驟、樹脂密封步驟、雷射照射步驟、鍍敷步驟及切斷步驟。以下依序進行說明。Hereinafter, the embodiments will be described with reference to the drawings. In the following description, the same reference numbers are assigned to the same parts and equivalent parts, and the descriptions may not be repeated in some cases. The manufacturing method of the semiconductor device of the embodiment includes a preparation step, a resin sealing step, a laser irradiation step, a plating step, and a cutting step. The following is an explanation in order.

（準備步驟） 圖1是表示在準備步驟中準備的引線框架1與多個半導體晶片6的平面圖。引線框架1包含銅等金屬。引線框架1包括：多個晶片焊墊2，排列成陣列狀；多個引腳3，配置在各晶片焊墊2的周圍（四方）；以及連接條（tie bar）4，圍繞配置在各晶片焊墊2四方的多個引腳3。圖1中表示了在各晶片焊墊2上配置有半導體晶片6的狀態。(Preparatory steps) FIG. 1 is a plan view showing a lead frame 1 and a plurality of semiconductor wafers 6 prepared in the preparation step. The lead frame 1 contains metal such as copper. The lead frame 1 includes: a plurality of chip bonding pads 2 arranged in an array; a plurality of pins 3 arranged around each chip bonding pad 2 (square); and tie bars 4 arranged around each chip A plurality of pins 3 on the four sides of the soldering pad 2. FIG. 1 shows a state in which a semiconductor wafer 6 is arranged on each wafer pad 2.

連接條4在引線框架1中形成為格子狀。在引線框架1，預先形成有沿著連接條4而延伸的槽部5。槽部5是形成在引線框架1中與搭載半導體晶片6的側為相反側的表面（參照圖2），在相對於槽部5的延伸方向而正交的方向上具有槽寬W1。槽寬W1例如為0.40 mm～0.50 mm。槽部5並非貫穿引線框架1，而是具有例如引線框架1的一半厚度的槽深，可通過對引線框架1進行蝕刻（濕式蝕刻）而形成。另外，槽部5的槽寬W1及槽深只要考慮確保在後步驟中不會產生變形等問題的程度的強度、可在後步驟中進行良好的外觀檢查、作為完成品的半導體裝置的良好的安裝強度等來設定即可。The connecting bars 4 are formed in a lattice shape in the lead frame 1. In the lead frame 1, a groove 5 extending along the connecting bar 4 is formed in advance. The groove 5 is formed on the surface of the lead frame 1 opposite to the side on which the semiconductor wafer 6 is mounted (see FIG. 2 ), and has a groove width W1 in a direction orthogonal to the extending direction of the groove 5. The groove width W1 is 0.40 mm to 0.50 mm, for example. The groove portion 5 does not penetrate the lead frame 1, but has a groove depth of, for example, half the thickness of the lead frame 1, and can be formed by etching (wet etching) the lead frame 1. In addition, the groove width W1 and groove depth of the groove portion 5 only need to consider the strength to ensure that there will be no problems such as deformation in the subsequent steps, good appearance inspection can be performed in the subsequent steps, and the semiconductor device as a finished product is good You can set the installation strength and so on.

圖2是沿著圖1中的II-II線的箭頭剖面圖，表示了在形成有槽部5的引線框架1（晶片焊墊2）上接合有半導體晶片6的狀態。如圖2所示，設在各半導體晶片6的多個電極經由接合線（bonding wire）7而電性連接於引腳3（圖1）。另外，為了方便，圖1中未圖示出接合線7。2 is an arrow cross-sectional view along the II-II line in FIG. 1 and shows a state where the semiconductor wafer 6 is bonded to the lead frame 1 (wafer pad 2) in which the groove portion 5 is formed. As shown in FIG. 2, the plurality of electrodes provided on each semiconductor wafer 6 are electrically connected to the pins 3 via bonding wires 7 (FIG. 1 ). In addition, for convenience, the bonding wire 7 is not shown in FIG. 1.

（樹脂密封步驟） 圖3是表示進行了樹脂密封步驟的狀態的剖面圖。在樹脂密封步驟中，在接合有半導體晶片6的狀態下，通過樹脂材9來密封引線框架1及半導體晶片6。如圖2及圖3所示，在樹脂密封步驟之前，可在引線框架1的槽部5側貼附保護膜8（例如聚醯亞胺樹脂帶），在貼附了保護膜8後進行樹脂密封。(Resin sealing step) Fig. 3 is a cross-sectional view showing a state in which a resin sealing step has been performed. In the resin sealing step, in a state where the semiconductor wafer 6 is bonded, the lead frame 1 and the semiconductor wafer 6 are sealed by the resin material 9. As shown in Figures 2 and 3, before the resin sealing step, a protective film 8 (for example, polyimide resin tape) can be attached to the groove 5 side of the lead frame 1, and the resin can be applied after the protective film 8 is attached. seal.

半導體裝置的製造方法也可還包括下述步驟：在樹脂密封步驟與接下來要說明的雷射照射步驟之間，對樹脂材9的、與引線框架1的槽部5為相反側的表面9a（圖3），通過照射雷射L1來進行雷射標記（laser marking）。使用脈衝雷射器，並通過掃描光學系統來進行掃描，由此能夠刻印型號或序列號等任意資訊。The method of manufacturing a semiconductor device may further include the following step: between the resin sealing step and the laser irradiation step to be described next, the surface 9a of the resin material 9 opposite to the groove 5 of the lead frame 1 (Figure 3), laser marking is performed by irradiating laser L1. Using a pulse laser and scanning through a scanning optical system, it is possible to engrave any information such as model number or serial number.

如圖4所示，在進行接下來要說明的雷射照射步驟之前，從引線框架1剝離保護膜8。通過保護膜8的去除，形成在引線框架1的槽部5內的樹脂材9（9b）露出。另外，也可在進行一邊參照圖3一邊說明的雷射標記的步驟之前，從引線框架1剝離保護膜8。As shown in FIG. 4, the protective film 8 is peeled off from the lead frame 1 before performing the laser irradiation step to be described next. The removal of the protective film 8 exposes the resin material 9 (9 b) formed in the groove 5 of the lead frame 1. In addition, before performing the laser marking step described with reference to FIG. 3, the protective film 8 may be peeled off from the lead frame 1.

（雷射照射步驟） 如圖5所示，在雷射照射步驟中，對槽部5內的樹脂材9照射雷射L2，以去除槽部5內的樹脂材9（9b）。作為雷射L2，可對雷射振盪裝置利用釔鋁石榴石（Yttrium Aluminum Garnet，YAG）雷射器、釩酸釔（YVO4）雷射器或者將從它們發出的雷射通過第二高次諧波產生（Second Harmonic Generation，SHG）材料來進行波長轉換的綠光雷射器（green laser），以作為脈衝雷射器。而且，通過掃描光學系統來進行掃描，由此，能夠使雷射L2的照射區域發生變化。(Laser irradiation step) As shown in FIG. 5, in the laser irradiation step, the resin material 9 in the groove portion 5 is irradiated with laser L2 to remove the resin material 9 in the groove portion 5 (9 b ). As the laser L2, you can use Yttrium Aluminum Garnet (YAG) lasers, YVO4 lasers, or the lasers emitted from them through the second high-order harmonics for the laser oscillator. A green laser that uses Second Harmonic Generation (SHG) materials to perform wavelength conversion as a pulse laser. Furthermore, by scanning by the scanning optical system, the irradiation area of the laser L2 can be changed.

根據樹脂材9的材質或樹脂材9（9b）的尺寸（槽部5的槽寬W1等）來使雷射L2的波長、功率、雷射直徑、照射時間等最佳化，以便能夠高效地去除樹脂材9（9b）。作為雷射L2的振盪裝置，也可利用與用於雷射標記（圖3）的振盪裝置為相同者。According to the material of the resin material 9 or the size of the resin material 9 (9b) (the groove width W1 of the groove part 5, etc.), the wavelength, power, laser diameter, irradiation time, etc. of the laser L2 are optimized so as to be efficient Remove resin 9 (9b). As the oscillating device of the laser L2, the same oscillating device used for the laser marker (Figure 3) can also be used.

（鍍敷步驟） 如圖6所示，在去除了槽部5內的樹脂材9（9b）後，對引線框架1進行鍍敷處理。在引線框架1的晶片焊墊2、引線框架1的連接條4的表面、及槽部5的表面形成鍍敷層10。此處，作為鍍敷層10的材料，可根據被用於安裝的焊料材料來選定焊料濡性良好的材料。例如，在使用Sn（錫）系焊料的情況下，可使用錫（Sn）、錫-銅合金（Sn-Cu）、錫-銀合金（Sn-Ag）、錫-鉍（Sn-Bi），也能夠採用對引線框架1側的基底使用Ni的積層體的鍍敷層10。(Plating step) As shown in FIG. 6, after removing the resin material 9 (9b) in the groove part 5, the lead frame 1 is plated. The plating layer 10 is formed on the surface of the die pad 2 of the lead frame 1, the connection bar 4 of the lead frame 1, and the surface of the groove 5. Here, as the material of the plating layer 10, a material with good solder wettability can be selected according to the solder material used for mounting. For example, in the case of using Sn (tin) solder, tin (Sn), tin-copper alloy (Sn-Cu), tin-silver alloy (Sn-Ag), tin-bismuth (Sn-Bi) can be used, It is also possible to use the plating layer 10 of a laminate using Ni for the base on the lead frame 1 side.

在鍍敷步驟中，可在對引線框架1進行了規定的清洗處理後進行鍍敷處理。作為鍍敷步驟的前處理的引線框架1的表面處理，除了清洗處理以外，還可進行用於氧化膜的去除、表面活性化等的處理。槽部5內的樹脂材9（9b）有時會受到雷射的照射而改質（例如碳化），即使在槽部5內殘存有少許樹脂材9（9b）的情況下，也能夠通過進行鍍敷處理之前的清洗處理等表面處理來從槽部5內去除已改質的樹脂材9（9b）。In the plating step, the lead frame 1 may be subjected to a predetermined cleaning treatment and then the plating treatment may be performed. As the surface treatment of the lead frame 1 as a pretreatment of the plating step, in addition to the cleaning treatment, treatments for removal of an oxide film, surface activation, and the like may be performed. The resin material 9 (9b) in the groove 5 may be modified (for example, carbonized) by irradiation of the laser. Even if a small amount of the resin 9 (9b) remains in the groove 5, it can be The surface treatment such as cleaning treatment before the plating treatment removes the modified resin material 9 from the inside of the groove 5 (9b).

對於進行一邊參照圖3一邊說明的雷射標記的步驟，也可取代在樹脂密封步驟與雷射照射步驟之間的進行，而在所述雷射照射步驟與所述鍍敷步驟之間進行，或者，除了在樹脂密封步驟與雷射照射步驟之間進行以外，還在所述雷射照射步驟與所述鍍敷步驟之間進行。The step of performing the laser marking described with reference to FIG. 3 may be performed between the resin sealing step and the laser irradiation step, and may be performed between the laser irradiation step and the plating step. Alternatively, in addition to being performed between the resin sealing step and the laser irradiation step, it is also performed between the laser irradiation step and the plating step.

（切斷步驟） 如圖7所示，沿著槽部5來切斷進行了鍍敷處理的引線框架1。在所述切斷步驟中，使用具有寬度W2的刀片（blade）12來切斷引線框架1及樹脂材9的整個厚度部分。寬度W2是比槽部5的槽寬W1（圖1、圖2）小的值。(Cutting step) As shown in FIG. 7, the lead frame 1 subjected to the plating process is cut along the groove 5. In the cutting step, a blade 12 having a width W2 is used to cut the entire thickness of the lead frame 1 and the resin material 9. The width W2 is a value smaller than the groove width W1 (FIGS. 1 and 2) of the groove portion 5.

在此切斷步驟中，也可使用雷射來切斷引線框架1。作為雷射的振盪裝置，既可利用與用於雷射標記（圖3）的振盪裝置為相同者，也可利用與在雷射照射步驟中用於去除樹脂材9（9b）的振盪裝置為相同者。作為雷射的振盪裝置，也能夠將用於雷射標記（圖3）的振盪裝置、在雷射照射步驟中用於去除樹脂材9（9b）的振盪裝置、以及在此切斷步驟中使用的振盪裝置共用化，從而利用一台裝置來進行所述的各步驟。但是，優選的是，根據引線框架1的材料來使用引線框架1容易吸收的波長的雷射。In this cutting step, a laser can also be used to cut the lead frame 1. As the laser oscillating device, either the same as the oscillating device used for the laser marker (Figure 3), or the oscillating device used to remove the resin material 9 (9b) in the laser irradiation step can be used as The same. As the laser oscillation device, it is also possible to use the oscillation device used for the laser mark (FIG. 3), the oscillation device used to remove the resin material 9 (9b) in the laser irradiation step, and the oscillation device used in this cutting step. The oscillating device is shared, so that one device is used to perform the steps described above. However, it is preferable to use a laser of a wavelength that is easily absorbed by the lead frame 1 according to the material of the lead frame 1.

通過切斷步驟的實施，得到多個半導體裝置11。如圖8所示，半導體裝置11是在俯視時電性連接用的引腳不會突出到製品外部的QFN型的無引腳型製品。Through the implementation of the cutting step, a plurality of semiconductor devices 11 are obtained. As shown in FIG. 8, the semiconductor device 11 is a QFN-type leadless product in which pins for electrical connection do not protrude to the outside of the product when viewed from above.

如圖9所示，在半導體裝置11中，在各引腳3的側部（單側部）形成有階差，在引腳3的側面3a，未形成有鍍敷層10而原本的金屬露出。半導體裝置11例如是將樹脂材9側朝上、將引腳3側朝下而安裝於印刷基板。在印刷基板，在與引腳3對應的位置形成有焊盤13，引腳3與焊盤13經由焊料14而連接。As shown in FIG. 9, in the semiconductor device 11, a step is formed on the side (single side) of each lead 3, and on the side 3a of the lead 3, the plating layer 10 is not formed and the original metal is exposed . For example, the semiconductor device 11 is mounted on a printed circuit board with the resin material 9 side facing up and the lead 3 side facing down. On the printed circuit board, a land 13 is formed at a position corresponding to the lead 3, and the lead 3 and the land 13 are connected via solder 14.

（作用及效果） 如在開頭所述的，在日本專利特開2011-77278號公報所公開的半導體裝置的製造方法中，在通過鍍敷膜來包覆引腳的表面後，進行樹脂密封。對用於密封的樹脂材中的、與鍍敷膜接觸的部分照射雷射，以局部去除樹脂材，由此，使包覆著引腳表面的鍍敷膜露出至外部。所述製造方法中，在通過雷射照射來去除與鍍敷膜接觸的樹脂材時，鍍敷膜容易產生損傷等，作為鍍敷膜的功能，甚而作為半導體裝置的品質有可能下降。另外，日本專利特開2011-77278號公報所記載的發明中，根據請求項7及請求項8等的記載可明確的是，在對引線框架進行雷射照射之前，必須通過鍍敷膜來包覆引線框架的表面，而從日本專利特開2011-77278號公報得不到在未包覆鍍敷膜的狀態下進行雷射照射這一改變。(Function and effect) As mentioned at the beginning, in the method of manufacturing a semiconductor device disclosed in Japanese Patent Application Laid-Open No. 2011-77278, the surface of the lead is coated with a plating film, and then resin sealing is performed. The part of the resin material used for sealing that is in contact with the plating film is irradiated with a laser to partially remove the resin material, thereby exposing the plating film covering the pin surface to the outside. In the above-mentioned manufacturing method, when the resin material in contact with the plating film is removed by laser irradiation, the plating film is likely to be damaged, etc., and the function of the plating film may decrease the quality as a semiconductor device. In addition, in the invention described in Japanese Patent Laid-Open No. 2011-77278, it is clear from claims 7 and 8 that the lead frame must be coated with a plating film before laser irradiation is performed. The surface of the lead frame is covered, but from Japanese Patent Laid-Open No. 2011-77278, it is impossible to obtain a change in laser irradiation in a state where the plating film is not covered.

與此相對，實施方式的製造方法中，對槽部5內的樹脂材9照射雷射L2以去除槽部5內的樹脂材9，在去除了槽部5內的樹脂材9後對引線框架1進行鍍敷處理。鍍敷層10不會受到因雷射L2的照射引起的損傷。因此，實施方式的製造方法中，與所述以往方法相比，能夠獲得作為鍍敷層10、甚而作為半導體裝置11的高品質。In contrast, in the manufacturing method of the embodiment, the resin material 9 in the groove portion 5 is irradiated with the laser L2 to remove the resin material 9 in the groove portion 5, and after the resin material 9 in the groove portion 5 is removed, the lead frame 1 Perform plating treatment. The plating layer 10 is not damaged by the irradiation of the laser L2. Therefore, in the manufacturing method of the embodiment, it is possible to obtain high quality as the plating layer 10 and even as the semiconductor device 11 compared with the above-mentioned conventional method.

作為雷射L2的振盪裝置，也可利用與用於雷射標記（圖3）的振盪裝置為相同者。為了去除槽部5內的樹脂材9，通過使用既存或現有的雷射標記裝置，從而也可無須新引入設備等，能夠實現設備投資所需的成本的降低。對於根據實施方式的製造方法而獲得的其他的作用及效果，以下一邊與比較例1、比較例2進行對比，一邊作進一步說明。As the oscillating device of the laser L2, the same oscillating device used for the laser marker (Figure 3) can also be used. In order to remove the resin material 9 in the groove portion 5, by using an existing or existing laser marking device, there is no need to introduce new equipment, etc., and the cost required for equipment investment can be reduced. The other functions and effects obtained by the manufacturing method of the embodiment will be further described below while comparing with Comparative Example 1 and Comparative Example 2.

（比較例1） 圖10表示了比較例1的半導體裝置的製造方法。圖10的（A）～圖10的（C）分別對應於實施方式中的圖2～圖4。(Comparative example 1) FIG. 10 shows the manufacturing method of the semiconductor device of Comparative Example 1. FIG. FIGS. 10(A) to 10(C) respectively correspond to FIGS. 2 to 4 in the embodiment.

如圖10的（A）所示，在引線框架21的連接條24預先形成有槽部23。槽部23的槽寬被設定為比實施方式中的槽寬W1窄。在引線框架21的表面，貼附有保護膜22。在此狀態下進行樹脂密封，如圖10的（B）所示那樣形成樹脂材25。隨後，如圖10的（C）所示，從引線框架21剝離保護膜22。As shown in (A) of FIG. 10, a groove 23 is formed in advance in the connecting bar 24 of the lead frame 21. The groove width of the groove portion 23 is set to be narrower than the groove width W1 in the embodiment. On the surface of the lead frame 21, a protective film 22 is attached. Resin sealing is performed in this state, and the resin material 25 is formed as shown in FIG. 10(B). Subsequently, as shown in (C) of FIG. 10, the protective film 22 is peeled off from the lead frame 21.

如圖10的（D）所示，形成鍍敷層26。隨後，如圖10的（E）所示，使用刀片27來切斷引線框架21及樹脂材25的整個厚度部分。刀片27的寬度是比槽部23的槽寬大的值。通過以上的步驟，得到圖11所示的半導體裝置28。圖11對應於實施方式中的圖9。As shown in FIG. 10(D), a plating layer 26 is formed. Subsequently, as shown in (E) of FIG. 10, the blade 27 is used to cut the entire thickness of the lead frame 21 and the resin material 25. The width of the blade 27 is a value larger than the groove width of the groove portion 23. Through the above steps, the semiconductor device 28 shown in FIG. 11 is obtained. FIG. 11 corresponds to FIG. 9 in the embodiment.

在半導體裝置28中，在鍍敷層26的形成後，實施所謂的全切（full cut），即通過刀片27來切斷引線框架21（連接條24）的整個厚度部分，因此切剖面的整體會在連接條24（引腳）的側面23a露出。在安裝至印刷基板等後，露出的金屬仍會就這樣露出。In the semiconductor device 28, after the plating layer 26 is formed, a so-called full cut is performed, that is, the entire thickness of the lead frame 21 (connecting bar 24) is cut by the blade 27, so that the entire cross-section is cut It will be exposed on the side surface 23a of the connecting bar 24 (pin). After mounting on a printed circuit board, etc., the exposed metal will still be exposed in this way.

在比較例1的情況下，與圖9所示的實施方式的情況相比，引腳中的與焊料14接觸的面積小。因此，比較例1（圖11）的情況下的安裝強度容易變得比實施方式的情況小。這也成為外觀檢查時的檢測力下降的原因，有可能造成外觀檢查的困難性。In the case of Comparative Example 1, compared with the case of the embodiment shown in FIG. 9, the area in contact with the solder 14 in the lead is small. Therefore, the mounting strength in the case of Comparative Example 1 (FIG. 11) tends to be lower than that in the case of the embodiment. This also becomes a cause of the drop in detection power during visual inspection, which may cause difficulty in visual inspection.

（比較例2） 圖12表示了比較例2中的半導體裝置的製造方法。圖12的（A）～圖12的（C）與比較例1的圖10的（A）～圖10的（C）分別相同。(Comparative example 2) FIG. 12 shows a method of manufacturing a semiconductor device in Comparative Example 2. FIG. FIGS. 12(A) to 12(C) are the same as FIGS. 10(A) to 10(C) of Comparative Example 1, respectively.

如圖12的（D）所示，在比較例2中，實施使用刀片29a的所謂的半切（half cut）。通過刀片29a，在存在槽部23的位置，形成比槽部23大的槽部23b（參照圖12的（E））。所述槽部23b的寬度比槽部23寬，且具有連接條24的約一半厚度的深度。As shown in (D) of FIG. 12, in Comparative Example 2, a so-called half cut using a blade 29 a was implemented. The blade 29a forms a groove portion 23b larger than the groove portion 23 at a position where the groove portion 23 exists (refer to FIG. 12(E)). The width of the groove portion 23 b is wider than that of the groove portion 23 and has a depth of about half of the thickness of the connecting bar 24.

隨後，如圖12的（E）所示，形成鍍敷層26。如圖12的（F）所示，使用刀片29b來切斷引線框架21及樹脂材25的整個厚度部分。刀片27的寬度是比槽部23b的槽寬小的值。根據以上的步驟，與比較例1的情況不同，能夠減小金屬在引腳側面的露出，也能獲得安裝強度及外觀檢查的容易性。Subsequently, as shown in (E) of FIG. 12, a plating layer 26 is formed. As shown in FIG. 12(F), the blade 29b is used to cut the entire thickness of the lead frame 21 and the resin material 25. The width of the blade 27 is a value smaller than the groove width of the groove portion 23b. According to the above steps, unlike the case of Comparative Example 1, the exposure of the metal on the side of the lead can be reduced, and the mounting strength and the ease of appearance inspection can also be obtained.

但是，在比較例2的情況下，要使用兩種刀片29a、29b，因此容易造成製造費用的增加。由於進行使用刀片29a、刀片29b的兩階段的切斷，因此有可能造成用於去除切割毛刺的工時、或鍍敷步驟中的蝕刻處理工時的增加。還有可能造成切割裝置的生產能力的減少。However, in the case of Comparative Example 2, two types of blades 29a and 29b are used, which easily causes an increase in manufacturing cost. Since the two-stage cutting using the blade 29a and the blade 29b is performed, there is a possibility that the man-hours for removing cutting burrs or the etching process man-hours in the plating step may increase. It may also cause a reduction in the production capacity of the cutting device.

而且，在比較例2的情況下，在實施借助刀片29a的半切時，必須進行切割深度的不均的管理。若切割深度過剩，則引線框架21會斷裂而無法進行電鍍處理，若切割深度不足，則難以在引腳的側面26a適當地形成鍍敷層26。Furthermore, in the case of Comparative Example 2, when performing half-cutting with the blade 29a, it is necessary to manage the unevenness of the cutting depth. If the cutting depth is excessive, the lead frame 21 will be broken and the plating process cannot be performed. If the cutting depth is insufficient, it will be difficult to form the plating layer 26 appropriately on the side surface 26a of the lead.

在比較例2的情況下，還必須充分考慮刀片29a、刀片29b的相對切割位置的誤差等。例如假設：通過刀片29a，在比設定值靠圖12的（D）中的紙面左側的位置進行半切，通過刀片29b，在比設定值靠圖12的（F）中的紙面右側的位置進行半切。此時，形成在引腳側面26a的鍍敷層26有可能在通過刀片29b進行切割時被削除。In the case of Comparative Example 2, it is also necessary to fully consider the error of the relative cutting positions of the blade 29a and the blade 29b. For example, suppose that the blade 29a is used to perform half-cutting at a position closer to the left side of the paper in Fig. 12(D) than the set value, and the blade 29b is used to perform half-cutting at a position closer to the right side of the paper in Fig. 12(F) than the set value. . At this time, there is a possibility that the plating layer 26 formed on the side surface 26a of the lead may be scraped off when cutting by the blade 29b.

根據所述的實施方式的製造方法，不存在這些顧慮。即，取代實施半切，而在連接條4預先形成槽部5。所述槽部5例如具有相當於通過半切而形成的槽部23b的尺寸。形成在槽部5內的樹脂材9（9b）通過雷射照射而被去除。隨後形成鍍敷層10，因此也不會產生因雷射照射造成的鍍敷層10的損傷。鍍敷處理後，通過與比較例2同樣的方法，使用刀片12（圖7）來進行單片化。According to the manufacturing method of the described embodiment, there are no such concerns. That is, instead of performing half-cutting, the groove portion 5 is formed in the connecting strip 4 in advance. The groove portion 5 has, for example, a size equivalent to the groove portion 23b formed by half-cutting. The resin material 9 (9b) formed in the groove part 5 is removed by laser irradiation. Then, the plating layer 10 is formed, so there is no damage to the plating layer 10 caused by laser irradiation. After the plating treatment, by the same method as in Comparative Example 2, the blade 12 (FIG. 7) was used for singulation.

由於並未為了在引腳3形成露出面積小的側面3a而進行使用刀片29a的半切，因此能夠確保加工精度高的側面3a甚而引腳3。由於不進行使用刀片29a的半切，因此不會受到半切所形成的切割深度的影響，因而能夠在製品整體上獲得具有精度高且均勻的引腳3（側面3a）的半導體裝置11。在通過刀片12來進行的最終的全切時，不受半切所形成的切割位置的影響，因此與比較例2的情況相比，能夠改善單片化時的成品率。Since the half-cut using the blade 29a is not performed to form the side surface 3a with a small exposed area on the lead 3, it is possible to ensure the side surface 3a and even the lead 3 with high processing accuracy. Since half-cutting using the blade 29a is not performed, it is not affected by the cutting depth formed by the half-cutting, and therefore it is possible to obtain a semiconductor device 11 having high-precision and uniform leads 3 (side 3a) on the entire product. In the final full cut by the blade 12, it is not affected by the cutting position formed by the half cut. Therefore, compared with the case of Comparative Example 2, the yield at the time of singulation can be improved.

對實施方式進行了說明，但應認為，本次公開的實施方式在所有方面僅為例示而非限制者。本發明的範圍是由申請專利範圍所示，且意圖包含與申請專利範圍均等的含義及範圍內的所有變更。Although the embodiment has been described, it should be considered that the embodiment disclosed this time is merely illustrative in all points and not restrictive. The scope of the present invention is shown by the scope of the patent application, and intends to include the meaning equivalent to the scope of the patent application and all changes within the scope.

1、21:引線框架 2:晶片焊墊 3:引腳 3a、23a、26a:側面 4、24:連接條 5、23、23b:槽部 6:半導體晶片 7:接合線 8、22:保護膜 9、9b、25:樹脂材 9a:表面 10、26:鍍敷層 11、28:半導體裝置 12、27、29a、29b:刀片 13:焊盤 14:焊料 L1、L2:雷射 W1:槽寬 W2:寬度1, 21: lead frame 2: Chip pad 3: pin 3a, 23a, 26a: side 4.24: Connecting bar 5, 23, 23b: Groove 6: Semiconductor wafer 7: Bonding wire 8, 22: protective film 9, 9b, 25: resin material 9a: surface 10.26: Plating layer 11, 28: Semiconductor device 12, 27, 29a, 29b: blade 13: pad 14: Solder L1, L2: Laser W1: groove width W2: width

圖1是表示在準備步驟中準備的引線框架與多個半導體晶片的平面圖。 圖2是沿著圖1中的II-II線的箭頭剖面圖，表示了在形成有槽部的引線框架（晶片焊墊（die pad））上接合有半導體晶片的狀態。 圖3是表示進行了樹脂密封步驟的狀態的剖面圖。 圖4是表示在進行雷射照射步驟之前去除了保護膜的狀態的剖面圖。 圖5是表示正在進行雷射照射步驟的情況的剖面圖。 圖6是表示進行了鍍敷步驟後的情況的剖面圖。 圖7是表示正在進行切斷步驟的情況的剖面圖。 圖8是表示通過實施方式的製造方法而獲得的半導體裝置的立體圖。 圖9是表示安裝有通過實施方式的製造方法而獲得的半導體裝置的情況的剖面圖。 圖10是表示比較例1的半導體裝置的製造方法的各步驟的剖面圖。 圖11是表示安裝有通過比較例1的半導體裝置的製造方法而獲得的半導體裝置的情況的剖面圖。 圖12是表示比較例2的半導體裝置的製造方法的各步驟的剖面圖。FIG. 1 is a plan view showing a lead frame and a plurality of semiconductor wafers prepared in the preparation step. 2 is an arrow cross-sectional view along the II-II line in FIG. 1 and shows a state where a semiconductor wafer is bonded to a lead frame (die pad) in which a groove is formed. Fig. 3 is a cross-sectional view showing a state in which a resin sealing step has been performed. 4 is a cross-sectional view showing a state where the protective film is removed before the laser irradiation step. Fig. 5 is a cross-sectional view showing a situation in which a laser irradiation step is being performed. Fig. 6 is a cross-sectional view showing a state after a plating step has been performed. Fig. 7 is a cross-sectional view showing a state in which a cutting step is being performed. FIG. 8 is a perspective view showing a semiconductor device obtained by the manufacturing method of the embodiment. 9 is a cross-sectional view showing a state where the semiconductor device obtained by the manufacturing method of the embodiment is mounted. 10 is a cross-sectional view showing each step of a method of manufacturing a semiconductor device of Comparative Example 1. FIG. 11 is a cross-sectional view showing a state where a semiconductor device obtained by the method of manufacturing a semiconductor device of Comparative Example 1 is mounted. 12 is a cross-sectional view showing each step of a method of manufacturing a semiconductor device of Comparative Example 2. FIG.

1:引線框架 1: Lead frame

2:晶片焊墊 2: Chip pad

3:引腳 3: pin

4:連接條 4: connecting bar

5:槽部 5: Groove

6:半導體晶片 6: Semiconductor wafer

7:接合線 7: Bonding wire

9、9b:樹脂材 9, 9b: Resin material

9a:表面 9a: surface

L2:雷射 L2: Laser

Claims (8)

一種半導體裝置的製造方法，包括：樹脂密封步驟，在形成有槽部的引線框架接合有半導體晶片的狀態下，通過樹脂材來密封所述引線框架及所述半導體晶片，所述槽部是形成在所述引線框架中與搭載所述半導體晶片的側為相反側的表面；雷射照射步驟，從所述引線框架中與搭載所述半導體晶片的側的相反側對所述槽部內的所述樹脂材照射雷射，以去除所述槽部內的所述樹脂材；鍍敷步驟，在去除了所述槽部內的所述樹脂材後，對所述引線框架進行鍍敷處理；以及切斷步驟，沿著所述槽部來切斷進行了所述鍍敷處理的所述引線框架。 A method of manufacturing a semiconductor device includes: a resin sealing step, in a state where a semiconductor wafer is joined to a lead frame formed with a groove portion, the lead frame and the semiconductor wafer are sealed with a resin material, and the groove portion is formed In the lead frame, the surface on the opposite side to the side on which the semiconductor wafer is mounted is the surface; the laser irradiation step includes facing the side of the lead frame on the side opposite to the side on which the semiconductor wafer is mounted. The resin material is irradiated with a laser to remove the resin material in the groove portion; a plating step, after the resin material in the groove portion is removed, the lead frame is plated; and a cutting step , Cutting the lead frame subjected to the plating process along the groove. 如請求項1所述的半導體裝置的製造方法，還包括下述步驟：在所述樹脂密封步驟與所述雷射照射步驟之間、或者在所述雷射照射步驟與所述鍍敷步驟之間，對所述樹脂材中與所述引線框架的所述槽部為相反側的表面進行雷射標記。 The method of manufacturing a semiconductor device according to claim 1, further comprising the step of: between the resin sealing step and the laser irradiation step, or between the laser irradiation step and the plating step In the meantime, laser marking is performed on the surface of the resin material on the opposite side to the groove portion of the lead frame. 如請求項1或請求項2所述的半導體裝置的製造方法，其中在所述鍍敷步驟中，在對所述引線框架進行清洗處理後進行所述鍍敷處理。 The method of manufacturing a semiconductor device according to claim 1 or 2, wherein in the plating step, the plating treatment is performed after the lead frame is cleaned. 如請求項1或請求項2所述的半導體裝置的製造方法，其中所述槽部是通過對所述引線框架進行蝕刻而形成。 The method of manufacturing a semiconductor device according to claim 1 or 2, wherein the groove portion is formed by etching the lead frame. 如請求項1或請求項2所述的半導體裝置的製造方法，還包括下述步驟：在所述樹脂密封步驟之前，在所述引線框架的所述槽部側貼附保護膜；以及在所述雷射照射步驟之前，從所述引線框架剝離所述保護膜。 The method of manufacturing a semiconductor device according to claim 1 or claim 2, further comprising the steps of: attaching a protective film to the groove portion side of the lead frame before the resin sealing step; and Before the laser irradiation step, the protective film is peeled off from the lead frame. 如請求項1或請求項2所述的半導體裝置的製造方法，其中在所述切斷步驟中，使用刀片或雷射來切斷所述引線框架。 The method of manufacturing a semiconductor device according to claim 1 or 2, wherein in the cutting step, a blade or a laser is used to cut the lead frame. 如請求項1或請求項2所述的半導體裝置的製造方法，其中通過所述樹脂材來密封與所述引線框架的所述槽部側的相反側。 The method of manufacturing a semiconductor device according to claim 1 or 2, wherein the resin material is used to seal the side opposite to the groove portion side of the lead frame. 如請求項1或請求項2所述的半導體裝置的製造方法，其中在所述切斷步驟中，切斷密封有所述半導體晶片的所述樹脂材及所述引線框架的整個厚度部分。 The method of manufacturing a semiconductor device according to claim 1 or 2, wherein in the cutting step, the entire thickness of the resin material and the lead frame in which the semiconductor wafer is sealed is cut.
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