TW584896B - TFT-LCD capacitor and a method of manufacturing the same - Google Patents

Abstract

A TFT-LCD capacitor and a method of manufacturing the same are provided. The capacitor comprises a lower electrode, a dielectric layer on the lower electrode, and an upper electrode on the dielectric layer, wherein the dielectric layer comprises a first part between the lower electrode and the upper electrode, and a second part except for the first part. The thickness of the first part is thinner than that of the second part and thicker than the breakdown thickness of the dielectric layer. Therefore, it can increase the capacitance in the capacitor and the opening rate of the pixel by reducing the thickness between electrodes.

Description

584896 Heart ------- V. Description of the invention (1) The technology of the invention belongs to the present invention. The present invention relates to a thin film transistor liquid crystal display (TFT-LCD) element and its manufacturing and production. The sun s 丨 θ ^ ^ method, and specifically, about a kind of transistor liquid crystal display storage + six "~ to" · stem 4 cough manufacturing method. With the development of high-tech 'video products, Stora §e capacity and its previous technology. Mouthpieces, especially digital or shirt-like devices, have become common products in everyday life. i In some digitized video or imaging devices, the display is an important component to display related information. Users can read information from the display and control the operation of the device ... In order to match the modern living mode, the size of video or video devices is becoming thinner and lighter. Although the traditional cathode ray tube (CRT) still has its advantages, it requires a large volume and consumes electricity. Therefore, in conjunction with optoelectronic technology and semiconductor switch & technology, panel-type displays have been developed into common display products such as liquid crystal displays. ° Because LCD monitors have the advantages of low voltage operation, no radiation scattering, light weight, and small size, which are not accessible by traditional cathode ray tube displays, they have become the main topic of display research in recent years, and they are regarded as ten The mainstream of display devices in the first century. At present, the development of liquid crystal displays, with active matrix liquid crystal displays, is the most promising as the main product of the next generation. This is because when the scanning wiring (scan Hne) increases, if each pixel needs to be driven externally The duty time of each pixel knife will be reported less, and the result will make the display

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584896 V. Description of the invention (2) The characteristics are shown to be poor. The active matrix liquid crystal display directly forms an active element such as a transistor (transistor) at the p i xe j electrode to control the data writer of the liquid crystal display. one of them. The LCD display is regarded as the mainstream of current LCD displays. The pole is in a selected state (ie, π 0 is turned on) (ie, closed, η ^ ,, —, and the Tian Tiansu electrode is in a non-selected state). The potential of the crystal. Therefore, the storage capacitor can maintain the characteristics of the driving liquid. The liquid crystal and the driving time show a static storage charge · ㊁, thin: the method of the storage capacitor of the liquid crystal display. However Adding the area of the storage capacitor to the area of the thin film as the solution area will inevitably lead to the decrease of the book size (pixe ^^ s, increase the storage capacity ^ tio), and the opening rate of the two = j1Xel) (aperture display, shirt display) Effects and quality affect. F The purpose of the present invention is to provide a storage capacitor and its manufacturing method, 4 :, the crystalline liquid crystal display does not affect the aperture ratio of the pixel at the same time, a storage capacitor plus storage capacitor Another purpose of the invention is to provide a thin film storage capacitor and its manufacturing method. The area of the crystalline liquid crystal display is reduced to increase the opening of the day element. Ϊ; II provides - producing species transistor liquid crystal as "... method of 'μ • simultaneously energizing memory capacitor.

l〇256twf.ptd 584896 V. Description of the invention (3) and opening ratio of day element. According to the above and other objectives, the present invention proposes a thin storage capacitor for a display and a method for manufacturing the same *. The structure includes a liquid electrode, a dielectric layer on the lower electrode, and a dielectric layer on the dielectric layer: an upper electrode. , Wherein the dielectric layer includes a bit located between the lower electrode and the upper electrode, and a second portion other than the first portion, wherein the thickness of the first portion is smaller than the thickness of the second portion and larger than the breakdown of the dielectric layer Tolerance thickness, and the so-called "breakage tolerance thickness" refers to the thinnest thickness at which the dielectric layer will not be damaged. "The present invention also proposes a method for manufacturing a storage capacitor for an amorphous silicon thin film liquid crystal display, which can simultaneously manufacture an amorphous silicon thin film transistor, including first forming a first patterned metal layer on the surface of the substrate as a thin film transistor. An insulating layer is formed to cover the substrate and the gate electrode thereon. Then, a channel layer across the gate electrode is formed on the insulating layer. Then, a source / drain electrode including a thin film transistor and a storage capacitor are formed on the substrate. One of the lower electrodes is a second patterned metal layer. Subsequently, a dielectric layer is formed on the substrate, and a portion of the dielectric layer is removed to form an opening exposing the source / drain electrode and reducing the area above the electrode below the storage capacitor. The thickness of the dielectric layer. Next, a conductive layer is formed on the substrate and filled in the opening, and the conductive layer formed on the electrode below the storage capacitor can be used as the upper electrode of the storage capacitor. The structure of a thin film transistor and a storage capacitor is composed of a thin film transistor and a storage capacitor. The thin film transistor has a gate, Channel layer, an insulating layer covering the substrate surface between the gate and the channel layer, and on both sides of the gate 10256twf.ptd Page 7 584896

The source / drain on the pass-through layer. Furthermore, there is a dielectric layer j, which covers the amorphous silicon thin film transistor. The storage capacitors located on the substrate and the thin-film transistor include at least the lower electrode, the upper electrode and the upper electrode, and the upper and lower electrodes. The thickness of the dielectric layer between the electrodes is smaller than the dielectric. Thickness of the layer: The thickness of the dielectric layer is tolerant of damage, and the upper electrode can be extended; on the non-transistor, and through the insulation layer, even one end of the non-thin layer is electrically connected. / And the electrode is etched, and another polycrystalline silicon thin film transistor liquid crystal display is written.

An island-like shape is formed on the board ... (.oi_isia:;, 2 wide insulation layer covers the substrate and the island-like polycrystalline stone layer thereon. The galvanic formation of the open electrode including the thin-film transistor and the storage capacitor-a patterned metal Then, an ion implantation process is performed, and a source / drain doped region is formed in the two I layers on the board. Then, the base dielectric layer is thick. Π °, + /, and the storage capacitance is reduced. Above the electrode is a metal > Also, a second filled hole is formed on the substrate

The metal port is: the second pattern on the lower electrode is formed on the lower electrode. The body layer is really close to the opening of the lower electrode, and the second metal dwelling layer is formed as the upper electrode, and then the moxibustion is formed on the substrate. The layer fills in the remaining openings. Benming Mingshan has developed a junction between a polycrystalline silicon thin film transistor and a storage capacitor.

V. Description of the invention (5) The structure is composed of a thin-mode band transistor having ~~ = Ba body and / storage capacitor, in which the thin film is more than a gate and an island, and an island below the gate. The polycrystalline silicon layer and the bit silicon layer have a layer insulating layer located between the gate layers, wherein the source / drain doped regions of the island-shaped polycrystal are °. The next channel region and the silicon thin film transistor located on both sides of the channel region. On the substrate, there is a dielectric layer covering the polycrystalline capacitor, which at least includes the storage of the polycrystalline silicon thin film transistor on the substrate and the upper electrode and the lower electrode; the I electrode and the upper electrode on the lower electrode are two! The thickness of the layer is smaller than the dielectric lightning: of-the inter-electrode dielectric layer, the tolerance between the electrodes in λ. The thickness of the upper support is larger than the dielectric layer between the electrodes, the insulating layer and the dielectric layer are extended to the polycrystalline silicon thin film transistor and are continuous. The electric layer is electrically connected to one of the source and one of the electrode doped regions. The present invention utilizes a reduction in capacitance: the capacitance of the storage capacitor is increased by the distance between the upper and lower electrodes of the storage capacitor to increase the 'invention of the invention because r 2 and' The same permittivity depends on the permittivity of the storage capacitor, hunting and reducing the distance between the upper and lower electrodes to increase the aperture ratio of the element, which can reduce the area of the storage capacitor, increase _ for the above of the invention: ϊ: image Display effect and quality. It is easy to understand, the following 拄 and # /, his purpose, characteristics, and advantages can be more clearly explained as follows: 牛 Λ 佳 EMBODIMENT, and in conjunction with the accompanying drawings, make detailed formulas

Figure 1C of the Sparxi thin-film transistor liquid crystal display. 584896

★ Figures 1A to 1CS] are schematic diagrams of the manufacturing process of the storage capacitors of an amorphous silicon silicon film transistor liquid crystal display according to the first embodiment of the present invention. Side view schematic diagram of this κ embodiment can be held on a substrate on the same day. Fabrication_Amorphous Shixi thin film transistor a. Part 1A, firstly, a first patterned metal 1 is formed on the surface of the substrate as a gate 1 of the amorphous silicon thin film transistor 110. 2. An insulating layer 104 is formed to cover the substrate 100 and the gate electrode 102 thereon. Then, a channel Uyer 106 is formed on the insulating layer 104 across the gate electrode 102. Thereafter, a second patterned metal layer including a source / drain (30111 ^ 6 / (11 ^ 111) 108) including an amorphous silicon thin film transistor 110 and a lower electrode 112 of the storage capacitor is formed on the substrate 100. Then, please refer to FIG. 1B to form a dielectric layer 1 1 4 'on the substrate 1 00', wherein the material of the dielectric layer 11 4 is, for example, silicon nitride or silicon oxide. Then, 'such as controlling the lithography process is used. Part of the dielectric layer 1 丨 4 is removed, so that the thickness of the dielectric layer above the lower electrode 112 is reduced to become an inter-electrode dielectric layer in the region 116 in the figure, and the source / drain 1 is exposed. 〇8's opening 1 2 2. Among them, 'the thickness of the inter-electrode dielectric layer is less than the thickness of the dielectric layer 114 and the thickness of the dielectric layer is greater than the break-tolerance thickness of the inter-electrode dielectric layer' and the so-called "breakage tolerance thickness ”Means the thinnest thickness of the dielectric layer that will not be damaged, so that the thickness of the dielectric layer 114 will not affect the efficiency of the storage capacitor because it is too thin. Please continue to refer to Figure 1B, which removes some of the dielectric layers 1 丨 4 For example, a photoresist layer 13 is formed on the substrate 100, and then exposed and developed. Shadowing process to remove the photoresist layer 1 1 3 on the opening 1 2 2 and the lower electrode 1 1 2

l〇256twf.ptd Page 10 584896 Description of the Five 'Invention (7) " — " " "-The photoresist layer 1 1 3 is thinned, and then the photoresist layer 丨 丨 3 is used as an etching mask. The dielectric layer 114 is etched so that the thickness of the dielectric layer 114 above the lower electrode 112 is reduced and an opening 22 is formed. Finally, the remaining photoresist layer 1 ^ 3 is removed. In addition, the etching process in the step of removing the dielectric layer 114 can be performed by a dry etching or a first stage dry etching and then a second stage wet etching. Next, referring to FIG. 1C, a conductive layer is formed on the substrate 100 and filled in the opening 122. The conductive layer formed on the lower electrode 112 serves as the electrode 118 above the storage capacitor 120. The material of the conductor layer is any conductive material. In this embodiment, the upper electrode 118 extends to the amorphous silicon thin film transistor 110 and penetrates the insulating layer 104 and the dielectric layer 114 to be electrically connected to one of the source / inverter 108. Connected. Second Embodiment When the present invention is applied to a storage capacitor for manufacturing a polycrystalline silicon thin film liquid crystal display, please refer to FIGS. 2A to 2D. Figures 2A to 2D are schematic side views of the manufacturing process of a storage capacitor for a polycrystalline silicon thin film liquid crystal display according to a second embodiment of the present invention. A polycrystalline silicon thin film transistor can be fabricated on a substrate at the same time. (2) Referring to FIG. 2A, an island-shaped poly-island layer 202 is first formed on the substrate 200, and then an insulating layer 20 6 is formed to cover the substrate 200 and the island-shaped poly-crystals thereon. Evening layer 202. After that, a first patterned metal layer is formed on the substrate 200, which includes a gate 204 formed on the island-shaped polycrystalline silicon layer 202 and a lower electrode 214 adjacent to the island-shaped polycrystalline silicon layer 202. Next, an ion implantation process 212 is performed to form a source in the island-shaped polycrystalline silicon layer 202.

10256twf.ptd Page 11 M4896 V. Description of the invention (8) / and the doping region 208, and the channel region 2.7 of the film-bound transistor 210 covered by the gate 204. Then, please refer to the figure ", to form a layer of interlayer 2 1 fi on the substrate 2000: the material is, for example, nitrided stone or oxidized stone. After that, a part of it will be referred to ii, / Make / € pole The thickness of the dielectric layer 216 above 214 is reduced to the inter-electrode dielectric layer in the region 218 in the figure, and the opening 22 2 of the source / drain doped region 208 is exposed. The thickness of the layer is smaller than that of the dielectric layer. The thickness of 216 is 215 and is greater than the dielectric thickness of the dielectric layer. The potential between the potentials; 丨 Please refer to FIG. 2B for the electrical layer, in which a part of the dielectric layer 216 is removed: if a photoresist layer 213 is formed on the substrate 200 first Then, the exposure and development processes are performed to remove the photoresist layer 2 13 on the opening 222 and to make the photoresist layer 21 3 on the lower electrode 214 thin, and then use the photoresist layer 2 丨 3 as an etching mask to intervene The electrical layer 2 1 6 is etched so that the thickness of the dielectric layer 2 丨 6; 1 above the lower electrode 2 丨 4 is reduced and an opening 222 is formed. Finally, the remaining photoresist layer 2 1 3 is removed. In addition, The etching process in the step of removing a part of the dielectric layer 2 1 6 can be a dry type etching or a first step Segment dry etching, and then perform a second stage wet etching. Next, referring to FIG. 2C, a first conductor layer filled in the opening 2 2 2 is formed on the substrate 2000 and extends to the lower electrode 214 As the electrode 2 24 on the storage capacitor 220, after the material of the first conductor layer is, for example, metal, referring to FIG. 2D, a second insulating layer 226 can be formed on the substrate 200. The second insulating layer 226 has a The second opening 228 exposes the upper electrode 224. Then, a second conductor layer 23 is formed on the substrate 200 and 10256twf.ptd is filled. Page 12 584896 V. Description of the invention (9) Into the second opening 228, where the stem is identified as 9 q η々4 丄 Mu electrical material. &Quot; 肀 The material of the first toad body layer 23 0 is any guide, except for this embodiment, which can be changed to the method shown in Figure 3. 图 3 is a continuation of the second eighth Figure? Fan He + „Jing Luo Luo Yue Gu-Tu 々 + + Polysilicon thin film electricity and liquid day by day”, “Side view of the manufacturing process of storage capacitors”, please refer to Figure 3 After ^ 圚 j shown in FIG. 2A to FIG. 2β, a third conductor layer is formed on the substrate 200 and filled in. The third electrode 4 is formed on the lower electrode 214:: electrode 302, where the material of the upper electrode 302 is any possible = upper f: a metal layer 30 can be formed on the substrate 20. Into the remaining opening m, the present invention utilizes narrowing the storage capacitor above and below the storage capacitor to increase the permittivity of the storage capacitor. Therefore, the opening ratio of (_plx⑴ (Aperture rati0), stored in the surface area of the electric energy, increasing the display effect and quality. Although the present invention has been disclosed in the preferred embodiment of the present invention, such as limiting the date and time of the issue, anyone skilled in this art: is not intended to be used as the definition of the scope of the attached patent Bao

584896 Brief description of the drawings Figures 1A to 1C are schematic side views of the manufacturing process of a storage capacitor for an amorphous silicon thin film liquid crystal display according to a first embodiment of the present invention. Figures 2A to 2 Figure D is a side view of the manufacturing process of the storage capacitor of the polycrystalline crystalline thin film transistor liquid crystal display device according to one of the second embodiments of the present invention; and Figure 3 is a continuation of Figures 2A to 2B. The manufacturing process of the storage capacitor shown in the polycrystalline silicon thin film liquid crystal shown in the figure is not intended from the side view. 100, 200: substrate 102, 204: gate 104, 206, 1 2 2 6: insulation layer 106, 207: channel layer 108: source / drain 110: amorphous silicon film Transistors 112, 214, lower electrodes 113, 213, photoresist layers 114, 216, dielectric layers 115, 215, thickness 116, 218, regions 118, 224, 302: upper electrodes 120: amorphous silicon thin film transistors 122, 222, 228: Kai V 202: Island Polycrystalline

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Claims (1)

584896 VI. Scope of patent application 1. A storage capacitor for a thin film transistor liquid crystal display, including a lower electrode; a dielectric layer; located on the lower electrode; and an upper electrode on the dielectric layer, wherein the dielectric The electrical layer includes: a first portion located between the lower electrode and the upper electrode; and a second portion located outside the first portion, wherein a thickness of the first portion is less than a thickness of the second portion and greater than This dielectric layer has a tolerant thickness. 2. The storage capacitor of the thin film transistor liquid crystal display as described in item 1 of the scope of patent application, wherein the material of the dielectric layer includes silicon nitride. 3. The storage capacitor of the thin film transistor liquid crystal display as described in item 1 of the scope of patent application, wherein the material of the dielectric layer includes silicon oxide. 4. The storage capacitor of the thin film transistor liquid crystal display as described in item 1 of the scope of patent application, wherein the material of the upper electrode is any conductive material. 5. The storage capacitor of the thin film transistor liquid crystal display according to item 1 of the scope of patent application, wherein the material of the upper electrode and the lower electrode includes a metal layer. 6. A method for manufacturing a storage capacitor for an amorphous silicon thin film liquid crystal display, which can simultaneously produce an amorphous silicon thin film transistor on a substrate, wherein the amorphous silicon thin film transistor includes at least a gate and a source / The drain electrode includes a method of forming a first patterned metal layer on the substrate as the gate electrode of the amorphous silicon thin film transistor; 10256twf.ptd Page 16 584896 6. Use the thickness to display the thickness and display the Cheng Dian to form an insulation layer covering the substrate and the gate with the scope of the patent application; on the insulation layer, form a cross across the gate A channel layer; forming a second patterned metal layer on the substrate, including a lower electrode and the source / drain of the amorphous silicon thin film transistor; forming a dielectric layer on the 4 substrate; removing a portion of the dielectric layer, The degree of the dielectric layer above the lower electrode is reduced to become an inter-electrode dielectric layer, and an opening exposing the source / electrode is formed; and a conductor layer is formed on the substrate to actually fill the opening. In this, the conductor layer on which the lower electrode is formed serves as the upper electrode. 7. The method for manufacturing a storage capacitor of an amorphous silicon thin film liquid crystal display device as described in item 6 of the scope of patent application, wherein the thickness of the dielectric layer between the electrodes is smaller than the thickness of the dielectric layer and larger than the dielectric between the electrodes. Electrical layer damage tolerance. 8 · The manufacturing method of the storage capacitor of the amorphous crystalline thin film transistor liquid crystal device as described in item 6 of the patent scope of the patent, wherein the step of removing a part of the intermediary step includes: · forming a photoresist layer on the substrate; Performing an exposure and development process on the photoresist layer to remove the photoresist layer on the opening and thinning the photoresist layer on the lower electrode; using the photoresist layer as an etching mask to the dielectric Etch a layer to reduce the thickness of the dielectric layer above the lower electrode to become a ^ inter-electrode dielectric layer, and form the openings exposing the source / drain electrodes. The patent scope removes this photoresist layer. 9. The method for manufacturing a storage capacitor for an amorphous silicon thin film transistor liquid crystal display according to item 8 of the scope of patent application, wherein the etching process includes a dry etching. 10. The method for manufacturing a storage capacitor of an amorphous stone thin film transistor liquid crystal display according to item 8 of the scope of the patent application, wherein the etching process includes: performing a first-stage dry etching: and performing a second-stage wet Type etching. 1 1. A structure of an amorphous silicon thin film transistor and a storage capacitor, located on a substrate, the structure includes: an amorphous silicon thin film transistor, located on the substrate, including at least: a gate; a channel layer, located On the gate; an insulating layer between the gate and the channel layer and covering the substrate surface; and a source / drain on the channel layer on both sides of the gate; a dielectric layer on On the substrate, the dielectric layer covers the amorphous silicon thin film transistor; and a storage capacitor located on the substrate and adjacent to the amorphous silicon thin film transistor, the storage capacitor includes at least: a lower electrode; an upper electrode located on the substrate; On the lower electrode and extending to the amorphous silicon thin film transistor, penetrating the insulating layer and the dielectric layer and being electrically connected to one end of the source / drain electrode; and 10256twf.ptd Page 18 584896 6. Scope of patent application: a dielectric layer between electrodes is located between the upper electrode and the lower electrode, wherein the thickness of the dielectric layer between the electrodes is smaller than the thickness of the dielectric layer and larger than the electrode Inter-dielectric layer damage tolerance thickness. 1 2. The structure of the amorphous silicon thin film transistor and the storage capacitor according to item 11 of the scope of the patent application, wherein the material of the dielectric layer includes silicon oxide. 1 3. The structure of the amorphous silicon thin film transistor and the storage capacitor according to item 11 of the scope of the patent application, wherein the material of the dielectric layer includes silicon nitride. 1 4. The structure of the amorphous silicon thin film transistor and the storage capacitor according to item 11 of the scope of the patent application, wherein the material of the lower electrode includes metal. 1 5. The structure of the amorphous silicon thin film transistor and the storage capacitor according to item 11 of the scope of the patent application, wherein the material of the upper electrode is any conductive material. 1 6. —A method for manufacturing a storage capacitor of a polycrystalline silicon thin film liquid crystal display, which can simultaneously produce a polycrystalline silicon thin film transistor on a substrate, wherein the polycrystalline silicon thin film transistor includes at least a gate and a plurality of source / drain doped A method for manufacturing a hetero region includes: forming an island-shaped polycrystalline silicon layer on the substrate; forming a first insulating layer covering the substrate and the island-shaped polycrystalline silicon layer; forming a patterned metal layer on the substrate, including forming the patterned metal layer The gate on the island polycrystalline silicon layer and the lower electrode adjacent to the island polycrystalline silicon layer; performing an ion implantation process to form the sources of the polycrystalline thin film transistor in the island polycrystalline silicon layer / > And a doping region, forming a dielectric layer on the substrate; 10256twf.ptd Page 19 584896 VI. Patent application scope to lower I "port 丨 " π electric Tt, so that the thickness of the thermal plant is reduced to become a plurality of dielectric layers between electrodes // and electrode doped regions An opening; forming a first conductor layer on the substrate to remove a portion of the dielectric layer, so that the dielectric layer above the lower electrode is reduced to a dielectric layer between the electrodes, and the sources are exposed to expose the sources And /% ^, the first conductor layer fills in the-openings and extends to the power-down: up, as an upper electrode: 1 7. Polycrystalline stone as described in item 6 of the patent application scope A storage capacitor dream method for a crystal liquid crystal display, wherein the thickness of the "tortoise layer" between the electrodes is smaller than the thickness of the dielectric layer and greater than the destruction of the dielectric layer between the electrodes. , Where "# a's material is any conductive bismuth pole 1 Q,.". The crystal of the first conductive layer of the thin film transistor liquid crystal of the service spar eve is significantly thin. The manufacturing method of the storage capacitor of the display device, the quality of which includes metal. 〇., #Polycrystalline crystalline thin film transistor liquid 20 · As the manufacturing method of the storage capacitor of the evening crystal display described in item 丨 9 of the patent application scope, the feeling is more: the insulating layer has a second layer formed on the substrate to form a second Insulation layer 'second opening, exposing the upper electrode; and ^-fill eight • one net, fill in the second opening " ",-the second conductor is a crystalline silicon thin film transistor liquid 2 1 · as applied for a patent The method for manufacturing the material of the second conductor layer described in the item 20 of the scope 'is formed on the substrate. The method for manufacturing the storage capacitor of the 20th m-crystal display as claimed in the patent application is any conductive material. Polycrystalline silicon thin film transistor 2 2 · As described in item 16 of the scope of patent application Η 10256twf.ptd Scope of patent application = Manufacturing method of storage capacitors' ... Except for a part of the dielectric layer, a photoresist layer is formed, and the photoresist layer is exposed and developed to remove the photoresist on the opening. Layer and thinning the photoresist layer on the lower electrode; using the photoresist layer as an etching mask, etching the dielectric layer to make the thickness of the dielectric layer above the lower electrode Reduced to become the inter-electrode dielectric layer and form the openings that expose the source / drain doped regions; and * remove the photoresist layer. 2 3 · The method for manufacturing a storage capacitor for a polycrystalline stone thin film transistor liquid crystal display device as described in item 22 of the patent application scope, wherein the etching process includes a dry contact etch. 24. The method for manufacturing a storage capacitor of a polycrystalline silicon thin film transistor as described in item 22 of the scope of the patent application, wherein the etching process includes: performing a first stage dry etching: and performing a second stage wet Type etching. 2 5 · — A structure of a polycrystalline silicon thin film transistor and a storage capacitor, which is located on a substrate, the structure includes: a polycrystalline thin thin crystal transistor located on the substrate, including at least: a gate electrode; A polycrystalline silicon layer is located under the gate, and the island-like multi-layered layer: a channel region and a source / non-doped region, wherein the channel region is located under the gate and the source / drain doped ^ bit 584896 6. The scope of patent application is on both sides of the channel area; and an insulating layer is located between the gate and the island-shaped polycrystalline silicon layer; a dielectric layer is located on the substrate, and the dielectric layer covers the polycrystalline silicon thin film. A crystal and a storage capacitor, located on the substrate and adjacent to the polycrystalline silicon thin film transistor, the storage capacitor includes at least: a lower electrode; an upper electrode located on the lower electrode and extending to the polycrystalline silicon thin film transistor, penetrating the polycrystalline silicon thin film transistor An insulating layer and the dielectric layer are electrically connected to one end of the source / drain doped region; and an inter-electrode dielectric layer is located between the upper electrode and the lower electrode, wherein the inter-electrode dielectric layer is The thickness is less than the thickness of the dielectric layer and greater than the damage tolerance thickness of the dielectric layer between the electrodes. 2 6. The structure of the polycrystalline silicon thin film transistor and the storage capacitor according to item 25 of the scope of the patent application, further comprising a conductor layer on the substrate and penetrating the insulating layer and the dielectric layer, and the source The other end of the / drain doped region is electrically connected. 2 7. The structure of the polycrystalline silicon thin film transistor and the storage capacitor according to item 25 of the scope of the patent application, wherein the material of the dielectric layer between the electrodes includes oxidized stone. 2 8. The structure of the polycrystalline silicon thin film transistor and the storage capacitor according to item 25 of the scope of the patent application, wherein the material of the dielectric layer between the electrodes includes nitride nitride. 10256twf.ptd Page 22 584896 6. Scope of patent application 2 9. The structure of the polycrystalline silicon thin film transistor and storage capacitor as described in item 25 of the scope of patent application, wherein the material of the upper electrode includes metal. 30. The structure of the polycrystalline silicon thin film transistor and the storage capacitor as described in item 25 of the scope of the patent application, wherein the material of the upper electrode is any conductive material. 10256twf.ptd Page 23