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TW201620089A - Chip package member of IC card, panel package board for forming the same, and forming method thereof - Google Patents

Chip package member of IC card, panel package board for forming the same, and forming method thereof Download PDF

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Publication number
TW201620089A
TW201620089A TW103140881A TW103140881A TW201620089A TW 201620089 A TW201620089 A TW 201620089A TW 103140881 A TW103140881 A TW 103140881A TW 103140881 A TW103140881 A TW 103140881A TW 201620089 A TW201620089 A TW 201620089A
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card
chip
layer
sim card
sheet
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TW103140881A
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Chinese (zh)
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TWI569383B (en
Inventor
Da-Lun Song
ze-ming Qu
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Mao Bang Electronic Co Ltd
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Abstract

The present invention provides a chip package member of IC card, a panel package board for forming the same, and a forming method thereof, wherein a panel carrier board layer is applied to manufacture plural chip modules arranged at intervals, and each chip module comprises a chip circuit layer pattern formed on a first surface of the panel carrier board layer and a die mounted on the opposite side of second surface and connected correspondingly to the chip circuit layer pattern. Then, at least a plastic package layer is formed on the second surface of the panel carrier board layer and integrated with the panel carrier board layer, so as to manufacture the panel package board for forming. Afterwards, a singularizing cutting process is performed to produce plural chip package members, so that the chip module of an IC card forms a panel chip substrate to be easily embedded and placed in an open slot of the IC card body thereby forming an IC card. As a result, the manufacturing end can mass-produce the chip package member and the IC card body with separated manufacture processes, respectively, and then easily assemble them together, so as to not only prevent the limitation of the proprietary machine table required in the prior manufacture process, but also reduce the material cost of carrier board layer, thereby meeting the demanding of mass production and increasing the economic benefits of smart card manufacture process.

Description

晶片卡之晶片封裝件及其成型用片狀封裝板與成型方法 Chip package for wafer card and sheet package board therefor and molding method thereof

本發明係有關一種晶片卡之晶片封裝件及其成型用片狀封裝板與成型方法,尤指一種將一晶片卡所使用之晶片模組作成一片體式晶片封裝件以當作一晶片基體供能簡易嵌置於一晶片卡體上所設一開口槽中以構成一晶片卡,藉以提昇晶片卡製程之經濟效益。 The present invention relates to a chip package for a wafer card and a sheet package board and a molding method therefor, and more particularly to a chip module used for a wafer card as a one-piece chip package to serve as a wafer substrate. It is easily embedded in an open slot provided on a wafer card body to form a wafer card, thereby improving the economic efficiency of the wafer card manufacturing process.

一般泛稱之晶片卡係指嵌設有一晶片模組之卡片,如智慧卡(SIM卡)、金融卡或信用卡等,其中該智慧卡係指用戶身份模組(Subscriber Identity Module,SIM),乃是用以保存行動電話服務的用戶身份識別數據的智慧卡,通稱為SIM卡,目前SIM卡可分為Mini(迷你)SIM卡、Micro(微)SIM卡及Nano(奈)SIM卡,其分別設具一預定之規格尺寸,如Mini SIM卡為一15mm x 25mm之矩形小卡體,Micro SIM卡為一15mm x 12mm之矩形小卡體,Nano SIM卡為一8.8mm x 12.3mm之矩形小卡體,上述各矩形卡體雖然並非呈現完整的矩形形狀,如其一邊角上設有切角,但因非本案之訴求重點且不影響本案之技術,故在此不再贅述。以習知SIM卡結構而言,其係利用一具有上述預定規格尺寸之矩形塑質小卡體如15mm x 25mm(Mini SIM卡)、15mm x 12mm(Micro SIM卡)或8.8mm x 12.3mm(Nano SIM卡),並於該矩形小卡體上預設一內凹之嵌槽供嵌設一符合該SIM卡功能之晶片模組 而構成;依目前SIM卡之相關技術而言,不論是Mini SIM卡、Micro SIM卡或Nano SIM卡,其上所嵌設之晶片模組的尺寸可設計為相同或約略相同,如此有利於SIM卡晶片模組或晶片卡之製造端的製程,但非用以限制本發明。 Generally speaking, a wafer card refers to a card embedded with a chip module, such as a smart card (SIM card), a financial card or a credit card. The smart card refers to a Subscriber Identity Module (SIM). The smart card used to store the user identification data of the mobile phone service is generally referred to as a SIM card. Currently, the SIM card can be divided into a Mini (mini) SIM card, a Micro (micro) SIM card, and a Nano (Nai) SIM card, which are respectively set. It has a predetermined size. For example, the Mini SIM card is a rectangular small card body of 15mm x 25mm, the Micro SIM card is a rectangular small card body of 15mm x 12mm, and the Nano SIM card is a rectangular small card of 8.8mm x 12.3mm. The rectangular card body does not have a complete rectangular shape, and if it has a chamfered corner, it is not a matter of the present invention and does not affect the technology of the present invention, and therefore will not be described herein. In the case of the conventional SIM card structure, it utilizes a rectangular plastic small card body having the above-mentioned predetermined size, such as a 15 mm x 25 mm (Mini SIM card), 15 mm x 12 mm (Micro SIM card) or 8.8 mm x 12.3 mm ( Nano SIM card), and a concave recessed groove is preset on the rectangular small card body for embedding a chip module conforming to the function of the SIM card According to the related technology of the current SIM card, whether it is a Mini SIM card, a Micro SIM card or a Nano SIM card, the size of the chip modules embedded thereon can be designed to be the same or about the same, which is advantageous for the SIM. The process of manufacturing the card chip module or wafer card is not intended to limit the invention.

以下所述之晶片卡係以智慧卡(SIM卡)為例說明,但非用 以限制本發明。參考圖1、2,其分別係習知之一卡一芯卡片中SIM卡之晶片模組與卡片本體組合及分解之立體示意圖。該一卡一芯卡片100包含一智慧卡(晶片卡)200及一承載用卡片本體300。該卡片本體300一般為一85.6mm x 53.98mm之矩形塑質片卡,由於晶片卡如金融卡或信用卡長久來已是大量製作及使用之物品,故該卡片本體300已成為晶片卡相關業界所認同之規格化片卡,換言之,用以製作該85.6mm x 53.98mm之矩形卡片本體之機械設備及其製程或相關技術等,目前皆相當齊備及成熟,有利於業界大量製作及使用,因此該卡片本體300也被相關業界延伸使用於製作及/或存放具有較小尺寸之SIM卡,如圖1、2所示該智慧卡200可依使用需要而選擇目前已有之SIM卡種類如Mini SIM卡之規格尺寸為15mm x 25mm、Micro SIM卡之規格尺寸為15mm x 12mm或Nano SIM卡之規格尺寸為8.8mm x 12.3mm中之一種,如圖1、2所示為以Mini SIM卡為例說明但不限制,由於製造端在製作時係在一承載用卡片本體300上只設單一片智慧卡200,故稱為一卡一芯,但亦可製成一卡多芯而不限制(參考圖12-16所示)。 The chip card described below is illustrated by a smart card (SIM card), but not used. To limit the invention. Referring to Figures 1 and 2, respectively, it is a schematic perspective view of a combination and decomposition of a chip module and a card body of a SIM card in a card-card. The one-card one-core card 100 includes a smart card (wafer card) 200 and a card body 300 for carrying. The card body 300 is generally a rectangular plastic chip card of 85.6 mm x 53.98 mm. Since the chip card, such as a financial card or a credit card, has been a large number of articles manufactured and used for a long time, the card body 300 has become a wafer card related industry. The standardized film card, in other words, the mechanical equipment for making the 85.6mm x 53.98mm rectangular card body and its manufacturing process or related technology, are currently quite mature and mature, which is beneficial to the mass production and use in the industry, so The card body 300 is also extended by the related art to manufacture and/or store a SIM card having a smaller size. As shown in FIG. 1 and FIG. 2, the smart card 200 can select a currently existing SIM card type such as Mini SIM according to the needs of use. The size of the card is 15mm x 25mm, the size of the Micro SIM card is 15mm x 12mm or the size of the Nano SIM card is 8.8mm x 12.3mm. Figure 1 and 2 show the Mini SIM card as an example. The description is not limited. Since the manufacturing end is only provided with a single smart card 200 on the card body 300 for manufacturing, it is called a card and a core, but can also be made into a card with multiple cores without limitation (refer to Figure 12-16 shows ).

該習知智慧卡200包含一卡片體201及一智慧卡晶片模組202 嵌置並黏固在該卡片體201上所設一晶片卡體(200)上所預設之嵌槽(盲槽)203中如圖2所示,其中該晶片模組202更包含一載板層204、一晶片電路層圖案205設在該載板層204之第一面上(如圖所示之上面)及一晶粒206組裝在 該載板層204之相對之第二面上(如圖所示之底面)並能對應連通於該晶片電路層圖案205。 The conventional smart card 200 includes a card body 201 and a smart card chip module 202. As shown in FIG. 2, the chip module 202 further includes a carrier plate, which is embedded and adhered to a predetermined slot (blind slot) 203 on a chip card body (200) disposed on the card body 201. A layer 204, a wafer circuit layer pattern 205 is disposed on the first side of the carrier layer 204 (as shown above) and a die 206 is assembled The opposite second side of the carrier layer 204 (the bottom surface as shown) can be correspondingly connected to the wafer circuit layer pattern 205.

以目前智慧卡(SIM卡)之製程技術而言,在此以圖1、2所 示一卡一芯卡片為例說明,該晶片模組202之製造端一般是使用一連續之長條狀軟性電路板(FPC)當作載板(圖未示),即一般通稱Roll to Roll FPC或Reel to Reel FPC(捲軸方式)之生產方式,而該長條狀FPC上沿其長度方向(即送料方向)依序形成有一連串以預定間距連續排列之晶片模組(202)(包含一晶片電路層圖案205及一晶粒206);之後,再配合承載用卡片本體300之製造端而利用已知的專用機台設備來進行智慧卡之後續製程,包含:由該長條狀FPC上取出單體化之卡晶片模組(202),再將各晶片模組(202)逐一組裝在相配合之卡片本體300上如圖2所示,以製成該一卡一芯卡片100。 In the current process technology of smart card (SIM card), here are shown in Figures 1 and 2. Taking a card as a core card as an example, the manufacturing end of the chip module 202 generally uses a continuous strip of flexible circuit board (FPC) as a carrier board (not shown), which is generally referred to as Roll to Roll FPC. Or a Reel to Reel FPC (reel mode) production method, and the long strip FPC is sequentially formed along its length direction (ie, the feeding direction) with a series of wafer modules (202) (including a wafer) continuously arranged at a predetermined pitch. a circuit layer pattern 205 and a die 206); and then, in conjunction with the manufacturing end of the card body 300 for carrying, a known dedicated machine device is used to perform the subsequent process of the smart card, including: taking out the long FPC The singulated card chip module (202) is assembled on the mating card body 300 one by one as shown in FIG. 2 to form the card-core card 100.

以習知一卡一芯卡片100之製程而言,在各卡片本體300上須 沖製出該智慧卡200之折裂線207供使用者方便由該一卡一芯卡片100中取出該智慧卡200,又於該智慧卡200之卡片層201表面上須藉刳刨工具(router)以刳刨出該嵌槽203供該智慧卡晶片模組202能嵌置其內,且該嵌槽203更須刳刨形成有一中央室腔208供容納該晶片模組202底面所設之晶粒206及一階梯槽209供該晶片模組202底面之四周緣能藉黏膠而黏固在該嵌槽203內;更且,上述製程目前皆是利用特殊設計之專用機台設備始能進行製作。 In the process of the conventional card-one card 100, it is required on each card body 300. The split line 207 of the smart card 200 is punched out for the user to conveniently remove the smart card 200 from the card-core card 100, and the router tool (router) is used on the surface of the card layer 201 of the smart card 200. The embedded slot 203 is configured to allow the smart card chip module 202 to be embedded therein, and the recessed groove 203 is further configured to form a central chamber 208 for accommodating the crystal on the bottom surface of the wafer module 202. The granules 206 and a stepped groove 209 can be adhered to the periphery of the bottom surface of the wafer module 202 by adhesive. In addition, the above processes are currently carried out by using special designed special machine equipment. Production.

由上可知,習知一卡一芯卡片100(或一卡多芯)之製程技 術會受到專用機台設備之限制,以致晶片模組202製造端及卡片本體300製造端之製程也受到限制,例如在習知製程中,從晶片模組202之製作包含各晶片電路層圖案205之形成作業及各晶粒206之安裝作業,至後續之製程作業如 將晶片模組202組裝在卡片本體300上,皆是採用Roll to Roll FPC或Reel to Reel FPC(捲軸方式)之生產加工方式,由於其是在一長條狀軟性電路板(FPC)上依序進行,故其機台結構不但較為煩雜,且製程相對較慢,難以達成量產化效益,而且以軟性電路板(FPC)來當作載板,也相對增加製程及材料成本,更造成晶片模組202製造端與卡片本體300製造端之間生產管制的困擾;此外,且該智慧卡200之卡片層201表面上須藉刳刨工具(router)以刳刨出供該晶片模組202嵌置於內之特殊嵌槽203,更增加刳刨加工之困難度及成本。因此,習知之製程技術不但無法達成量產化需求,而且製造成本相對提高,不符合生產智慧卡之經濟效益。 As can be seen from the above, the conventional one card one core card 100 (or one card multi-core) process technology The process is limited by the special machine equipment, so that the manufacturing process of the wafer module 202 and the manufacturing end of the card body 300 is also limited. For example, in the conventional process, the wafer module 202 is fabricated to include each wafer circuit layer pattern 205. The forming operation and the installation work of each die 206 are performed to subsequent process operations such as The wafer module 202 is assembled on the card body 300, which is manufactured by Roll to Roll FPC or Reel to Reel FPC (reel method), because it is sequentially arranged on a long flexible circuit board (FPC). Therefore, the structure of the machine is not only cumbersome, but also the process is relatively slow, it is difficult to achieve mass production benefits, and the use of a flexible circuit board (FPC) as a carrier plate also increases the process and material costs, and even causes the wafer die. The manufacturing control between the manufacturing end of the group 202 and the manufacturing end of the card body 300 is troubled; in addition, the surface of the card layer 201 of the smart card 200 is required to be grounded by the router for the chip module 202 to be embedded. The special inlay 203 inside increases the difficulty and cost of the planing process. Therefore, the conventional process technology can not only achieve the mass production demand, but also the manufacturing cost is relatively improved, which does not meet the economic benefits of the production smart card.

由上可知,針對晶片卡(智慧卡)之製程,如何發展一能 符合量產化需求並提昇經濟效益的晶片卡製程,乃為本發明亟欲解決的課題,而本發明即是針對上述欲解決的課題,而提出一具有新穎性及進步性之技術方案。 It can be seen from the above that how to develop a process for the process of wafer card (smart card) The wafer card manufacturing process which meets the demand for mass production and enhances economic benefits is an object to be solved by the present invention, and the present invention is directed to the above-mentioned problem to be solved, and proposes a technical solution having novelty and progress.

本發明之主要目的乃在於提供一種晶片卡之晶片封裝件及其成型用片狀封裝板與成型方法,其係利用一片狀(panel)載板層以製作多個間隔排列之晶片模組,各晶片模組包含一晶片電路層圖案形成在該片狀載板層之第一面上及一晶粒組裝在相對之第二面上並能對應連通該晶片電路層圖案,再於該片狀載板層之第二面上形成至少一塑料封裝層並結合成一體,藉此製成該成型用片狀封裝板;再進行單體化裁切以製成多個供晶片卡使用之晶片封裝件,藉此使該晶片封裝件成為一晶片基體而能簡易嵌置於一晶片卡體上所設一開口槽中以構成一晶片卡;藉此製造端能以分 開之製程分別量產化製作該晶片封裝件及該晶片卡體(或承載用卡片本體)並再簡易組合成一體,不但可避免受到習知製程技術所必備之專用機台的限制,並能降低載板層材料成本,故可符合量產化需求並提昇晶片卡製程之經濟效益。 The main object of the present invention is to provide a chip package for a wafer card and a sheet package board and a molding method thereof, which are formed by using a panel carrier layer to form a plurality of wafer modules arranged at intervals. Each of the wafer modules includes a chip circuit layer pattern formed on a first surface of the chip carrier layer and a die assembled on the opposite second surface and capable of correspondingly communicating the wafer circuit layer pattern, and then the sheet Forming at least one plastic encapsulation layer on the second side of the carrier layer and integrating the same, thereby forming the sheet-like package board for molding; and performing singulation cutting to form a plurality of chip packages for wafer card use Therefore, the chip package can be a wafer substrate and can be easily embedded in an open slot of a wafer card body to form a wafer card; The open process separately mass-produces the chip package and the wafer card body (or the card body for bearing) and combines them in a simple manner, which not only avoids the limitation of the special machine necessary for the conventional process technology, but also can Reducing the material cost of the carrier layer can meet the mass production requirements and improve the economic benefits of the wafer card process.

在本發明之一實施例中,該至少一塑料封裝層係利用層壓 (lamination)工法或射出成型(injection molding)工法中之一種工法以形成在該片狀載板層之第二面上並結合成一體。 In an embodiment of the invention, the at least one plastic encapsulation layer utilizes lamination A method of lamination or injection molding is formed on the second side of the sheet-like carrier layer and integrated into one.

在本發明之一實施例中,該晶片封裝件之成型用片狀封裝 板包含:一片狀載板層,其上設有多個間隔排列之晶片模組,其中各晶片模組更包含一晶片電路層圖案形成在該片狀載板層之第一面上及一晶粒組裝在相對該第一面之第二面上對應位置處以對應導通該晶片電路層圖案;及至少一塑料封裝層,其係形成在該片狀載板層之第二面上且結合成一體,並保持各晶片模組中該晶粒與所對應之晶片電路層圖案的連通及作用功能。 In an embodiment of the invention, the chip package is formed into a chip package The board comprises: a sheet-shaped carrier layer, wherein a plurality of spaced-apart wafer modules are disposed, wherein each of the wafer modules further comprises a chip circuit layer pattern formed on the first surface of the sheet-shaped carrier layer and The die is assembled at a corresponding position on the second surface of the first surface to correspondingly conduct the wafer circuit layer pattern; and at least one plastic encapsulation layer is formed on the second surface of the sheet-like carrier layer and combined Integrating and maintaining the connection and function of the die and the corresponding chip circuit layer pattern in each chip module.

在本發明之一實施例中,該晶片封裝件包含:一晶片模組 其更包含一晶片電路層圖案形成在一片狀載板層之第一面上及一晶粒組裝在相對該第一面之第二面上並位於對應該晶片電路層圖案之相對位置處以與該對應之晶片電路層圖案導通;及至少一塑料封裝層,其係形成在該片狀載板層之第二面上並結合成一體,且保持各晶片模組中該晶粒與所對應之晶片電路層圖案之間的連通及作用功能。 In an embodiment of the invention, the chip package comprises: a chip module The method further includes forming a chip circuit layer pattern formed on the first surface of the one-layer carrier layer and a die is assembled on the second surface opposite to the first surface and located at a position corresponding to the pattern of the circuit layer of the wafer to The corresponding chip circuit layer pattern is turned on; and at least one plastic encapsulation layer is formed on the second surface of the chip-shaped carrier layer and integrated, and the die and the corresponding chip are held in each chip module. Communication and function between wafer circuit layer patterns.

在本發明之一實施例中,該晶片模組係包含符合迷你SIM卡 (Mini SIM卡)、微SIM卡(Micro SIM卡)或奈SIM卡(Nano SIM卡)使用之 晶片模組。 In an embodiment of the invention, the chip module comprises a mini SIM card (Mini SIM card), micro SIM card (Micro SIM card) or Nai SIM card (Nano SIM card) Wafer module.

在本發明之一實施例中,該晶片封裝件係包含符合迷你SIM卡(Mini SIM卡)、微SIM卡(Micro SIM卡)、奈SIM卡(Nano SIM卡)使用之晶片封裝件。 In an embodiment of the invention, the chip package comprises a chip package for use in accordance with a Mini SIM card, a Micro SIM card, and a Nano SIM card.

10‧‧‧片狀載板層 10‧‧‧Sheet carrier layer

10a‧‧‧片狀封裝板 10a‧‧‧Sheet packaging board

11‧‧‧第一面 11‧‧‧ first side

12‧‧‧第二面 12‧‧‧ second side

20‧‧‧晶片模組 20‧‧‧ wafer module

21‧‧‧晶片電路層圖案 21‧‧‧ Wafer circuit layer pattern

22‧‧‧晶粒 22‧‧‧ Grain

30‧‧‧塑料封裝層 30‧‧‧Plastic encapsulation layer

31‧‧‧雙面膠層 31‧‧‧ double-sided adhesive layer

311‧‧‧室腔 311‧‧‧ chamber

32‧‧‧第一塑料層 32‧‧‧First plastic layer

321‧‧‧室腔 321‧‧‧ chamber

33‧‧‧第二塑料層 33‧‧‧Second plastic layer

40‧‧‧晶片卡晶片封裝件 40‧‧‧ wafer card chip package

50‧‧‧射出成型模具 50‧‧‧Injection molding die

51‧‧‧上模具 51‧‧‧Upper mold

52‧‧‧下模具 52‧‧‧ Lower mold

53‧‧‧模腔 53‧‧‧ cavity

54‧‧‧注入口 54‧‧‧Injection

60‧‧‧卡片本體 60‧‧‧ card body

60a‧‧‧卡片本體 60a‧‧‧ card body

60b‧‧‧卡片本體 60b‧‧‧ card body

60c‧‧‧卡片本體 60c‧‧‧ card body

60d‧‧‧卡片本體 60d‧‧‧ card body

60e‧‧‧卡片本體 60e‧‧‧ card body

61‧‧‧折裂線 61‧‧‧break line

70‧‧‧迷你SIM卡 70‧‧‧Mini SIM card

71‧‧‧第一開口槽 71‧‧‧First open slot

72‧‧‧斷裂線 72‧‧‧Fracture line

80‧‧‧微SIM卡 80‧‧‧Micro SIM card

81‧‧‧第二開口槽 81‧‧‧Second open slot

82‧‧‧斷裂線 82‧‧‧Fracture line

90‧‧‧奈SIM卡 90‧‧‧Nai SIM

(先前技術) (previous technology)

100‧‧‧一卡一芯卡片 100‧‧‧One card one core card

200‧‧‧智慧卡 200‧‧‧Smart Card

201‧‧‧卡片體 201‧‧‧ card body

202‧‧‧智慧卡晶片模組 202‧‧‧Smart Card Chip Module

203‧‧‧嵌槽 203‧‧‧ slotted

204‧‧‧載板層 204‧‧‧Package layer

205‧‧‧晶片電路層圖案 205‧‧‧ wafer circuit layer pattern

206‧‧‧晶粒 206‧‧‧ grain

207‧‧‧折裂線 207‧‧‧break line

208‧‧‧中央室腔 208‧‧‧Central Chamber

209‧‧‧階梯槽 209‧‧‧step trough

300‧‧‧卡片本體 300‧‧‧ card body

圖1-2分別係習知一卡一芯卡片中晶片模組與卡片本體之組合及分解立體示意圖。 Figure 1-2 is a schematic view showing the combination and decomposition of the chip module and the card body in a conventional card-one core card.

圖3係本發明之片狀載板層上設有多個間隔排列之晶片模組之第一面(設有多個晶片電路層圖案)之一實施例平面示意圖。 3 is a plan view showing an embodiment of a first surface of a wafer carrier layer of the present invention having a plurality of spaced apart wafer modules (having a plurality of wafer circuit layer patterns).

圖4係圖3之片狀載板層之第二面(設有多個晶粒)平面示意圖。 Figure 4 is a plan view showing the second side of the sheet-like carrier layer of Figure 3 (with a plurality of crystal grains).

圖5-7分別係本發明晶片卡(智慧卡)之晶片封裝件之成型用片狀封裝板成型方法之步驟示意圖。 5-7 are schematic diagrams showing the steps of a method for molding a chip package for forming a chip package of a wafer card (smart card) according to the present invention.

圖8係本發明中該至少一塑料封裝層利用層壓(lamination)工法以形成在該片狀載板層之第二面上之示意圖。 8 is a schematic view showing the at least one plastic encapsulation layer in the present invention by a lamination process on the second side of the sheet-like carrier layer.

圖9係本發明中該至少一塑料封裝層利用射出成型(injection molding)工法以形成在該片狀載板層之第二面上之示意圖。 9 is a schematic view showing the at least one plastic encapsulation layer formed on the second surface of the sheet-like carrier layer by an injection molding method in the present invention.

圖10-11分別係本發明晶片卡(智慧卡)之晶片封裝件嵌置於一承載用卡片本體上以成為一卡一芯卡片實施例之分解及組合立體示意圖。 10-11 are exploded and assembled perspective views of an embodiment of a chip card (smart card) of the present invention embedded in a card body for use as a card and a card.

圖12-16分別係本發明中該晶片封裝件嵌置於一承載用卡片本體上以成為一卡二芯卡片、一卡四芯卡片、一卡四芯卡片、一卡六芯卡片及一卡九芯卡片實施例之組合立體示意圖。 12 to 16 are respectively embedded in a carrier card body to form a card two-core card, a card four-core card, a card four-core card, a card six-core card and a card. A three-dimensional schematic diagram of a combination of nine-core card embodiments.

為使本發明更加明確詳實,茲列舉較佳實施例並配合下列圖示,將本發明之技術特徵詳述如後。 In order to make the present invention more clear and detailed, the technical features of the present invention will be described in detail below with reference to the preferred embodiments.

以下所述之晶片卡係以智慧卡(SIM卡)為例說明,但非用以限制本發明。本發明晶片卡之晶片封裝件之成型用片狀封裝板的成型方法,包含下列步驟:步驟1:利用一片狀載板層10以製作多個間隔排列之晶片模組20如圖1、2所示,該片狀載板層10可為一矩形片狀載板但不限制,其係使用一般標準印刷電路板(PCB)形成,不同於傳統之軟性電路板(FPC),故得降低載板10的材料及製作成本;其中在該片狀載板層10之第一面11上形成有多個間隔排列之晶片電路層圖案21,其中之間隔排列方式可設計成如圖1所示12x24之陣列方式而共有二八八個晶片電路層圖案21但非用以限制本發明;又在相對該第一面11之第二面12上於對應第一面11上各晶片電路層圖案21之相對位置處各組裝一晶粒22,以使該晶粒22能透過該片狀載板層10所設之電路(圖未示)以與所對應之晶片電路層圖案21連通,藉此在該片狀載板層10上製成多個晶片模組20,而各晶片模組20包含一晶片電路層圖案21設在第一面11上及一晶粒22設在第二面12上並與該晶片電路層圖案21連通;在本實施例中,該晶片模組20係包含符合各種SIM卡使用如Mini SIM卡、Micro SIM卡、Nano SIM卡之卡晶片模組,且各種SIM卡之晶片模組20之尺寸視為相同但非用以限制本發明;之後再進行下一步驟2。 The wafer card described below is exemplified by a smart card (SIM card), but is not intended to limit the present invention. The method for molding a chip package for forming a chip package of a wafer card according to the present invention comprises the following steps: Step 1: using a sheet-like carrier layer 10 to form a plurality of wafer modules 20 arranged at intervals as shown in FIGS. As shown, the sheet-like carrier layer 10 can be a rectangular sheet-shaped carrier, but is not limited, and is formed using a general standard printed circuit board (PCB), which is different from a conventional flexible circuit board (FPC). The material of the board 10 and the manufacturing cost thereof; wherein a plurality of spaced-apart wafer circuit layer patterns 21 are formed on the first surface 11 of the sheet-like carrier layer 10, wherein the spacing arrangement can be designed as shown in FIG. Array mode has a total of 288 chip circuit layer patterns 21, but is not intended to limit the present invention; and on the second surface 12 opposite the first surface 11 on the corresponding first surface 11 of each of the wafer circuit layer patterns 21 A die 22 is assembled at each of the opposite positions so that the die 22 can pass through a circuit (not shown) provided in the chip carrier layer 10 to communicate with the corresponding wafer circuit layer pattern 21, thereby A plurality of wafer modules 20 are formed on the sheet carrier layer 10, and each of the wafer modules 20 includes one The chip circuit layer pattern 21 is disposed on the first surface 11 and a die 22 is disposed on the second surface 12 and is in communication with the chip circuit layer pattern 21; in the embodiment, the chip module 20 includes various SIMs. The card uses a card chip module such as a Mini SIM card, a Micro SIM card, or a Nano SIM card, and the size of the chip modules 20 of the various SIM cards is considered the same but is not intended to limit the present invention; the next step 2 is performed thereafter.

步驟2:再於該片狀載板層10之第二面12上(如圖5所示)形成至少一塑料封裝層30如圖5、6所示,其中該至少一塑料封裝層30在形成過 程中即能與該片狀載板層10之第二面12結合成一體,但仍可保持該片狀載板層10上所設各晶片模組20中該晶粒22與該電路層圖案21之間的連通及作用功能,藉此製成本發明之成型用片狀封裝板10a,而該成型用片狀封裝板10a上已製成有多個間隔排列之晶片封裝件40如圖7所示,以圖3、4之片狀載板層10為例說明,該成型用片狀封裝板10a上具有二八八個以12x24之陣列方式間隔排列之晶片卡(智慧卡)之晶片封裝件40,但非用以限制本發明。 Step 2: forming at least one plastic encapsulation layer 30 on the second surface 12 of the sheet-like carrier layer 10 (as shown in FIG. 5), as shown in FIGS. 5 and 6, wherein the at least one plastic encapsulation layer 30 is formed. Over The process can be integrated with the second surface 12 of the sheet-like carrier layer 10, but the die 22 and the circuit layer pattern in each of the wafer modules 20 disposed on the chip-like carrier layer 10 can be maintained. The connection and function between the two are used to form the sheet-like package board 10a for molding of the present invention, and the chip package 10a for molding has been formed with a plurality of spaced-apart wafer packages 40 as shown in FIG. As shown in the example of the sheet-like carrier layer 10 of FIGS. 3 and 4, the sheet-like package board 10a for molding has 280 chip packages of chip cards (smart cards) arranged in an array of 12×24 arrays. 40, but not intended to limit the invention.

在步驟2之後得再進行下一步驟3:對該成型用片狀封裝板 10a進行單體化裁切如圖6所示利用切割線A進行單體化裁切,以製成多個本發明晶片卡之晶片封裝件40如圖7所示;以圖3、4之片狀載板層10為例說明,透過步驟3即可製成二八八個晶片封裝件40但非用以限制本發明;在本發明中,該晶片封裝件40係一由一晶片模組20及至少一塑料封裝層30所結合構成並具有適當厚度之片體式結構體如圖7、10所示,而藉由該至少一塑料封裝層30所增加之厚度及剛性,使該晶片封裝件40得具有足夠之機械強度供能以一定的緊密度嵌置於一相配合之承載用卡片本體60或其上一晶片卡體(如圖中70或80所示)上所設之開口槽81中如圖10、11所示,也就是,該晶片卡(智慧卡)之晶片封裝件40能穩固嵌置於承載用卡片本體60上之開口槽81中而不易脫離,但使用者只要手指微施力即能掰開以由卡片本體60上取出該晶片封裝件40。 After step 2, the next step 3 is carried out: the sheet package board for molding 10a performing singulation cutting as shown in FIG. 6 by dicing cutting with a dicing line A to form a plurality of wafer packages 40 of the wafer card of the present invention as shown in FIG. 7; For example, the 280-layer chip package 40 can be formed through the step 3, but is not used to limit the present invention. In the present invention, the chip package 40 is a wafer module 20 The wafer structure formed by combining at least one plastic encapsulation layer 30 and having a suitable thickness is as shown in FIGS. 7 and 10, and the chip package 40 is formed by the increased thickness and rigidity of the at least one plastic encapsulation layer 30. Having sufficient mechanical strength to be embedded in a matching carrier card body 60 or an open slot 81 provided on a wafer card body (shown as 70 or 80 in the figure) with a certain degree of tightness As shown in FIGS. 10 and 11, the chip package 40 of the chip card (smart card) can be stably embedded in the opening slot 81 of the card body 60 for carrying the card, and is not easily detached, but the user only needs to apply the finger. The force can be split to remove the wafer package 40 from the card body 60.

以圖7、10、11所示之SIM卡為例說明,本發明之主要特徵 在於:指定一種SIM卡如Mini SIM卡(70)、Micro SIM卡(80)、Nano SIM卡(90)其中之一,再將該SIM卡所使用之晶片模組20作成一片體式晶片封裝件40供當作一晶片基體,以使該晶片封裝件40(晶片基體)能簡易嵌置於一 承載用卡片本體60上所設一開口槽81中以構成一所欲之SIM卡,也就是,當該晶片模組20被設計為符合Mini SIM卡、Micro SIM卡、Nano SIM卡其中之一SIM卡使用之晶片模組時,則所形成之晶片封裝件40即為符合Mini SIM卡、Micro SIM卡、Nano SIM卡其中之一使用之晶片封裝件40,因此當該晶片封裝件40被當作一晶片基體而嵌置於一承載用卡片本體60上所設之開口槽中時如圖10、11所示之開口槽81,則可構成Mini SIM卡、Micro SIM卡、Nano SIM卡其中之一種SIM卡(晶片卡)如圖10、11所示之Mini SIM卡70或Micro SIM卡80或Nano SIM卡90。 Taking the SIM card shown in Figures 7, 10 and 11 as an example, the main features of the present invention are described. Therefore, one of the SIM cards, such as a Mini SIM card (70), a Micro SIM card (80), and a Nano SIM card (90), is specified, and the chip module 20 used in the SIM card is formed into a one-chip chip package 40. Used as a wafer substrate to enable the chip package 40 (wafer substrate) to be easily embedded in a The card body 60 is provided with an open slot 81 to form a desired SIM card, that is, when the chip module 20 is designed to conform to one of the Mini SIM card, the Micro SIM card, and the Nano SIM card. When the chip module is used, the chip package 40 formed is a chip package 40 used in accordance with one of the Mini SIM card, the micro SIM card, and the Nano SIM card, so when the chip package 40 is treated as When a wafer substrate is embedded in an open slot provided in the card body 60, the open slot 81 shown in FIGS. 10 and 11 can constitute one of a Mini SIM card, a Micro SIM card, and a Nano SIM card. The SIM card (wafer card) is a Mini SIM card 70 or a Micro SIM card 80 or a Nano SIM card 90 as shown in FIGS.

以習知SIM卡技術而言,Mini SIM卡、Micro SIM卡或Nano SIM卡所使用之晶片模組之尺寸可設計為或視相同或約略相同如圖3、4所示之晶片模組20,因此在如圖10、11所示之實施例中,該晶片封裝件40之尺寸係符合Mini SIM卡、Micro SIM卡或Nano SIM卡使用之晶片封裝件。此外,目前已知之SIM卡之規格尺寸是由迷你SIM卡(Mini SIM卡)之15mm x 25mm縮小至微SIM卡(Micro SIM卡)之15mm x 12mm,再進一步縮小至奈SIM卡(Nano SIM卡)之8.8mm x 12.3mm,因此在如圖10、11所示之實施例中,該晶片封裝件40係直接以Nano SIM卡之規格尺寸8.8mm x 12.3mm製成供當作一晶片基體,但非用以限制本發明。而該晶片封裝件40之厚度係以相等於相配合之承載用卡片本體60之厚度為佳(如圖10所示)如0.3mm~0.85mm,也就是當承載用卡片本體60是以習知一卡一芯卡片100(如圖1、2所示)之習用卡片本體300作成時,該智慧卡晶片封裝件40之厚度即以相等於該卡片本體300(60)之厚度為佳,且承載用卡片本體60(300)上之開口槽81(如圖10、11所示)之尺寸及形狀亦配合該晶片卡晶片封裝件40之尺寸,以使該 晶片卡晶片封裝件40在嵌置於該卡片本體60(300)之一開口槽81(如圖10、11所示)內時得穩固嵌合且不會凸出於該卡片本體60(300)之表面如圖11所示。 In terms of conventional SIM card technology, Mini SIM card, Micro SIM card or Nano The size of the wafer module used in the SIM card can be designed to be the same or approximately the same as the wafer module 20 shown in FIGS. 3 and 4, so in the embodiment shown in FIGS. 10 and 11, the chip package is The 40 size is in accordance with the chip package used in the Mini SIM card, Micro SIM card or Nano SIM card. In addition, the size of the currently known SIM card is reduced from 15mm x 25mm for mini SIM card (Mini SIM card) to 15mm x 12mm for micro SIM card (Micro SIM card), and further reduced to Nano SIM card (Nano SIM card) 8.8 mm x 12.3 mm, so in the embodiment shown in Figures 10 and 11, the chip package 40 is directly made of a Nano SIM card size of 8.8 mm x 12.3 mm for use as a wafer substrate. However, it is not intended to limit the invention. The thickness of the chip package 40 is preferably equal to the thickness of the mating card body 60 (as shown in FIG. 10), such as 0.3 mm to 0.85 mm, that is, when the card body 60 for carrying is known. When the conventional card body 300 of a card-core card 100 (shown in FIGS. 1 and 2) is formed, the thickness of the smart card chip package 40 is preferably equal to the thickness of the card body 300 (60), and is carried. The size and shape of the open slot 81 (shown in Figures 10 and 11) on the card body 60 (300) also fits the size of the wafer card chip package 40 to The wafer card chip package 40 is firmly fitted and does not protrude from the card body 60 (300) when embedded in an open slot 81 (shown in FIGS. 10 and 11) of the card body 60 (300). The surface is shown in Figure 11.

在該步驟1中,本發明係利用表面黏著技藝(SMT, surface-mount technology)以將利用WLCSP(晶圓級晶片尺寸封裝)方式封裝之各晶片卡(SIM卡)之晶粒22組裝在該片狀載板層10之第二面12上並對應於第一面11上各晶片電路層圖案21,藉以達成量產化效益,但上述各晶粒22之WLCSP封裝方式或其SMT組裝製程並非用以限制本發明。 In this step 1, the invention utilizes surface adhesion techniques (SMT, Surface-mount technology) assembling the die 22 of each wafer card (SIM card) packaged by WLCSP (Wafer Level Wafer Size Package) on the second face 12 of the chip carrier layer 10 and corresponding to the The wafer circuit layer pattern 21 on one side 11 is used to achieve mass production benefits. However, the WLCSP packaging method of each of the crystal grains 22 or the SMT assembly process thereof is not intended to limit the present invention.

此外,在該步驟2中,該至少一塑料封裝層30係利用層壓 (lamination)工法或射出成型(injection molding)工法中之一種工法以形成在該片狀載板層10之第二面12上並結合構成一片體式晶片基體(40),但該層壓工法及射出成型工法非用以限制本發明,進一步說明如下:參考圖8所示,當在該步驟2中該至少一塑料封裝層30係利用層壓工法以形成在該片狀載板層10之第二面12上並結合構成一片體式晶片基體(40)時,其係在該片狀載板層10之第二面12上逐一疊置一雙面膠層31、一第一塑料層32及一第二塑料層33,再藉層壓工法層壓該雙面膠層31、第一塑料層32及第二塑料層33以結合成一體而形成該至少一塑料封裝層30並在層壓過程中同時與該片狀載板層10之第二面12結合成一體。 In addition, in the step 2, the at least one plastic encapsulation layer 30 is laminated. One of the lamination or injection molding methods is formed on the second side 12 of the sheet-like carrier layer 10 and combined to form a one-piece wafer substrate (40), but the lamination method and ejection The molding method is not intended to limit the present invention, and is further described as follows: Referring to FIG. 8, in the step 2, the at least one plastic encapsulation layer 30 is formed by a lamination process to form a second layer of the sheet-like carrier layer 10. When the surface 12 is combined and formed into a one-piece wafer substrate (40), a double-sided adhesive layer 31, a first plastic layer 32 and a first layer are stacked one on another on the second surface 12 of the sheet-like carrier layer 10. a second plastic layer 33, which is further laminated by a lamination process, the first plastic layer 32 and the second plastic layer 33 to be integrated to form the at least one plastic encapsulation layer 30 and simultaneously in the lamination process It is integrated with the second surface 12 of the sheet-like carrier layer 10.

在該雙面膠層31上得預設多個室腔311,在該第一塑料層32 上得預設多個室腔321,且所設之各室腔311、321係分別對應於該片狀載板層10之第二面12上所組裝之各晶粒22,以使各晶粒22在層壓之後能容置在各室腔311、321內,並藉由該第二塑料層33設在最外層以形成封閉狀態。此外, 該第一、第二塑料層32、33之材料可為PVC(聚氯乙烯,polyvinyl chloride)或ABS樹脂(丙烯腈-丁二烯-苯乙烯共聚物,Acrylonitrile Butadiene Styrene)但不限制。由於本發明所採用之層壓工法包含材料選擇或温度及壓力控制等可利用目前機械領域中層壓工法之習知技術來達成,且該層壓工法亦非本發明之訴求重點,故不另贅述。 A plurality of chambers 311 are preset on the double-sided adhesive layer 31, and the first plastic layer 32 is A plurality of chambers 321 are preset, and the chambers 311 and 321 are respectively corresponding to the respective crystal grains 22 assembled on the second surface 12 of the sheet-like carrier layer 10, so that the respective crystal grains 22 are After lamination, it can be accommodated in each of the chambers 311, 321 and provided in the outermost layer by the second plastic layer 33 to form a closed state. In addition, The material of the first and second plastic layers 32, 33 may be PVC (polyvinyl chloride) or ABS resin (Acrylonitrile Butadiene Styrene), but is not limited. Since the laminating method used in the present invention includes material selection or temperature and pressure control, etc., which can be achieved by the conventional techniques of the laminating method in the mechanical field, and the lamination method is not the focus of the present invention, it will not be described again. .

參考圖9所示,當在該步驟2中該至少一塑料封裝層30係利用 射出成型(injection molding)工法以形成在該片狀載板層10之第二面12上並結合構成一片體式晶片基體(40)時,其係將已設有多個晶片模組20之片狀載板層10先定位埋置在一射出成型模具50內,如圖9所示先定位埋置在該射出成型模具50之下模具52內,再蓋上一相配合之上模具51以使上、下模具51、52之間形成一相同於該至少一塑料封裝層30所佔空間之模腔53,並使該片狀載板層10之第二面12朝向該模腔53;再利用一用以形成該塑料封裝層30之材料(30)當作射出料以由該射出成型模具50之注入口54以一適當壓力注入該模腔53中,即可直接在該片狀載板層10之第二面12上射出成型該塑料封裝層30且其可藉由射出成型時温度與壓力之控制以與該片狀載板層10之第二面12結合成一體。由於本發明所採用之射出成型工法包含材料選擇或温度及壓力控制等,或另利用一間隔遮護片(圖未示)遮蓋在第二面12上各晶粒22上方以在射出成型後能形成並具有如圖8所示室腔311、321之容置功效,皆可利用目前機械領域中射出成型工法之習知技術來達成,且該射出成型工法亦非本發明之訴求重點,故不另贅述。 Referring to FIG. 9, when the step 2 is used, the at least one plastic encapsulation layer 30 is utilized. When an injection molding method is formed on the second surface 12 of the sheet-like carrier layer 10 and combined to form a one-piece wafer substrate (40), it is provided with a sheet of a plurality of wafer modules 20. The carrier layer 10 is first positioned and embedded in an injection molding die 50, and is first positioned and embedded in the lower mold 52 of the injection molding die 50 as shown in FIG. 9, and then covered with a matching upper mold 51 to make Forming a cavity 53 equal to the space occupied by the at least one plastic encapsulation layer 30 between the lower molds 51 and 52, and facing the second surface 12 of the sheet-like carrier layer 10 toward the cavity 53; The material (30) for forming the plastic encapsulating layer 30 is used as an injection material to be injected into the cavity 53 by the injection port 54 of the injection molding die 50 at a suitable pressure, which is directly in the sheet-like carrier layer 10. The plastic encapsulation layer 30 is injection molded on the second side 12 and can be integrated with the second side 12 of the sheet-like carrier layer 10 by temperature and pressure control during injection molding. The injection molding method used in the present invention includes material selection or temperature and pressure control, or the like, or another spacer (not shown) is used to cover the upper surface of each of the crystal grains 22 on the second surface 12 to be capable of being formed after injection molding. Forming and having the accommodating effect of the chambers 311 and 321 as shown in FIG. 8 can be achieved by using the conventional techniques of the injection molding method in the mechanical field, and the injection molding method is not the focus of the invention, so Let me repeat.

再參考圖10、11所示,其分別係本發明中該晶片卡晶片封裝 件40嵌置於一相配合之承載用卡片本體60上一實施例之立體分解及組合示 意圖。如前所述,目前已知之SIM卡之規格尺寸是由迷你SIM卡(Mini SIM卡)之15mm x 25mm縮小至微SIM卡(Micro SIM卡)之15mm x 12mm,再進一步縮小至奈SIM卡(Nano SIM卡)之8.8mm x 12.3mm,因此在如圖10、11所示之實施例中,該晶片封裝件40係直接以Nano SIM卡之規格尺寸8.8mm x 12.3mm製成,在圖10、11中之晶片封裝件40不但被當作一晶片基體同時也被製成為一Nano SIM卡90,但非用以限制本發明。在本實施例中,該承載用卡片本體60是利用習知一卡一芯卡片100(如圖1、2所示)之習用卡片本體300作成但非用以限制本發明(即亦可為一卡多芯卡片,容後述),而卡片本體60(300)之製造端得在該承載用卡片本體60(300)上可藉由預先沖製之折裂線61而成型設置一符合Mini SIM卡規格尺寸(15mm x 25mm)之迷你SIM卡(亦即Mini SIM卡之晶片卡體)70。本實施例進一步可在該迷你SIM卡70之卡片範圍內再開設一斷裂線72以形成一較縮小之第一開口槽71及一符合Micro SIM卡規格尺寸(15mm x 12mm)之微SIM卡(亦即Micro SIM卡之晶片卡體)80,使該微SIM卡之晶片卡體(80)能以一定的緊密度嵌置於該第一開口槽71中;本實施例進一步在該微SIM卡80之卡片範圍內再開設一斷裂線82以形成一第二開口槽81及一符合奈SIM卡(Nano SIM卡)規格尺寸(8.8mm x 12.3mm)之奈SIM卡(亦即Nano SIM卡之晶片卡體)90如圖10-11所示,使該奈SIM卡90能以一定的緊密度嵌置於該第二開口槽81中,在如圖10、11所示之實施例中,該晶片封裝件40係直接以Nano SIM卡之規格尺寸8.8mm x 12.3mm製成,故該晶片封裝件40同時被製成為一Nano SIM卡90,但非用以限制本發明。 Referring again to Figures 10 and 11, respectively, the wafer card chip package of the present invention The three-dimensional decomposition and combination of an embodiment of the member 40 embedded in a matching card body 60 intention. As mentioned above, the size of the currently known SIM card is reduced from 15mm x 25mm for the Mini SIM card to 15mm x 12mm for the Micro SIM card, and further reduced to the SIM card ( The Nano SIM card is 8.8 mm x 12.3 mm, so in the embodiment shown in Figures 10 and 11, the chip package 40 is directly made up of a Nano SIM card size of 8.8 mm x 12.3 mm, in Figure 10 The chip package 40 of 11, is not only used as a wafer substrate but also as a Nano SIM card 90, but is not intended to limit the present invention. In the present embodiment, the card body 60 for the carrier is formed by using the conventional card body 300 of the conventional card-card 100 (shown in FIGS. 1 and 2), but is not intended to limit the present invention (ie, may also be a The card multi-card, which will be described later, and the manufacturing end of the card body 60 (300) can be formed on the carrier card body 60 (300) by a pre-punched break line 61 to form a Mini SIM card. Mini SIM card (ie, chip card body for Mini SIM card) of size (15mm x 25mm). In this embodiment, a break line 72 can be further formed in the card range of the mini SIM card 70 to form a narrowed first open slot 71 and a micro SIM card conforming to the size of the micro SIM card (15 mm x 12 mm) ( That is, the wafer card body 80 of the micro SIM card enables the wafer card body (80) of the micro SIM card to be embedded in the first opening slot 71 with a certain degree of tightness; this embodiment is further on the micro SIM card. A break line 82 is further formed in the card range of 80 to form a second open slot 81 and a SIM card conforming to the size of the Nano SIM card (8.8 mm x 12.3 mm) (ie, the Nano SIM card). The wafer card body 90 is as shown in FIGS. 10-11, so that the SIM card 90 can be embedded in the second opening slot 81 with a certain degree of tightness. In the embodiment shown in FIGS. 10 and 11, the The chip package 40 is directly formed in a size of 8.8 mm x 12.3 mm of a Nano SIM card, so that the chip package 40 is simultaneously made into a Nano SIM card 90, but is not intended to limit the present invention.

此外,在如圖10、11所示之實施例中,該一卡一芯模式之卡 片本體60(300)上雖然只設有一第二開口槽81供嵌置一晶片封裝件40,但該一卡一芯模式之卡片本體60(300)卻可由製造端選擇用以承載迷你SIM卡70、微SIM卡80或奈SIM卡90等三種不同SIM卡型態中之任一種SIM卡,也就是,當卡片本體60之製造端在製出如圖10、11所示之一卡一芯模式之卡片本體60(300)時,可視實際使用需要而對上述之迷你SIM卡70、微SIM卡80或奈SIM卡90三者加以選擇及組合,例如:在該卡片本體60(300)上只成型設有一迷你SIM卡(卡體)70及一第二開口槽81供嵌置一符合迷你SIM卡70使用之晶片封裝件40(如圖14中之一迷你SIM卡70);或在該卡片本體60(300)上只成型設有一微SIM卡80及一第二開口槽81供嵌置一符合微SIM卡80使用之晶片封裝件40(如圖15中之一微SIM卡80);或在該卡片本體60(300)上只成型設有一奈SIM卡90及一第二開口槽81供嵌置一符合奈SIM卡90使用之晶片封裝件40(如圖16中之一奈SIM卡90),其中在本實施例中該晶片封裝件40即為奈SIM卡90。換言之,不論該承載用卡片本體60(300)被指定用以承載迷你SIM卡70、微SIM卡80及奈SIM卡90(40)三者中那一種SIM卡,該承載用卡片本體60(300)之製造端皆可在該承載用卡片本體60(300)上所設SIM卡(如70、80)之卡片範圍內開設一能共用尺寸之第二開口槽81供嵌置一符合該種SIM卡使用且又能共用尺寸之晶片封裝件40(如圖10、11中所示之奈SIM卡90),而本發明之晶片卡(智慧卡)晶片封裝件40之製造端即能先量產化製成該晶片卡(智慧卡)之晶片封裝件40,以使該晶片封裝件40能當作一晶片基體供嵌置於該卡片本體60(300)所設SIM卡(70、80、90)之卡片範圍內之開口槽(81)內,如此即可形成一種SIM卡(70、80、90)之使用型態。因此,本發明之製造端能以分開二製程分別量產化製作 該晶片封裝件40及承載用卡片本體60,不但可避免受到習知製程技術所必備之專用機台的限制,亦能降低載板層材料成本並符合量產化需求,故可有效提昇智慧卡製程之經濟效益,此乃本發明技術之優勢所在。 In addition, in the embodiment shown in FIGS. 10 and 11, the card of one card and one core mode Although the chip body 60 (300) is provided with only a second opening slot 81 for embedding a chip package 40, the card body 60 (300) of the card-core mode can be selected by the manufacturing end to carry the mini SIM card. 70. Any one of three different SIM card types, such as a micro SIM card 80 or a SIM card 90, that is, when the manufacturing end of the card body 60 is in a core as shown in FIGS. In the case of the card body 60 (300) of the mode, the mini SIM card 70, the micro SIM card 80 or the SIM card 90 can be selected and combined according to actual needs, for example, on the card body 60 (300). Forming only a mini SIM card (card body) 70 and a second opening slot 81 for embedding a chip package 40 (such as one of the mini SIM cards 70 in FIG. 14) for use with the mini SIM card 70; or The card body 60 (300) is formed with a micro SIM card 80 and a second opening slot 81 for embedding a chip package 40 (such as one of the micro SIM cards 80 in FIG. 15) for use with the micro SIM card 80; Or a card SIM card 90 and a second opening slot 81 are formed on the card body 60 (300) for embedding a chip package 40 for use with the SIM card 90 (as shown in the figure). One of the 16 SIM cards 90), wherein in the present embodiment, the chip package 40 is a SIM card 90. In other words, regardless of the carrier card body 60 (300) being designated to carry one of the mini SIM card 70, the micro SIM card 80, and the SIM card 90 (40), the card body 60 for the carrier (300) The manufacturing end of the card can be provided with a second open slot 81 of a shared size within the card range of the SIM card (eg, 70, 80) provided on the card body 60 (300) for mounting a SIM corresponding to the SIM card. The chip can use and share the size of the chip package 40 (the SIM card 90 shown in FIGS. 10 and 11), and the manufacturing end of the wafer card (smart card) chip package 40 of the present invention can be mass-produced first. The chip package 40 of the wafer card (smart card) is formed so that the chip package 40 can be used as a wafer substrate for embedding the SIM card (70, 80, 90) provided in the card body 60 (300). In the open slot (81) in the card range, a use pattern of the SIM card (70, 80, 90) can be formed. Therefore, the manufacturing end of the present invention can be mass-produced separately in two separate processes. The chip package 40 and the card body 60 for carrying the same can not only avoid the limitation of the special machine necessary for the conventional process technology, but also reduce the material cost of the carrier layer and meet the mass production requirements, thereby effectively improving the smart card. The economic benefits of the process are the advantages of the technology of the present invention.

此外,如圖10、11所示承載用卡片本體60僅係一卡一芯模式之實施例,但非用以限制本發明,也就是該一卡一芯之卡片本體60(300)可依據圖10、11所示之技術特徵而類推至一卡多芯之卡片本體,分別說明如下:如圖12所示,其係一承載有二個SIM卡之一卡二芯卡片本體60a,其中該二SIM卡可為迷你SIM卡70、微SIM卡80、奈SIM卡90其中之一種,其中所承載之SIM卡的數目可依該SIM卡之尺寸而設定。 In addition, as shown in FIGS. 10 and 11, the card body 60 for the carrier is only an embodiment of the card-core mode, but is not intended to limit the present invention, that is, the card body 60 (300) of the card-core can be based on the figure. The technical features shown in FIGS. 10 and 11 are analogized to the card body of one card and multiple cores, respectively as follows: as shown in FIG. 12, which is a card two-core card body 60a carrying one of two SIM cards, wherein the two The SIM card may be one of a mini SIM card 70, a micro SIM card 80, and a SIM card 90, wherein the number of SIM cards carried may be set according to the size of the SIM card.

如圖13所示,其係一承載有四個SIM卡之一卡四芯卡片本體60b,其中該四SIM卡可為迷你SIM卡70、微SIM卡80、奈SIM卡90其中之一種,其中所承載之SIM卡的數目可依該SIM卡之尺寸而設定。 As shown in FIG. 13, it is a card-loaded four-core card body 60b, wherein the four SIM cards can be one of a mini SIM card 70, a micro SIM card 80, and a SIM card 90. The number of SIM cards carried can be set according to the size of the SIM card.

如圖14所示,其係一承載有四個SIM卡之一卡四芯卡片本體60c,其中該四SIM卡可為迷你SIM卡70、奈SIM卡90其中之一種,其中所承載之SIM卡的數目可依該SIM卡之尺寸而設定。 As shown in FIG. 14, it is a card card four-core card body 60c carrying one of four SIM cards, wherein the four SIM cards can be one of a mini SIM card 70 and a SIM card 90, wherein the SIM card carried therein The number can be set according to the size of the SIM card.

如圖15所示,其係一承載有六個SIM卡之一卡六芯卡片本體60d,其中該六SIM卡可為微SIM卡80、奈SIM卡90其中之一種,其中所承載之SIM卡的數目可依該SIM卡之尺寸而設定。 As shown in FIG. 15, it is a card six-core card body 60d carrying one of six SIM cards, wherein the six SIM cards may be one of a micro SIM card 80 and a SIM card 90, wherein the SIM card carried therein The number can be set according to the size of the SIM card.

如圖16所示,其係一承載有九個SIM卡之一卡六芯卡片本體60e,其中該九SIM卡為奈SIM卡90,其中所承載之SIM卡的數目可依該SIM卡之尺寸而設定。 As shown in FIG. 16, it is a card six-core card body 60e carrying one of nine SIM cards, wherein the nine SIM cards are SIM cards 90, wherein the number of SIM cards carried can be based on the size of the SIM card. And set.

以上所述僅為本發明的優選實施例,對本發明而言僅是說明性的,而非限制性的;本領域普通技術人員理解,在本發明權利要求所限定的精神和範圍內可對其進行許多改變,修改,甚至等效變更,但都將落入本發明的保護範圍內。 The above is only the preferred embodiments of the present invention, and is intended to be illustrative, and not restrictive, and it is understood by those of ordinary skill in the art that Many changes, modifications, and even equivalents may be made without departing from the scope of the invention.

40‧‧‧晶片封裝件 40‧‧‧Chip package

60‧‧‧卡片本體 60‧‧‧ card body

61‧‧‧折裂線 61‧‧‧break line

70‧‧‧迷你SIM卡 70‧‧‧Mini SIM card

71‧‧‧第一開口槽 71‧‧‧First open slot

72‧‧‧斷裂線 72‧‧‧Fracture line

80‧‧‧微SIM卡 80‧‧‧Micro SIM card

81‧‧‧第二開口槽 81‧‧‧Second open slot

82‧‧‧斷裂線 82‧‧‧Fracture line

90‧‧‧奈SIM卡 90‧‧‧Nai SIM

Claims (17)

一種晶片卡之晶片封裝件之成型用片狀封裝板的成型方法,包含下列步驟:步驟1:利用一片狀載板層以製作多個形成間隔排列之晶片卡之晶片模組,其中在該片狀載板層之第一面上形成有多個間隔排列之晶片電路層圖案,並在相對該第一面之第二面上於對應第一面上各晶片電路層圖案之相對位置處各組裝一晶粒以透過該片狀載板層以與該對應晶片電路層圖案連通,藉此製作完成多個晶片模組,而各晶片模組包含一晶片電路層圖案設在第一面上及一晶粒設在第二面上並與該晶片電路層圖案連通;步驟2:在該片狀載板層之第二面上形成至少一塑料封裝層,該至少一塑料封裝層係與該片狀載板層之第二面結合成一體,並保持各智慧卡晶片模組中該晶粒與所對應晶片電路層圖案之間的連通及作用功能,藉此製作完成一具有多個間隔排列之晶片封裝件之成型用片狀封裝板。 A method for molding a chip package board for forming a chip package of a wafer card comprises the following steps: Step 1: using a sheet-like carrier layer to form a plurality of wafer modules forming a wafer card arranged at intervals, wherein Forming a plurality of spaced-apart wafer circuit layer patterns on the first surface of the sheet-like carrier layer, and respectively on opposite sides of the first surface of the first surface on the corresponding first surface of each of the wafer circuit layer patterns Forming a die to pass through the chip carrier layer to communicate with the corresponding chip circuit layer pattern, thereby fabricating a plurality of chip modules, wherein each of the chip modules includes a chip circuit layer pattern disposed on the first surface and a die is disposed on the second surface and in communication with the pattern of the circuit layer of the wafer; Step 2: forming at least one plastic encapsulation layer on the second surface of the sheet-like carrier layer, the at least one plastic encapsulation layer and the sheet The second side of the carrier layer is integrated and maintains the communication and function between the die and the corresponding chip circuit layer pattern in each smart card chip module, thereby completing the arrangement with a plurality of intervals Chip package Chip package board. 如請求項1所述之成型方法,其中在該步驟2之後更包含下列之步驟:步驟3:對該成型用片狀封裝板進行單體化裁切,以製作完成多個智慧卡晶片封裝件,其中各智慧卡晶片封裝件為一由一智慧卡晶片模組及至少一塑料封裝層所結合構成之一體成型體。 The molding method of claim 1, wherein after the step 2, the following steps are further included: Step 3: singulating and cutting the sheet-like packaging board for molding to complete a plurality of smart card chip packages. Each smart card chip package is a body molded body formed by a smart card chip module and at least one plastic packaging layer. 如請求項1所述之成型方法,其中在該步驟2中該至少一塑料封裝層係利用層壓(lamination)工法或射出成型(injection molding)工法中之一種工法以形成在該片狀載板層之第二面上並結合構成一體成型體。 The molding method according to claim 1, wherein in the step 2, the at least one plastic encapsulation layer is formed on the sheet-like carrier by one of a lamination method or an injection molding method. The second side of the layer is combined to form an integrally formed body. 如請求項3所述之成型方法,其中當該步驟2中是利用層壓工法時,其係在該片狀載板層之第二面上逐一疊置一雙面膠層、一第一塑料層及一 第二塑料層,再藉層壓工法以層壓形成該至少一塑料封裝層並與該片狀載板層之第二面結合成一體。 The molding method according to claim 3, wherein when the laminating method is used in the step 2, a double-sided adhesive layer and a first plastic are stacked one on another on the second side of the sheet-like carrier layer. Layer and one The second plastic layer is laminated to form the at least one plastic encapsulation layer and integrated with the second side of the sheet-like carrier layer. 如請求項4所述之成型方法,其中在該雙面膠層及該第一塑料層上預設多個室腔,其中各室腔係分別對應於該片狀載板層之第二面上所組裝之各晶粒供各晶粒能容置在各室腔內。 The molding method of claim 4, wherein a plurality of chambers are preset on the double-sided adhesive layer and the first plastic layer, wherein each of the chambers respectively corresponds to the second surface of the sheet-like carrier layer The assembled crystal grains are provided for the respective crystal grains to be accommodated in the respective chambers. 如請求項4所述之成型方法,其中該第一塑料層及該第二塑料層之材料包含PVC(聚氯乙烯,polyvinyl chloride)、ABS樹脂(丙烯腈-丁二烯-苯乙烯共聚物,Acrylonitrile Butadiene Styrene)。 The molding method according to claim 4, wherein the material of the first plastic layer and the second plastic layer comprises PVC (polyvinyl chloride), ABS resin (acrylonitrile-butadiene-styrene copolymer, Acrylonitrile Butadiene Styrene). 如請求項3所述之成型方法,其中當該步驟2中是利用射出成型工法時,其係將該片狀載板層先埋置在射出成型模具內,再利用一用以形成該塑料封裝層之材料當作射出料以藉該射出成型模具直接在該片狀載板層之第二面上射出成型該塑料封裝層並與該片狀載板層之第二面結合成一體。 The molding method according to claim 3, wherein when the injection molding method is used in the step 2, the sheet-shaped carrier layer is first embedded in the injection molding die, and then used to form the plastic package. The material of the layer is used as an injection material to directly form and mold the plastic encapsulation layer on the second surface of the sheet-like carrier layer by the injection molding die and to be integrated with the second surface of the sheet-like carrier layer. 如請求項1或2所述之成型方法,其中該晶片模組係包含符合迷你SIM卡(Mini SIM卡)、微SIM卡(Micro SIM卡)、奈SIM卡(Nano SIM卡)使用之晶片模組。 The molding method according to claim 1 or 2, wherein the chip module comprises a wafer die that is used in accordance with a mini SIM card, a micro SIM card, a nano SIM card, and a nano SIM card. group. 如請求項1或2所述之成型方法,其中該晶片封裝件係包含符合迷你SIM卡(Mini SIM卡)、微SIM卡(Micro SIM卡)、奈SIM卡(Nano SIM卡)使用之晶片封裝件。 The molding method of claim 1 or 2, wherein the chip package comprises a chip package for use with a mini SIM card, a micro SIM card, a nano SIM card, or a nano SIM card. Pieces. 如請求項1或2所述之成型方法,其中該晶片封裝件由一晶片模組及至少一塑料封裝層所構成之厚度為0.3~0.85mm。 The molding method of claim 1 or 2, wherein the chip package comprises a wafer module and at least one plastic encapsulation layer having a thickness of 0.3 to 0.85 mm. 一種晶片卡之晶片封裝件之成型用片狀封裝板,其係利用申請專利範圍請求項1至10中任一項所述之成型方法所製成,該片狀封裝板包含:一片狀載板層,其上設有多個間隔排列之晶片模組,其中各智慧卡晶片 模組更包含:一晶片電路層圖案其形成在該片狀載板層之第一面上;及一晶粒其組裝在相對該第一面之第二面上並位於對應該晶片電路層圖案之相對位置處以透過該片狀載板層以與該對應晶片電路層圖案導通;及至少一塑料封裝層,其係形成在該片狀載板層之第二面上且與該片狀載板層之第二面結合成一體,並保持各智慧卡晶片模組中該晶粒與所對應之晶片電路層圖案的作用功能。 A sheet-like encapsulating sheet for forming a chip package of a wafer card, which is produced by the molding method according to any one of claims 1 to 10, wherein the sheet-like package board comprises: a sheet-like package a board layer having a plurality of spaced apart wafer modules thereon, wherein each smart card chip The module further includes: a chip circuit layer pattern formed on the first surface of the chip carrier layer; and a die mounted on the second surface opposite the first surface and located on the corresponding chip circuit layer pattern The opposite position is transmitted through the sheet-like carrier layer to be electrically connected to the corresponding chip circuit layer pattern; and at least one plastic encapsulation layer is formed on the second surface of the sheet-like carrier layer and the sheet-shaped carrier The second side of the layer is integrated and maintains the function of the die and the corresponding chip circuit layer pattern in each smart card chip module. 一種晶片卡之晶片封裝件,其係利用申請專利範圍請求項11中所述之成型用片狀封裝板進行單體化裁切所形成之片體式晶片基體,該晶片封裝件包含:一晶片模組,其包含:一晶片電路層圖案形成在一片狀載板層之第一面上;及一晶粒組裝在相對該第一面之第二面上並位於對應該晶片電路層圖案之相對位置處供能透過該片狀載板層以與該對應晶片電路層圖案導通;及至少一塑料封裝層,其係形成在該片狀載板層之第二面上且與該片狀載板層之第二面結合成一體,並保持各智慧卡晶片模組中該晶粒與所對應之晶片電路層圖案之間的連通及作用功能;其中該晶片封裝件藉由該至少一塑料封裝層形成並結合在該片狀載板層之第二面上所增加之厚度,使該晶片封裝件得具有足夠之機械強度供能緊密嵌置於一相配合之晶片卡體上所開設之一開口槽中。 A chip package for a wafer card, which is formed by singulating and cutting a chip-type package substrate formed by using a sheet-like package sheet according to claim 11 of the patent application, wherein the chip package comprises: a wafer mold The group includes: a wafer circuit layer pattern formed on a first side of the one-piece carrier layer; and a die assembled on a second side opposite the first surface and located opposite the corresponding circuit layer pattern of the wafer Providing a position through the sheet-like carrier layer to be electrically connected to the corresponding chip circuit layer pattern; and at least one plastic encapsulation layer formed on the second side of the sheet-like carrier layer and with the sheet-shaped carrier The second side of the layer is integrated and maintains the communication and function between the die and the corresponding chip circuit layer pattern in each smart card chip module; wherein the chip package is formed by the at least one plastic package layer Forming and bonding the increased thickness on the second side of the sheet-like carrier layer such that the chip package has sufficient mechanical strength to be closely embedded in an opening of a mating wafer card body In the slot. 如請求項12所述之晶片封裝件,其中該晶片模組係包含符合迷你SIM卡(Mini SIM卡)、微SIM卡(Micro SIM卡)、奈SIM卡(Nano SIM卡)使用之晶片模組。 The chip package of claim 12, wherein the chip module comprises a chip module for use with a mini SIM card, a micro SIM card, a nano SIM card, or a nano SIM card. . 如請求項12所述之晶片封裝件,其中該晶片封裝件係包含符合迷你SIM 卡(Mini SIM卡)、微SIM卡(Micro SIM卡)、奈SIM卡(Nano SIM卡)使用之晶片封裝件。 The chip package of claim 12, wherein the chip package comprises a mini SIM A chip package for use with a card (Mini SIM card), a micro SIM card (Micro SIM card), and a SIM card (Nano SIM card). 如請求項12所述之晶片封裝件,其中該晶片卡體係一具有迷你SIM卡(Mini SIM卡)、微SIM卡(Micro SIM卡)、奈SIM卡(Nano SIM卡)其中之一SIM卡之尺寸的卡體。 The chip package of claim 12, wherein the chip card system has one of a mini SIM card (Mini SIM card), a micro SIM card (Micro SIM card), and a SIM card (Nano SIM card). Size card body. 如請求項15所述之晶片封裝件,其中該晶片卡體係設在一尺寸為85.6mm x 53.98mm之矩形卡片本體上。 The chip package of claim 15 wherein the wafer card system is disposed on a rectangular card body having a size of 85.6 mm x 53.98 mm. 如請求項12所述之晶片封裝件,其中該晶片封裝件由一晶片模組及至少一塑料封裝層所構成之厚度為0.3~0.85mm。 The chip package of claim 12, wherein the chip package comprises a wafer module and at least one plastic encapsulation layer having a thickness of 0.3 to 0.85 mm.
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