[go: up one dir, main page]

TW201316378A - Compound semiconductor substrate, method for producing the same, and light-emitting element using the same - Google Patents

Compound semiconductor substrate, method for producing the same, and light-emitting element using the same Download PDF

Info

Publication number
TW201316378A
TW201316378A TW101118367A TW101118367A TW201316378A TW 201316378 A TW201316378 A TW 201316378A TW 101118367 A TW101118367 A TW 101118367A TW 101118367 A TW101118367 A TW 101118367A TW 201316378 A TW201316378 A TW 201316378A
Authority
TW
Taiwan
Prior art keywords
layer
light
cladding layer
semiconductor substrate
compound semiconductor
Prior art date
Application number
TW101118367A
Other languages
Chinese (zh)
Inventor
Masanobu Takahashi
Kenji Sakai
Masayuki Shinohara
Original Assignee
Shinetsu Handotai Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinetsu Handotai Kk filed Critical Shinetsu Handotai Kk
Publication of TW201316378A publication Critical patent/TW201316378A/en

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/81Bodies
    • H10H20/822Materials of the light-emitting regions
    • H10H20/824Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02387Group 13/15 materials
    • H01L21/02395Arsenides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02455Group 13/15 materials
    • H01L21/02461Phosphides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02455Group 13/15 materials
    • H01L21/02463Arsenides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02494Structure
    • H01L21/02496Layer structure
    • H01L21/02502Layer structure consisting of two layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/02543Phosphides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • H01L21/02579P-type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/81Bodies
    • H10H20/817Bodies characterised by the crystal structures or orientations, e.g. polycrystalline, amorphous or porous

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Led Devices (AREA)

Abstract

This compound semiconductor substrate has, on a second GaP window layer, a light emitting layer configured of a double hetero structure composed of a lower cladding layer represented by the formula of (AlxGa1-x)yIn1-yP (0<x<1, 0<y<1), an active layer, and an upper cladding layer, and has a first GaP window layer on the light emitting layer. The compound semiconductor substrate is characterized in that the lattice constants of the lower cladding layer, the active layer, and the upper cladding layer match such that respective differences (??) between a Bragg angle on the (400) plane of a GaAs single crystal and respective Bragg angles on the (400) planes of the lower cladding layer, the active layer and the upper cladding layer are within the range of 50"-200" at a room temperature. Consequently, the high-quality compound semiconductor substrate is provided, said semiconductor substrate having improved light emitting service life characteristics, less variance of the light emitting service life characteristics within the plane, and furthermore, improved luminance.

Description

化合物半導體基板及其製造方法、以及使用該化合物半導體基板而成的發光元件 Compound semiconductor substrate, method for producing the same, and light-emitting element using the same

本發明關於一種化合物半導體基板及其製造方法、以及使用該化合物半導體基板而成的發光元件。 The present invention relates to a compound semiconductor substrate, a method for producing the same, and a light-emitting device using the compound semiconductor substrate.

近年來,由於例如容易在綠色至紅色的範圍中獲得較高亮度的發光能力,作為發光元件,經常會利用由化合物半導體基板所製造出來的發光元件,該化合物半導體基板是在GaAs基板上磊晶成長由(AlxGa1-x)yIn1-yP(以下,有時會簡稱為AlGaInP)4元混晶所構成的發光層而成。 In recent years, as a light-emitting element, for example, it is easy to obtain a high-luminance light-emitting ability in a range of green to red, a light-emitting element manufactured by a compound semiconductor substrate which is epitaxial on a GaAs substrate is often used. growth of (Al x Ga 1-x) y in 1-y P ( hereinafter sometimes referred to as an AlGaInP) quaternary mixed crystal as a light emitting layer composed together.

然而,像這樣將晶格常數與GaAs不同的AlGaInP等發光層形成於GaAs基板上的情況下,該晶格常數的差值越大,對例如發光元件的亮度或發光壽命特性造成的影響便會越大,而使這些特性降低。又,也有可能在化合物半導體基板中發生差排(dislocation)。 However, in the case where a light-emitting layer such as AlGaInP having a different lattice constant than GaAs is formed on a GaAs substrate, the larger the difference in lattice constant, the influence on the luminance or luminescence lifetime characteristics of, for example, a light-emitting element The larger the value, the lower the characteristics. Further, it is also possible to cause dislocation in the compound semiconductor substrate.

因此,在先前技術中,例如由專利文獻1所揭示,會在磊晶成長AlGaInP時,進行一種方法,以AlGaInP與GaAs的晶格面(400)的布拉格角的差△ω成為0〞~低角度的方式來匹配AlGaInP與GaAs的晶格常數,調整AlGaInP的組成來形成發光層。 Therefore, in the prior art, for example, as disclosed in Patent Document 1, when epitaxial growth of AlGaInP is performed, a method is performed in which the difference Δω of the Bragg angle of the lattice plane (400) of AlGaInP and GaAs becomes 0 〞 low. The lattice constant of AlGaInP and GaAs is matched in an angle manner, and the composition of AlGaInP is adjusted to form a light-emitting layer.

又,也進行過數種嚐試,例如形成混晶率逐漸變化而使晶格常數從GaAs的晶格常數逐漸變化至AlGaInP的晶 格常數的層,或是形成去緩和不匹配情況的層等,以藉此使磊晶成長出的AlGaInP層的晶格常數去接近GaAs的晶格常數。 Moreover, several attempts have been made, such as forming a crystal in which the crystal lattice constant is gradually changed to gradually change the lattice constant from the lattice constant of GaAs to AlGaInP. The layer of the lattice constant or the layer which is used to relax the mismatch is used to thereby make the lattice constant of the AlGaInP layer grown by the epitaxy close to the lattice constant of GaAs.

然而,僅靠著這種先前技術中,考慮到磊晶成長溫度中的晶格常數的製造方法,或者在中間形成用來縮小AlGaInP與GaAs的晶格常數差值的層的製造方法,會導致製造出的發光元件(化合物半導體基板)的亮度及發光壽命特性等諸特性變得不安定,而無法保證能夠得到讓人滿意的結果。 However, only in the prior art, a manufacturing method in which the lattice constant in the epitaxial growth temperature is considered, or a method of forming a layer for reducing the difference in lattice constant of AlGaInP and GaAs in the middle, may result in The characteristics such as the luminance and the luminescence lifetime characteristics of the manufactured light-emitting element (compound semiconductor substrate) are unstable, and it is not guaranteed that satisfactory results can be obtained.

[先前技術文獻] [Previous Technical Literature] (專利文獻) (Patent Literature)

專利文獻1:日本特開平9-186360號公報。 Patent Document 1: Japanese Laid-Open Patent Publication No. Hei 9-186360.

進而,已知在磊晶成長AlGaInP時,以AlGaInP與GaAs的晶格面(400)的布拉格角的差△ω成為0〞~低角度的方式來匹配AlGaInP與GaAs的晶格常數,並調整AlGaInP的組成來形成發光層的情況下,由於差排容易傳播至發光層,故會產生化合物半導體基板全體的發光壽命特性劣化、或是化合物半導體基板面內的發光壽命特性不均的情形,又該劣化或不均的程度也會在各批次基板中變成不安 定。 Further, it is known that when the AlGaInP is epitaxially grown, the lattice constant of AlGaInP and GaAs is matched so that the difference Δω of the Bragg angle of the lattice plane (400) of AlGaInP and GaAs becomes 0〞 to a low angle, and AlGaInP is adjusted. When the composition is formed to form a light-emitting layer, the difference in conductivity is likely to propagate to the light-emitting layer, so that the light-emitting lifetime characteristics of the entire compound semiconductor substrate are deteriorated or the light-emitting lifetime characteristics in the surface of the compound semiconductor substrate are not uniform. The degree of deterioration or unevenness also becomes uneasy in each batch of substrates set.

本發明是為了解決上述問題而開發出來,目的在於提供一種高品質的化合物半導體基板及其製造方法,該化合物半導體基板藉由抑制差排傳播至發光層,而增大發光壽命特性、改善發光壽命特性的面內不均,並進一步改善亮度。進而,本發明的目的在於提供一種使用上述化合物半導體基板而成的發光元件。 The present invention has been devised in order to solve the above problems, and an object thereof is to provide a high-quality compound semiconductor substrate which can increase luminescence lifetime characteristics and improve luminescence lifetime by suppressing diffusion into a luminescent layer by suppressing diffusion. In-plane variation of characteristics and further improvement in brightness. Further, an object of the present invention is to provide a light-emitting element using the above-described compound semiconductor substrate.

本發明,提供一種化合物半導體基板,該化合物半導體基板在第2GaP窗層上具有發光層,並在該發光層上具有第1GaP窗層,且該發光層是由以(AlxGa1-x)yIn1-yP(其中,0<x<1,0<y<1)來表示的下包覆層、活性層、及上包覆層的雙異質構造所構成,該化合物半導體基板的特徵在於: 前述下包覆層、前述活性層、及前述上包覆層的晶格常數經過匹配,而使前述下包覆層、前述活性層、及前述上包覆層在(400)面上的布拉格角與GaAs單晶在(400)面上的布拉格角的差△ω(以下有時會僅簡單記載成△ω)在室溫下分別成為50〞~200〞。 The present invention provides a compound semiconductor substrate having a light-emitting layer on a second GaP window layer and having a first GaP window layer on the light-emitting layer, and the light-emitting layer is made of (Al x Ga 1-x ) y In 1-y P (where 0<x<1, 0<y<1) constitutes a double heterostructure of the lower cladding layer, the active layer, and the upper cladding layer, and the characteristics of the compound semiconductor substrate The lattice constants of the lower cladding layer, the active layer, and the upper cladding layer are matched, and the lower cladding layer, the active layer, and the upper cladding layer are on the (400) surface. The difference Δω between the Bragg angle and the Bragg angle of the GaAs single crystal on the (400) plane (hereinafter sometimes simply referred to as Δω) is 50 〞 to 200 分别 at room temperature.

像這樣,若是匹配過下包覆層、活性層及上包覆層的晶格常數,而使△ω在室溫下分別成為50〞~200〞的化合物半導體基板,則會使化合物半導體基板各層間的應力緩和有效地發揮作用,而抑制錯位差排(misfit dislocation)等差排傳播至發光層各層,因此成為增大發光壽命特性、改善發光壽命特性的面內不均,且進一步改善亮度的化合 物半導體基板。 In this way, if the lattice constant of the lower cladding layer, the active layer, and the upper cladding layer is matched, and the compound semiconductor substrate having Δω of 50 Å to 200 Å at room temperature is obtained, the compound semiconductor substrates are each The stress relaxation between the layers effectively functions, and the misfit dislocation is prevented from being propagated to each layer of the light-emitting layer, thereby increasing the light-emitting lifetime characteristics, improving the in-plane unevenness of the light-emitting lifetime characteristics, and further improving the brightness. Compound Semiconductor substrate.

又,較佳是下包覆層、活性層及上包覆層的晶格常數經過匹配而使△ω在室溫下分別成為50〞~150〞(特別是成為50〞~100〞)的化合物半導體基板。 Further, it is preferred that the lattice constants of the lower cladding layer, the active layer, and the upper cladding layer are matched so that Δω becomes 50 〞 to 150 Å (especially 50 Å to 100 Å) at room temperature. Semiconductor substrate.

若是這種△ω的範圍,則會使化合物半導體基板各層間的應力緩和更有效地發揮作用,而抑制錯位差排等差排傳播至發光層各層,因此成為更加增大發光壽命特性、改善發光壽命特性的面內不均,且進一步改善亮度的化合物半導體基板。 In the case of such a range of Δω, the stress relaxation between the layers of the compound semiconductor substrate is more effectively performed, and the unevenness of the misalignment is suppressed from being propagated to each layer of the light-emitting layer, thereby further improving the light-emitting lifetime characteristics and improving the light emission. A compound semiconductor substrate having in-plane unevenness in lifetime characteristics and further improving brightness.

進而,本發明提供一種發光元件,該發光元件的特徵在於是由上述化合物半導體基板所製造出來。 Further, the present invention provides a light-emitting element characterized by being produced from the above-described compound semiconductor substrate.

若是這種發光元件,則會成為一種增大發光壽命特性、改善發光壽命特性的面內不均,且進一步改善亮度的發光元件。 In the case of such a light-emitting element, it becomes a light-emitting element which increases the light-emitting lifetime characteristics, improves the in-plane unevenness of the light-emitting lifetime characteristics, and further improves the luminance.

又,本發明提供了一種化合物半導體基板的製造方法,該製造方法包含以下步驟:發光層成長步驟,該發光層成長步驟在GaAs基板上磊晶成長由以(AlxGa1-x)yIn1-yP(其中,0<x<1,0<y<1)來表示的下包覆層、活性層、及上包覆層的雙異質構造所構成的發光層;第1GaP窗層成長步驟,該第1GaP窗層成長步驟在前述發光層上磊晶成長第1GaP窗層;蝕刻步驟,該蝕刻步驟蝕刻除去前述GaAs基板而使前述下包覆層露出;及 第2GaP窗層成長步驟,該第2GaP窗層成長步驟在前述露出的下包覆層上形成第2GaP窗層;其中,該製造方法的特徵在於:在前述發光層成長步驟中,以使前述下包覆層、前述活性層、及前述上包覆層在(400)面上的布拉格角與前述GaAs基板在(400)面上的布拉格角的差△ω在室溫下分別成為50〞~200〞的方式,在前述GaAs基板上磊晶成長上述發光層。 Moreover, the present invention provides a method of fabricating a compound semiconductor substrate, the method comprising the steps of: a light-emitting layer growth step of epitaxial growth on a GaAs substrate by (Al x Ga 1-x ) y In 1-y P (where 0<x<1, 0<y<1) represents a light-emitting layer composed of a double heterostructure of a lower cladding layer, an active layer, and an upper cladding layer; growth of the first GaP window layer a step of growing the first GaP window layer on the light-emitting layer in the first GaP window layer growth step, an etching step of etching away the GaAs substrate to expose the lower cladding layer, and a second GaP window layer growth step, The second GaP window layer growth step forms a second GaP window layer on the exposed lower cladding layer; wherein the manufacturing method is characterized in that in the step of growing the light-emitting layer, the lower cladding layer and the active layer are formed And the difference Δω between the Bragg angle of the upper cladding layer on the (400) plane and the Bragg angle of the GaAs substrate on the (400) plane is 50 〞 to 200 分别 at room temperature, respectively, in the GaAs The light-emitting layer is epitaxially grown on the substrate.

若是具有這種發光層成長步驟的化合物半導體基板的製造方法,則會成為一種製造化合物半導體基板的方法,該方法在製造時,可製造出化合物半導體基板各層間的應力緩和有效地發揮作用,而使錯位差排等差排不易傳播至發光層各層,因此增大發光壽命特性、改善發光壽命特性的面內不均,且進一步改善亮度。 In the method for producing a compound semiconductor substrate having such a step of growing the light-emitting layer, it is a method for producing a compound semiconductor substrate, and the method can effectively produce stress relaxation between layers of the compound semiconductor substrate during production. Since the misalignment row is not easily propagated to each layer of the light-emitting layer, the light-emitting life characteristics are improved, the in-plane unevenness of the light-emitting life characteristics is improved, and the brightness is further improved.

又,在發光層成長步驟中,較佳是以使△ω在室溫下分別成為50〞~150〞(特別是成為50〞~100〞)的方式在GaAs基板上磊晶成長發光層。 Further, in the step of growing the light-emitting layer, it is preferable to epitaxially grow the light-emitting layer on the GaAs substrate so that Δω becomes 50 Å to 150 Å (especially, 50 Å to 100 Å) at room temperature.

若是這種發光層成長步驟,則會成為一種製造化合物半導體基板的方法,該方法在製造時,可製造出化合物半導體基板各層間的應力緩和更有效地發揮作用,而使錯位差排等差排更不易傳播至發光層各層,因此更加增大發光壽命特性、改善發光壽命特性的面內不均,且進一步改善亮度。 In the case of such a light-emitting layer growth step, it is a method for producing a compound semiconductor substrate, which can produce a stress relaxation between layers of a compound semiconductor substrate more efficiently, and a misalignment row is arranged in a row. Since it is less likely to propagate to each layer of the light-emitting layer, the light-emitting life characteristics are further increased, the in-plane unevenness of the light-emitting life characteristics is improved, and the brightness is further improved.

如以上所說明,若是匹配了下包覆層、活性層及上包覆層的晶格常數,而使下包覆層、活性層、及上包覆層在(400)面上的布拉格角與GaAs單晶在(400)面上的布拉格角的差△ω在室溫下分別成為50〞~200〞的本發明的化合物半導體基板,則會緩和化合物半導體基板各層間的應力,而抑制錯位差排等差排傳播至發光層各層,因此成為增大發光壽命特性、改善發光壽命特性的面內不均,且進一步改善亮度的化合物半導體基板。 As described above, if the lattice constants of the lower cladding layer, the active layer, and the upper cladding layer are matched, the Bragg angles of the lower cladding layer, the active layer, and the upper cladding layer on the (400) plane are When the difference Δω of the Bragg angle of the GaAs single crystal on the (400) plane becomes 50 〞 to 200 Å of the compound semiconductor substrate of the present invention at room temperature, the stress between the layers of the compound semiconductor substrate is alleviated, and the misalignment is suppressed. Since the row-equivalent row propagates to each layer of the light-emitting layer, the compound semiconductor substrate is improved in the in-plane unevenness of the light-emitting lifetime characteristics, and the luminance is further improved.

以下,更詳細地說明本發明,但本發明並非限定於下述實施方式。如前述,所希望的是一種可抑制差排傳播至發光層的化合物半導體基板。 Hereinafter, the present invention will be described in more detail, but the present invention is not limited to the following embodiments. As described above, what is desired is a compound semiconductor substrate which can suppress the propagation of the difference row to the light-emitting layer.

本發明人,對上述問題經過反覆銳意檢討的結果,發現到若是下包覆層、活性層、及上包覆層的晶格常數經過匹配,而使下包覆層、活性層、及上包覆層在(400)面上的布拉格角與GaAs單晶在(400)面上的布拉格角的差△ω在室溫下分別成為50〞~200〞的化合物半導體基板,則會緩和化合物半導體基板各層間的應力,並發現到可藉此抑制錯位差排等的差排向發光層傳播,而改善發光壽命特性、面內的發光壽命特性的不均、以及亮度等,而完成了本發明。以下參照第1圖至第5圖詳細進行說明。 The present inventors have found through repeated investigations on the above problems that it is found that if the lattice constants of the lower cladding layer, the active layer, and the upper cladding layer are matched, the lower cladding layer, the active layer, and the upper cladding layer are obtained. The difference Δω between the Bragg angle of the cladding layer on the (400) plane and the Bragg angle of the GaAs single crystal on the (400) plane becomes a compound semiconductor substrate of 50 Å to 200 Å at room temperature, respectively, and the compound semiconductor substrate is alleviated. The stress between the layers was found to suppress the spread of the misalignment and the like to the light-emitting layer, thereby improving the light-emitting lifetime characteristics, the unevenness of the in-plane light-emitting lifetime characteristics, and the brightness, and the like. Hereinafter, the details will be described with reference to Figs. 1 to 5 .

[化合物半導體基板] [Compound semiconductor substrate]

本發明提供了一種化合物半導體基板,該化合物半導體基板在第2GaP窗層上具有發光層,並在該發光層上具有第1GaP窗層,且該發光層是由以(AlxGa1-x)yIn1-yP(其中,0<x<1,0<y<1)來表示的下包覆層、活性層、及上包覆層的雙異質構造所構成,該化合物半導體基板的特徵在於:前述下包覆層、前述活性層、及前述上包覆層的晶格常數經過匹配,而使前述下包覆層、前述活性層、及前述上包覆層在(400)面上的布拉格角與GaAs單晶在(400)面上的布拉格角的差△ω在室溫下分別成為50〞~200〞。 The present invention provides a compound semiconductor substrate having a light-emitting layer on a second GaP window layer and having a first GaP window layer on the light-emitting layer, and the light-emitting layer is made of (Al x Ga 1-x ) y In 1-y P (where 0<x<1, 0<y<1) constitutes a double heterostructure of the lower cladding layer, the active layer, and the upper cladding layer, and the characteristics of the compound semiconductor substrate The lattice constants of the lower cladding layer, the active layer, and the upper cladding layer are matched, and the lower cladding layer, the active layer, and the upper cladding layer are on the (400) surface. The difference Δω between the Bragg angle of the Bragg angle and the GaAs single crystal on the (400) plane becomes 50 〞 to 200 分别 at room temperature, respectively.

[第1GaP窗層及第2GaP窗層] [1st GaP window layer and 2GaP window layer]

本發明中的第1GaP窗層1及第2GaP窗層6,只要是由GaP組成的透明導電性膜即可,並未另外特別限定其特徵(第1圖)。第1GaP窗層及第2GaP窗層,例如可作成厚膜透明導電性膜,而作為第1GaP窗層的厚度,較佳是10μm~100μm。又,作為第2GaP窗層的厚度,較佳是10μm~100μm。即使是像這種厚膜的第1GaP窗層及第2GaP窗層,若是本發明的化合物半導體基板,則可改善發光壽命特性、面內的發光壽命特性的不均、以及亮度。 The first GaP window layer 1 and the second GaP window layer 6 in the present invention are not particularly limited as long as they are transparent conductive films composed of GaP (Fig. 1). The first GaP window layer and the second GaP window layer can be formed, for example, as a thick film transparent conductive film, and the thickness of the first GaP window layer is preferably 10 μm to 100 μm. Further, the thickness of the second GaP window layer is preferably 10 μm to 100 μm. Even in the case of the compound semiconductor substrate of the present invention, the first GaP window layer and the second GaP window layer of the thick film can improve the light-emitting lifetime characteristics, the unevenness of the in-plane light-emitting lifetime characteristics, and the brightness.

又,第1GaP窗層及第2GaP窗層,較佳是電流擴散層。若第1GaP窗層及第2GaP窗層是電流擴散層,則能夠不僅在電極的附近,而是在廣範圍內效率良好地發光。 Further, the first GaP window layer and the second GaP window layer are preferably current spreading layers. When the first GaP window layer and the second GaP window layer are current diffusion layers, it is possible to efficiently emit light in a wide range not only in the vicinity of the electrodes.

[發光層] [Light Emitting Layer]

本發明中的發光層5,是由以(AlxGa1-x)yIn1-yP(其中,0<x<1,0<y<1)來表示的下包覆層4、活性層3、及上包覆層2的雙異質構造所構成(第1圖)。 The light-emitting layer 5 in the present invention is an under cladding layer 4 represented by (Al x Ga 1-x ) y In 1-y P (where 0 < x < 1, 0 < y < 1), active The double layer structure of the layer 3 and the upper cladding layer 2 is formed (Fig. 1).

下包覆層4、活性層3及上包覆層2的晶格常數,經過匹配而使下包覆層4、活性層3、及上包覆層2在(400)面上的布拉格角與GaAs單晶在(400)面上的布拉格角的差△ω在室溫下分別成為50〞~200〞,其中較佳是50〞~150〞,而更佳是50〞~100〞。 The lattice constants of the lower cladding layer 4, the active layer 3, and the upper cladding layer 2 are matched so that the Bragg angles of the lower cladding layer 4, the active layer 3, and the upper cladding layer 2 on the (400) plane are The difference Δω of the Bragg angle of the GaAs single crystal on the (400) plane is 50 〞 to 200 分别 at room temperature, preferably 50 〞 to 150 〞, and more preferably 50 〞 to 100 〞.

作為△ω的算出方法,可藉由以下方式來進行:使用波長λ=1.5405埃的CuKα1光作為測量用的X光,來分別測量GaAs基板在(400)面上的布拉格角ω與AlGaInP下包覆層、活性層、上包覆層在(400)面上的布拉格角ω’,並求出其差值△ω(=ω’-ω)。 As a method of calculating Δω, it is possible to measure the Bragg angle ω and the AlGaInP of the GaAs substrate on the (400) plane by using CuKα1 light having a wavelength of λ = 1.5405 Å as the X-ray for measurement. The Bragg angle ω' of the cladding layer, the active layer, and the upper cladding layer on the (400) plane, and the difference Δω (= ω ' - ω) is obtained.

像這樣,藉由匹配下包覆層、活性層及上包覆層的晶格常數,而使△ω在室溫下分別成為50〞~200〞,其中較佳是50〞~150〞,而更佳是50〞~100〞,可使化合物半導體基板各層間的應力緩和有效地發揮作用,而抑制錯位差排等差排傳播至發光層各層。因此,可成為增大發光壽命特性、改善發光壽命特性的面內不均,且進一步改善亮度的化合物半導體基板。以下,參照第2、3圖來更詳細地進行說明。 Thus, by matching the lattice constants of the lower cladding layer, the active layer and the upper cladding layer, Δω is 50 〞 to 200 在 at room temperature, preferably 50 〞 to 150 Å, and More preferably, it is 50 Å to 100 Å, and the stress relaxation between the layers of the compound semiconductor substrate can be effectively performed, and the unevenness of the misalignment can be suppressed from being propagated to each layer of the light-emitting layer. Therefore, it is possible to obtain a compound semiconductor substrate in which the luminescence lifetime characteristics are improved, the in-plane unevenness of the luminescence lifetime characteristics is improved, and the luminance is further improved. Hereinafter, the details will be described with reference to FIGS. 2 and 3 .

第2圖(a)是在匹配下包覆層、活性層及上包覆層的晶 格常數,而使△ω在室溫下分別成為0〞~低角度的情況下的化合物半導體基板的概略剖面圖中,表示出伴隨內部應力的差排傳播方向。又,第2圖(b)是在匹配下包覆層、活性層及上包覆層的晶格常數,而使△ω在室溫下分別成為50〞~200〞的情況下的化合物半導體基板的概略剖面圖中,表示出伴隨內部應力的差排傳播方向。 Figure 2 (a) is the crystal of the cladding layer, the active layer and the upper cladding layer under matching In the schematic cross-sectional view of the compound semiconductor substrate when Δω is 0 〞 to a low angle at room temperature, the difference in the propagation direction of the internal stress is shown in Fig. 2, and Fig. 2(b) In the schematic cross-sectional view of the compound semiconductor substrate in the case where Δω is 50 〞 to 200 分别 at room temperature, the lattice constant of the under cladding layer, the active layer, and the upper cladding layer is matched, and The direction of propagation is accompanied by the difference in internal stress.

若如第2圖(a)所示,△ω在室溫下分別是0〞~低角度,則壓縮壓力會施加在以(AlxGa1-x)yIn1-yP(其中,0<x<1,0<y<1)來表示的下包覆層、活性層、及上包覆層上,而使錯位差排等的差排傳播至下包覆層、活性層、及上包覆層。藉此,先前技術中會使化合物半導體基板的發光壽命特性劣化,產生化合物半導體基板面內的發光壽命特性不均,而進一步使亮度惡化。另一方面,若如第2圖(b)所示,△ω在室溫下分別是50〞~200〞,則施加在下包覆層、活性層、及上包覆層的應力會受到緩和,而抑制下包覆層、活性層、及上包覆層的錯位差排等的差排傳播。藉此,本發明的化合物半導體基板增大發光壽命特性、改善發光壽命特性的面內不均,且進一步改善亮度。 If Δω is 0〞~low angle at room temperature as shown in Fig. 2(a), the compression pressure is applied to (Al x Ga 1-x ) y In 1-y P (where 0 <x<1, 0<y<1) is shown on the lower cladding layer, the active layer, and the upper cladding layer, and the difference between the misalignment row and the like is propagated to the lower cladding layer, the active layer, and the upper layer. Therefore, in the prior art, the luminescence lifetime characteristic of the compound semiconductor substrate is deteriorated, and the luminescence lifetime characteristic in the surface of the compound semiconductor substrate is uneven, and the luminance is further deteriorated. On the other hand, as shown in Fig. 2 ( b), when Δω is 50 〞 to 200 分别 at room temperature, the stress applied to the lower cladding layer, the active layer, and the upper cladding layer is alleviated, and the lower cladding layer, the active layer, and the lower layer are inhibited. Further, the compound semiconductor substrate of the present invention has a higher variation in luminescence lifetime characteristics, improved in-plane unevenness in luminescence lifetime characteristics, and further improved brightness.

為了表示△ω與差排的關係,拍攝下了化合物半導體基板的下包覆層與第2GaP窗層的界面的X光表面形貌照片。第3圖(a)中表示出匹配了下包覆層、活性層及上包覆層的晶格常數,而使△ω在室溫下分別成為0〞的情況下的化合物半導體基板的活性層X光表面形貌照片。又,第3圖(b)中表示出匹配了下包覆層、活性層及上包覆層的晶 格常數,而使△ω在室溫下分別成為100〞的情況下的化合物半導體基板的活性層X光表面形貌照片。 In order to show the relationship between Δω and the difference row, an X-ray surface topography photograph of the interface between the lower cladding layer of the compound semiconductor substrate and the second GaP window layer was taken. Fig. 3(a) shows the active layer of the compound semiconductor substrate in the case where the lattice constant of the lower cladding layer, the active layer and the upper cladding layer is matched, and Δω is 0 室温 at room temperature, respectively. X-ray surface topography. In addition, Figure 3 (b) shows the crystal matching the lower cladding layer, the active layer and the upper cladding layer. The X-ray surface topography of the active layer of the compound semiconductor substrate in the case where Δω is 100 分别 at room temperature, respectively.

若△ω在室溫下分別是0〞,則壓縮壓力會施加於下包覆層、活性層、及上包覆層上,而使化合物半導體基板各層間的內部應力平衡變差。藉此,差排(錯位差排等)從下包覆層/GaAs基板除去面(第2GaP層)界面向發光層方向延伸(參照第2圖)。結果,如第3圖(a)所示,在活性層等的發光層各層上產生差排,而產生發光壽命特性惡化、面內不均、亮度降低的情況。 When Δω is 0 在 at room temperature, the compression pressure is applied to the lower cladding layer, the active layer, and the upper cladding layer, and the internal stress balance between the layers of the compound semiconductor substrate is deteriorated. The difference between the lower cladding layer/the GaAs substrate removal surface (second GaP layer) is extended toward the light-emitting layer (see FIG. 2). As a result, as shown in FIG. 3(a), the activity is active. Differences occur in each layer of the light-emitting layer such as a layer, and the luminescence lifetime characteristics are deteriorated, the in-plane unevenness, and the luminance are lowered.

另一方面,若如本發明的化合物半導體基板,△ω在室溫下分別是100〞,則藉由將△ω作成50〞~200〞來緩和內部應力,差排容易向第2GaP層方向延伸,而取代自下包覆層/GaAs基板除去面(第2GaP層)界面向發光層方向延伸的情況(參照第2圖(b))。結果,如第3圖(b)所示,抑制了活性層等的發光層各層的錯位差排等的差排。因此,本發明的化合物半導體基板增大發光壽命特性、改善發光壽命特性的面內不均,且進一步改善亮度。 On the other hand, in the compound semiconductor substrate of the present invention, when Δω is 100 在 at room temperature, the internal stress is relieved by making Δω 50 〞 to 200 ,, and the difference is easily extended toward the second GaP layer. In the case where the interface from the lower cladding layer/GaAs substrate removal surface (second GaP layer) is extended in the direction of the light-emitting layer (see FIG. 2(b)), as shown in FIG. 3(b), the suppression is suppressed. The difference in retardation of each layer of the light-emitting layer such as the active layer, etc., therefore, the compound semiconductor substrate of the present invention increases the light-emitting lifetime characteristics, improves the in-plane unevenness of the light-emitting lifetime characteristics, and further improves the brightness.

[化合物半導體基板的製造方法] [Method of Manufacturing Compound Semiconductor Substrate]

又,本發明提供了一種化合物半導體基板的製造方法,該製造方法包含以下步驟:發光層成長步驟,該發光層成長步驟在GaAs基板上磊晶成長由以(AlxGa1-x)yIn1-yP(其中,0<x<1,0<y<1)來表示的下包覆層、活性層、及上包覆層的雙異質構造所構成 的發光層;第1GaP窗層成長步驟,該第1GaP窗層成長步驟在前述發光層上磊晶成長第1GaP窗層;蝕刻步驟,該蝕刻步驟蝕刻除去前述GaAs基板而使前述下包覆層露出;及第2GaP窗層成長步驟,該第2GaP窗層成長步驟在前述露出的下包覆層上形成第2GaP窗層;其中,該製造方法的特徵在於:在前述發光層成長步驟中,以使前述下包覆層、前述活性層、及前述上包覆層在(400)面上的布拉格角與前述GaAs基板在(400)面上的布拉格角的差△ω在室溫下分別成為50〞~200〞的方式,在前述GaAs基板上磊晶成長前述發光層。 Moreover, the present invention provides a method of fabricating a compound semiconductor substrate, the method comprising the steps of: a light-emitting layer growth step of epitaxial growth on a GaAs substrate by (Al x Ga 1-x ) y In 1-y P (where 0<x<1, 0<y<1) represents a light-emitting layer composed of a double heterostructure of a lower cladding layer, an active layer, and an upper cladding layer; growth of the first GaP window layer a step of growing the first GaP window layer on the light-emitting layer in the first GaP window layer growth step, an etching step of etching away the GaAs substrate to expose the lower cladding layer, and a second GaP window layer growth step, The second GaP window layer growth step forms a second GaP window layer on the exposed lower cladding layer; wherein the manufacturing method is characterized in that in the step of growing the light-emitting layer, the lower cladding layer and the active layer are formed And the difference Δω between the Bragg angle of the upper cladding layer on the (400) plane and the Bragg angle of the GaAs substrate on the (400) plane is 50 〞 to 200 分别 at room temperature, respectively, in the GaAs The light-emitting layer is epitaxially grown on the substrate.

以下,參照第4圖來詳細說明。 Hereinafter, it will be described in detail with reference to FIG.

[GaAs基板的準備(第4圖的(I)步驟)] [Preparation of GaAs Substrate (Step (I) of Fig. 4)]

作為GaAs基板,只要是一般用來成長AlGaInP混晶的基板即可,並未特別限定其特徵,例如可使用面方位(100)的偏角(off angle)是2~15度的基板。在此GaAs基板上,亦可使用形成有GaAs、AlGaAs、AlGaInP、InGaP、GaP、GaAsP等化合物半導體膜的GaAs基板。藉由MOVPE法來將這些化合物半導體膜形成於GaAs基板上的情況下,使用TMG(三甲基鎵)、TMA(三甲基鋁)、TMI(三甲基銦)、AsH3、PH3等的原料氣體,又,作為用來控制導電型的半導體雜質用氣體,使用DMZ(二甲基鋅)、DEZ(二乙基鋅) 或Cp2Mg、SiH4、H2Se等。這樣形成的化合物半導體膜,例如可對應發光二極體之類的發光元件等的用途而適當地選擇。 The GaAs substrate is not particularly limited as long as it is generally used for growing an AlGaInP mixed crystal. For example, a substrate having an off angle of a plane orientation (100) of 2 to 15 degrees can be used. A GaAs substrate on which a compound semiconductor film such as GaAs, AlGaAs, AlGaInP, InGaP, GaP, or GaAsP is formed may be used on the GaAs substrate. When these compound semiconductor films are formed on a GaAs substrate by the MOVPE method, TMG (trimethylgallium), TMA (trimethylaluminum), TMI (trimethylindium), AsH 3 , PH 3 or the like is used. Further, as the gas for semiconductor impurities for controlling the conductivity type, DMZ (dimethyl zinc), DEZ (diethyl zinc) or Cp 2 Mg, SiH 4 , H 2 Se or the like is used. The compound semiconductor film thus formed can be appropriately selected, for example, in accordance with the use of a light-emitting element such as a light-emitting diode.

[發光層成長步驟(第4圖的(II)步驟)] [Light-emitting layer growth step (step (II) of Fig. 4)]

本發明中的發光層成長步驟,是在GaAs基板上磊晶成長由以(AlxGa1-x)yIn1-yP(其中,0<x<1,0<y<1)來表示的下包覆層、活性層、及上包覆層的雙異質構造所構成的發光層。此發光層成長步驟中,是以使下包覆層、活性層、及上包覆層在(400)面上的布拉格角與上述GaAs基板在(400)面上的布拉格角的差△ω在室溫下分別成為50〞~200〞(其中較佳是50〞~150〞,而更佳是50〞~100〞)的方式,來將發光層磊晶成長於GaAs基板上。作為發光層的成長方法,並未特別加以限制,可使用減壓200mbar以下、600℃以上的條件下的MOVPE法來進行。例如,作為原料氣體使用TMG(三甲基鎵)、TMA(三甲基鋁)、TMI(三甲基銦)、PH3,又,作為用來控制導電型的半導體雜質用氣體,使用DMZ(二甲基鋅)、DEZ(二乙基鋅)或Cp2Mg、SiH4、H2Se等。 The step of growing the light-emitting layer in the present invention is that epitaxial growth on the GaAs substrate is represented by (Al x Ga 1-x ) y In 1-y P (where 0 < x < 1, 0 < y < 1) A light-emitting layer composed of a double heterostructure of a lower cladding layer, an active layer, and an upper cladding layer. In the step of growing the light-emitting layer, the difference Δω between the Bragg angle of the lower cladding layer, the active layer, and the upper cladding layer on the (400) plane and the Bragg angle of the GaAs substrate on the (400) plane is The light-emitting layer is epitaxially grown on the GaAs substrate at a temperature of 50 Å to 200 Å (preferably 50 Å to 150 Å, and more preferably 50 Å to 100 Å) at room temperature. The growth method of the light-emitting layer is not particularly limited, and it can be carried out by the MOVPE method under the conditions of a pressure reduction of 200 mbar or less and 600 ° C or more. For example, TMG (trimethylgallium), TMA (trimethylaluminum), TMI (trimethylindium), and PH 3 are used as the material gas, and DMZ is used as a gas for semiconductor impurities for controlling conductivity type. Dimethylzinc), DEZ (diethylzinc) or Cp 2 Mg, SiH 4 , H 2 Se, and the like.

由AlGaInP組成的發光層各層的調整條件,例如可先測量GaAs的晶格面(400)在室溫下的布拉格角與(AlxGa1-x)yIn1-yP(其中,0<x<1,0<y<1)的晶格面(400)在室溫下的布拉格角,然後比較這兩者以預先找出使△ω進入50〞~200〞的範圍內的調整條件,藉此來決定發光層各層 的調整條件。 The adjustment conditions of the respective layers of the light-emitting layer composed of AlGaInP, for example, the Bragg angle of the lattice plane (400) of GaAs at room temperature and (Al x Ga 1-x ) y In 1-y P (where 0 < The Bragg angle of the lattice plane (400) of x<1,0<y<1) at room temperature, and then comparing the two to find out the adjustment condition for making Δω into the range of 50〞~200〞, Thereby, the adjustment conditions of the respective layers of the light-emitting layer are determined.

[第1GaP窗層成長步驟(第4圖的(III)步驟)] [First GaP Window Layer Growth Step (Step (III) of Fig. 4)]

本發明中的第1GaP窗層成長步驟,是在發光層上磊晶成長第1GaP窗層。成長方法並未特別限定,例如可藉由600℃以上的條件下的VPE法來磊晶成長厚膜透明導電性膜(GaP)。作為第1GaP窗層的厚度,雖未特別限定,但較佳是在10μm~100μm。即使是像這種厚膜的第1GaP窗層,若是本發明的化合物半導體基板的製造方法,則可製造出改善發光壽命特性、面內的發光壽命特性的不均、以及亮度的化合物半導體基板。 In the first GaP window layer growth step in the present invention, the first GaP window layer is epitaxially grown on the light-emitting layer. The growth method is not particularly limited. For example, a thick film transparent conductive film (GaP) can be epitaxially grown by a VPE method under conditions of 600 ° C or higher. The thickness of the first GaP window layer is not particularly limited, but is preferably 10 μm to 100 μm. In the method of manufacturing the compound semiconductor substrate of the present invention, the first semiconductor wafer substrate of the present invention can produce a compound semiconductor substrate having improved luminescence lifetime characteristics, unevenness in luminescence lifetime characteristics, and luminance.

[蝕刻步驟(第4圖的(IV)步驟)] [etching step (step (IV) of Fig. 4)]

本發明中的蝕刻步驟,是將GaAs基板蝕刻除去,以露出下包覆層。 In the etching step of the present invention, the GaAs substrate is etched away to expose the lower cladding layer.

[第2GaP窗層成長步驟(第4圖的(V)步驟)] [2th GaP window layer growth step (step (V) of Fig. 4)]

本發明中的第2GaP窗層成長步驟,可在露出的下包覆層上磊晶成長第2GaP窗層,或者可藉由接合透明導電性GaP基板來形成第2GaP窗層。磊晶成長方法並未特別限定,例如可藉由600℃以上的條件下的VPE法來進行。又,接合方法亦未特別限定,可藉由在100℃以上進行熱處理來接合。 In the second GaP window layer growth step of the present invention, the second GaP window layer may be epitaxially grown on the exposed under cladding layer, or the second GaP window layer may be formed by bonding the transparent conductive GaP substrate. The epitaxial growth method is not particularly limited, and can be carried out, for example, by a VPE method under conditions of 600 ° C or higher. Further, the joining method is not particularly limited, and it can be joined by heat treatment at 100 ° C or higher.

[發光元件] [Light-emitting element]

進而,本發明中提供一種發光元件,該發光元件的特徵在於是由上述化合物半導體基板所製造出來。雖未特別加以限制,但可在上述化合物半導體基板上形成Au系P型及N型的歐姆電極,然後晶片化成任意尺寸(例如250μm~300μm平方)來製造發光元件(第4圖的(VI)步驟)。若是這種發光元件,則可成為一種增大發光壽命特性、在發光元件間改善發光壽命特性的不均,並進一步改善亮度的發光元件。 Further, the present invention provides a light-emitting element which is produced by the above-described compound semiconductor substrate. Although not particularly limited, an Au-based P-type and N-type ohmic electrode can be formed on the above-described compound semiconductor substrate, and then wafer-formed into an arbitrary size (for example, 250 μm to 300 μm square) to produce a light-emitting element (Fig. 4 (VI) step). According to such a light-emitting element, it is possible to provide a light-emitting element which has improved light-emitting lifetime characteristics, improved unevenness in light-emitting lifetime characteristics between light-emitting elements, and further improved brightness.

[實施例] [Examples]

以下,舉出本發明的實施例及比較例來進一步詳細進行說明,但本發明並非限定於下述的實施例。 Hereinafter, the examples and comparative examples of the present invention will be described in further detail, but the present invention is not limited to the following examples.

(實施例1) (Example 1)

在GaAs基板上,根據MOVPE法磊晶成長出N型Si摻雜(載子濃度1×1018/cm3)且厚度0.5μm的GaAs緩衝層與N型Si摻雜(載子濃度1×1018/cm3)且厚度1μm的AlGaInP下包覆層,然後磊晶成長出無摻雜且厚度1μm的AlGaInP活性層,再磊晶成長出P型Mg摻雜(載子濃度1×1017/cm3)且厚度1μm的AlGaInP上包覆層(發光層成長步驟)。 On the GaAs substrate, a GaAs buffer layer having an N-type Si doping (carrier concentration of 1×10 18 /cm 3 ) and a thickness of 0.5 μm is epitaxially grown according to the MOVPE method and N-type Si doping (carrier concentration 1×10) 18 /cm 3 ) and a thickness of 1 μm under the coating of AlGaInP, and then epitaxial growth of an undoped AlGaInP active layer with a thickness of 1 μm, and epitaxial growth of P-type Mg doping (carrier concentration 1 × 10 17 / cm 3) and a thickness of 1μm on the AlGaInP cladding layer (light emitting layer growth step).

此發光層成長步驟中,以使下包覆層、活性層、及上包覆層在(400)面上的布拉格角與上述GaAs基板在(400)面 上的布拉格角的差△ω在室溫下分別成為50〞的方式來調整發光層的結晶組成,而於GaAs基板上磊晶成長出發光層。 In the step of growing the light-emitting layer, the Bragg angle of the lower cladding layer, the active layer, and the upper cladding layer on the (400) plane is on the (400) plane of the GaAs substrate. The difference Δω of the upper Bragg angle was adjusted to 50 室温 at room temperature to adjust the crystal composition of the light-emitting layer, and the light-emitting layer was epitaxially grown on the GaAs substrate.

繼而,作為第1GaP窗層而磊晶成長出P型Mg摻雜(載子濃度3×1017/cm3)且厚度2μm的GaP窗層,然後以VPE法磊晶成長出P型Zn摻雜(載子濃度8×1017/cm3)且厚度50μm的厚膜透明導電性GaP層(第1GaP窗層成長步驟),之後蝕刻除去GaAs基板(蝕刻步驟)。最後,以VPE法磊晶成長出作為第2GaP窗層的N型S摻雜(載子濃度5×1017/cm3)且厚度100μm的GaP窗層(第2GaP窗層形成步驟),而製作出化合物半導體基板。 Then, as a first GaP window layer, a GaP window layer having a P-type Mg doping (carrier concentration of 3×10 17 /cm 3 ) and a thickness of 2 μm is epitaxially grown, and then P-type Zn doping is epitaxially grown by VPE method. A thick film transparent conductive GaP layer (having a first GaP window layer growth step) having a carrier concentration of 8 × 10 17 /cm 3 and a thickness of 50 μm, and then etching and removing the GaAs substrate (etching step). Finally, a GaP window layer (second GaP window layer forming step) having an N-type S doping (carrier concentration of 5 × 10 17 /cm 3 ) and a thickness of 100 μm as a second GaP window layer is epitaxially grown by a VPE method. A compound semiconductor substrate is produced.

在此化合物半導體基板上形成Au系P型及N型歐姆電極,並晶片化成任意尺寸而製造出發光元件。對這樣製造出的本發明的發光元件的亮度及發光壽命特性進行測量。測量時的溫度是85℃,溼度是45%,測量在電流20mA下的發光輸出Po(mW),又,在通電50mA以上的電流100小時後再度測量發光輸出,以算出發光壽命特性(%)。該測量結果表示於表1。 On the compound semiconductor substrate, an Au-based P-type and N-type ohmic electrode were formed and wafer-formed into an arbitrary size to produce a light-emitting element. The luminance and luminescence lifetime characteristics of the light-emitting element of the present invention thus produced were measured. The temperature at the time of measurement was 85 ° C, the humidity was 45%, the light output Po (mW) at a current of 20 mA was measured, and the light output was measured again after the current of 50 mA or more was applied for 100 hours to calculate the luminescence lifetime characteristic (%). . The measurement results are shown in Table 1.

又,藉由2結晶X光繞射法測量的AlGaInP活性層的晶格面(400)的布拉格角、從該布拉格角所算出的變形晶格常數及緩和晶格常數、及GaAs單晶與AlGaInP活性層的晶格不匹配率的結果亦表示於表1。此外,2結晶X光繞射法中使用波長λ=1.5405埃的CuKα1光作為測量用的X光。 Further, the Bragg angle of the lattice plane (400) of the AlGaInP active layer measured by the 2-crystal X-ray diffraction method, the deformation lattice constant calculated from the Bragg angle, and the relaxation lattice constant, and the GaAs single crystal and AlGaInP The results of the lattice mismatch ratio of the active layer are also shown in Table 1. Further, in the 2-crystal X-ray diffraction method, CuKα1 light having a wavelength λ = 1.5405 angstroms was used as X-ray for measurement.

此外,變形晶格常數、緩和晶格常數、及晶格不匹配率可使用下述式(1)、(2)、(3)來求出。 Further, the deformation lattice constant, the relaxation lattice constant, and the lattice mismatch ratio can be obtained by the following formulas (1), (2), and (3).

變形晶格常數=2×CuKα1光的波長λ/sin(AlGaInP活性層在(400)面的布拉格角ω’π/180)………(1) The deformed lattice constant = 2 × CuKα1 wavelength λ / sin (the Bragg angle of the AlGaInP active layer at the (400) plane ω' π / 180) ... (1)

緩和晶格常數=0.47×GaAs晶格常數+0.53×變形晶格常數………(2) Relaxed lattice constant = 0.47 × GaAs lattice constant + 0.53 × deformation lattice constant...... (2)

晶格不匹配率=(緩和晶格常數-GaAs晶格常數)/GaAs晶格常數………(3) Lattice mismatch rate = (moderate lattice constant - GaAs lattice constant) / GaAs lattice constant... (3)

此處,將GaAs晶格常數設為5.65325埃。 Here, the GaAs lattice constant was set to 5.65325 Å.

(實施例2) (Example 2)

除了以△ω在室溫下分別成為75〞的方式來調整發光層的結晶組成,而於GaAs基板上磊晶成長出發光層以外,以與實施例1同樣的方法製作出發光元件。 A light-emitting device was produced in the same manner as in Example 1 except that the crystal composition of the light-emitting layer was adjusted so that Δω became 75 Å at room temperature, and the light-emitting layer was epitaxially grown on the GaAs substrate.

(實施例3) (Example 3)

除了以△ω在室溫下分別成為100〞的方式來調整發光層的結晶組成,而於GaAs基板上磊晶成長出發光層以外,以與實施例1同樣的方法製作出發光元件。 A light-emitting device was produced in the same manner as in Example 1 except that the crystal composition of the light-emitting layer was adjusted so that Δω became 100 Å at room temperature, and the light-emitting layer was epitaxially grown on the GaAs substrate.

(實施例4) (Example 4)

除了以△ω在室溫下分別成為150〞的方式來調整發光層的結晶組成,而於GaAs基板上磊晶成長出發光層以外,以與實施例1同樣的方法製作出發光元件。 A light-emitting device was produced in the same manner as in Example 1 except that the crystal composition of the light-emitting layer was adjusted so that Δω became 150 Å at room temperature, and the light-emitting layer was epitaxially grown on the GaAs substrate.

(實施例5) (Example 5)

除了以△ω在室溫下分別成為200〞的方式來調整發光層的結晶組成,而於GaAs基板上磊晶成長出發光層以外,以與實施例1同樣的方法製作出發光元件。 A light-emitting device was produced in the same manner as in Example 1 except that the crystal composition of the light-emitting layer was adjusted so that Δω became 200 Å at room temperature, and the light-emitting layer was epitaxially grown on the GaAs substrate.

(比較例1) (Comparative Example 1)

除了以△ω在室溫下分別成為-100〞的方式來調整發光層的結晶組成,而於GaAs基板上磊晶成長出發光層以外,以與實施例1同樣的方法製作出發光元件。 A light-emitting device was produced in the same manner as in Example 1 except that the crystal composition of the light-emitting layer was adjusted so that Δω became -100 Torr at room temperature, and the light-emitting layer was epitaxially grown on the GaAs substrate.

(比較例2) (Comparative Example 2)

除了以△ω在室溫下分別成為0〞的方式來調整發光層的結晶組成,而於GaAs基板上磊晶成長出發光層以外,以與實施例1同樣的方法製作出發光元件。 A light-emitting device was produced in the same manner as in Example 1 except that the crystal composition of the light-emitting layer was adjusted so that Δω became 0 室温 at room temperature, and the light-emitting layer was epitaxially grown on the GaAs substrate.

如以上所製造出來的實施例1~5、比較例1~2的發光元件的輸出Po(mW)、發光壽命特性(%)、AlGaInP活性層在晶格面(400)上的布拉格角、變形晶格常數、緩和晶格常數、晶格不匹配率,將這些資料表示於表1。 The output Po (mW), the luminescence lifetime characteristic (%) of the light-emitting elements of Examples 1 to 5 and Comparative Examples 1 and 2 manufactured as described above, and the Bragg angle and deformation of the AlGaInP active layer on the lattice plane (400) The lattice constant, the relaxation lattice constant, and the lattice mismatch ratio are shown in Table 1.

進而,將對實施例1~5、比較例1~2的發光元件的發光壽命特性、面內的發光壽命特性不均進行測量的結果,表示於第5圖。第5圖的橫軸表示化合物半導體基板的面內位置,而縱軸表示與該面內位置對應的發光壽命特性。 Further, the results of measuring the luminescence lifetime characteristics and the in-plane luminescence lifetime characteristics of the light-emitting elements of Examples 1 to 5 and Comparative Examples 1 and 2 are shown in Fig. 5. The horizontal axis of Fig. 5 indicates the in-plane position of the compound semiconductor substrate, and the vertical axis indicates the luminescence lifetime characteristic corresponding to the in-plane position.

如以上,若將下包覆層、活性層、及上包覆層在(400)面上的布拉格角與上述GaAs基板在(400)面上的布拉格角於室溫附近的差△ω從-100〞比較至+200〞,則可得知△ω在50〞~200〞時的發光壽命特性上昇(表1)。進而,圖中(第5圖)表示出,△ω在50〞~200〞的本發明的化合物半導體基板的實施例1~5中,在發光壽命特性進步的同時,面內不均、輸出(亮度)也獲得改善。 As described above, the difference between the Bragg angle of the lower cladding layer, the active layer, and the upper cladding layer on the (400) plane and the Bragg angle of the GaAs substrate on the (400) plane at room temperature is Δω from - When 100 〞 is compared to +200 〞, the luminescence lifetime characteristic of Δω at 50 〞 to 200 上升 is known (Table 1). Further, in the drawings (Fig. 5), in Examples 1 to 5 of the compound semiconductor substrate of the present invention having Δω of 50 Å to 200 Å, the luminescence lifetime characteristics are improved, and the in-plane unevenness and output ( Brightness) has also been improved.

另一方面也表示出,GaAs基板與AlGaInP活性層在(400)面的布拉格角的差△ω在0〞至低角度側的比較例1及比較例2中,由於化合物半導體基板各層間的內部應力平衡較差,差排(錯位等)會從下包覆層/GaAs基板除去面(第2GaP層)界面朝發光層方向延伸,因此在發光層中產生差排,而產生發光壽命特性惡化、面內不均、亮度降低的情況。 On the other hand, in Comparative Example 1 and Comparative Example 2 in which the difference Δω between the GaAs substrate and the AlGaInP active layer at the Bragg angle of the (400) plane was 0 〞 to the low angle side, the inside of each layer of the compound semiconductor substrate was The stress balance is poor, and the difference (dislocation, etc.) is extended from the lower cladding layer/GaAs substrate removal surface (second GaP layer) interface toward the light-emitting layer. Therefore, a difference is generated in the light-emitting layer, and the light-emitting lifetime characteristics are deteriorated. Unevenness and reduced brightness.

如以上所說明的,若是匹配了下包覆層、活性層、及 上包覆層的晶格常數,而使下包覆層、活性層、及上包覆層在(400)面上的布拉格角與GaAs單晶在(400)面上的布拉格角的差△ω在室溫下分別成為50〞~200〞的本發明的化合物半導體基板,則化合物半導體基板各層間的應力會受到緩和,且抑制錯位差排等差排傳播至發光層各層,因此成為增大發光壽命特性、改善發光壽命特性的面內不均,且進一步改善亮度的化合物半導體基板。 As explained above, if the lower cladding layer, the active layer, and The lattice constant of the upper cladding layer, and the difference between the Bragg angle of the lower cladding layer, the active layer, and the upper cladding layer on the (400) plane and the Bragg angle of the GaAs single crystal on the (400) plane Δω When the compound semiconductor substrate of the present invention is 50 Å to 200 Å at room temperature, the stress between the layers of the compound semiconductor substrate is alleviated, and the unevenness of the misalignment is suppressed from being propagated to each layer of the luminescent layer, thereby increasing the luminescence. A compound semiconductor substrate having a life characteristic, an in-plane unevenness in which the luminescence lifetime characteristics are improved, and a luminance is further improved.

此外,本發明並不限定於上述實施形態。上述實施形態僅為例示,任何具有與本發明的申請專利範圍所記載的技術思想在實質上相同的構成,且發揮同樣作用效果的技術,亦包含在本發明的技術範圍中。 Further, the present invention is not limited to the above embodiment. The above-described embodiments are merely illustrative, and any technique having substantially the same configuration as the technical idea described in the patent application of the present invention and exhibiting the same operational effects is also included in the technical scope of the present invention.

1‧‧‧第1GaP窗層 1‧‧‧1GaP window layer

2‧‧‧上包覆層 2‧‧‧Upper coating

3‧‧‧活性層 3‧‧‧Active layer

4‧‧‧下包覆層 4‧‧‧Under cladding

5‧‧‧發光層 5‧‧‧Lighting layer

6‧‧‧第2GaP窗層 6‧‧‧2GaP window layer

第1圖是本發明的化合物半導體基板的概略剖面圖。 Fig. 1 is a schematic cross-sectional view showing a compound semiconductor substrate of the present invention.

第2圖(a)是在匹配了下包覆層、活性層及上包覆層的晶格常數,而使△ω在室溫下分別成為0〞~低角度的情況下的化合物半導體基板的概略剖面圖中,表示出伴隨內部應力的差排的傳播方向的圖;第2圖(b)是在匹配了下包覆層、活性層及上包覆層的晶格常數,而使△ω在室溫下分別成為50〞~200〞的情況下的化合物半導體基板的概略剖面圖中,表示出伴隨內部應力的差排的傳播方向的圖。 Fig. 2(a) shows the compound semiconductor substrate in the case where the lattice constants of the lower cladding layer, the active layer and the upper cladding layer are matched, and Δω is made 0 〞 to a low angle at room temperature, respectively. In the schematic cross-sectional view, the propagation direction of the difference with the internal stress is shown. In the second (b), the lattice constant of the lower cladding layer, the active layer, and the upper cladding layer is matched, and Δω is obtained. In the schematic cross-sectional view of the compound semiconductor substrate in the case of 50 〞 to 200 Å at room temperature, the propagation direction of the difference in the internal stress is shown.

第3圖(a)是匹配了下包覆層、活性層及上包覆層的晶格常數,而使△ω在室溫下分別成為0〞的情況下的化合 物半導體基板的活性層的X光表面形貌照片;第3圖(b)是匹配了下包覆層、活性層及上包覆層的晶格常數,而使△ω在室溫下分別成為100〞的情況下的化合物半導體基板的活性層的X光表面形貌照片。 Fig. 3(a) shows the combination of the lattice constants of the lower cladding layer, the active layer and the upper cladding layer, and the case where Δω becomes 0 在 at room temperature, respectively. X-ray surface topography of the active layer of the semiconductor substrate; Figure 3 (b) shows the lattice constants of the lower cladding layer, the active layer and the upper cladding layer, so that Δω becomes respectively at room temperature X-ray surface topography of the active layer of the compound semiconductor substrate in the case of 100 Å.

第4圖是本發明的化合物半導體基板的製造方法的流程圖。 Fig. 4 is a flow chart showing a method of producing a compound semiconductor substrate of the present invention.

第5圖是表示實施例1~5及比較例1~2的發光元件的發光壽命特性及面內的發光壽命特性不均的圖表。 Fig. 5 is a graph showing the luminescence lifetime characteristics and the luminescence lifetime characteristic unevenness of the light-emitting elements of Examples 1 to 5 and Comparative Examples 1 and 2.

1‧‧‧第1GaP窗層 1‧‧‧1GaP window layer

2‧‧‧上包覆層 2‧‧‧Upper coating

3‧‧‧活性層 3‧‧‧Active layer

4‧‧‧下包覆層 4‧‧‧Under cladding

5‧‧‧發光層 5‧‧‧Lighting layer

6‧‧‧第2GaP窗層 6‧‧‧2GaP window layer

Claims (8)

一種化合物半導體基板,該化合物半導體基板在第2GaP窗層上具有發光層,並在該發光層上具有第1GaP窗層,且該發光層是由以(AlxGa1-x)yIn1-yP(其中,0<x<1,0<y<1)來表示的下包覆層、活性層、及上包覆層的雙異質構造所構成,該化合物半導體基板的特徵在於:前述下包覆層、前述活性層、及前述上包覆層的晶格常數經過匹配,而使前述下包覆層、前述活性層、及前述上包覆層在(400)面上的布拉格角與GaAs單晶在(400)面上的布拉格角的差△ω在室溫下分別成為50〞~200〞。 A compound semiconductor substrate having a light-emitting layer on a second GaP window layer and having a first GaP window layer on the light-emitting layer, and the light-emitting layer is made of (Al x Ga 1-x ) y In 1- y P (where 0<x<1, 0<y<1) is composed of a double heterostructure of a lower cladding layer, an active layer, and an upper cladding layer, and the compound semiconductor substrate is characterized by the foregoing The lattice constants of the cladding layer, the active layer, and the upper cladding layer are matched, and the Bragg angle and the GaAs of the lower cladding layer, the active layer, and the upper cladding layer on the (400) plane are matched. The difference Δω of the Bragg angle of the single crystal on the (400) plane is 50 〞 to 200 分别 at room temperature, respectively. 如請求項1所述的化合物半導體基板,其中,前述下包覆層、前述活性層、及前述上包覆層的晶格常數經過匹配,而使前述△ω在室溫下分別成為50〞~150〞。 The compound semiconductor substrate according to claim 1, wherein the lattice constants of the lower cladding layer, the active layer, and the upper cladding layer are matched, and the Δω is 50 〞 at room temperature. 150〞. 如請求項1所述的化合物半導體基板,其中,前述下包覆層、前述活性層、及前述上包覆層的晶格常數經過匹配,而使前述△ω在室溫下分別成為50〞~100〞。 The compound semiconductor substrate according to claim 1, wherein the lattice constants of the lower cladding layer, the active layer, and the upper cladding layer are matched, and the Δω is 50 〞 at room temperature. 100 years old. 如請求項2所述的化合物半導體基板,其中,前述下包覆層、前述活性層、及前述上包覆層的晶格常數經過匹配,而使上述△ω在室溫下分別成為50〞~100〞。 The compound semiconductor substrate according to claim 2, wherein the lattice constants of the lower cladding layer, the active layer, and the upper cladding layer are matched, and the Δω is 50 〞 at room temperature. 100 years old. 一種發光元件,該發光元件的特徵在於是由請求項1至請求項4中任一項所述的化合物半導體基板所製造出來。 A light-emitting element which is produced by the compound semiconductor substrate according to any one of claims 1 to 4. 一種化合物半導體基板的製造方法,該製造方法包含以下步驟:發光層成長步驟,該發光層成長步驟在GaAs基板上磊晶成長由以(AlxGa1-x)yIn1-yP(其中,0<x<1,0<y<1)來表示的下包覆層、活性層、及上包覆層的雙異質構造所構成的發光層;第1GaP窗層成長步驟,該第1GaP窗層成長步驟在前述發光層上磊晶成長第1GaP窗層;蝕刻步驟,該蝕刻步驟蝕刻除去前述GaAs基板而使前述下包覆層露出;及第2GaP窗層成長步驟,該第2GaP窗層成長步驟在前述露出的下包覆層上形成第2GaP窗層;其中,該製造方法的特徵在於:在前述發光層成長步驟中,以使前述下包覆層、前述活性層、及前述上包覆層在(400)面上的布拉格角與前述GaAs基板在(400)面上的布拉格角的差△ω在室溫下分別成為50〞~200〞的方式,在前述GaAs基板上磊晶成長前述發光層。 A method for fabricating a compound semiconductor substrate, the method comprising the steps of: a light-emitting layer growth step of epitaxial growth on a GaAs substrate by (Al x Ga 1-x ) y In 1-y P (wherein a light-emitting layer composed of a double heterostructure of a lower cladding layer, an active layer, and an upper cladding layer, represented by 0<x<1, 0<y<1); a first GaP window layer growth step, the first GaP window a layer growth step of epitaxially growing a first GaP window layer on the light-emitting layer; an etching step of etching the GaAs substrate to expose the lower cladding layer; and a second GaP window layer growth step, the second GaP window layer growing a step of forming a second GaP window layer on the exposed lower cladding layer; wherein the manufacturing method is characterized in that in the step of growing the light-emitting layer, the lower cladding layer, the active layer, and the upper cladding layer are coated The difference Δω between the Bragg angle of the layer on the (400) plane and the Bragg angle of the GaAs substrate on the (400) plane is 50 〞 to 200 分别 at room temperature, respectively, and epitaxial growth is performed on the GaAs substrate. Light-emitting layer. 如請求項6所述的化合物半導體基板的製造方法,其 中,在前述發光層成長步驟中,以使前述△ω在室溫下分別成為50〞~150〞的方式,在前述GaAs基板上磊晶成長前述發光層。 A method of producing a compound semiconductor substrate according to claim 6, wherein In the step of growing the light-emitting layer, the light-emitting layer is epitaxially grown on the GaAs substrate so that the Δω is 50 Å to 150 Å at room temperature. 如請求項7所述的化合物半導體基板的製造方法,其中,在前述發光層成長步驟中,以使前述△ω在室溫下分別成為50〞~100〞的方式,在前述GaAs基板上磊晶成長前述發光層。 The method of producing a compound semiconductor substrate according to claim 7, wherein in the step of growing the light-emitting layer, epitaxy is performed on the GaAs substrate so that the Δω is 50 〞 to 100 在 at room temperature, respectively. The aforementioned light-emitting layer is grown.
TW101118367A 2011-06-02 2012-05-23 Compound semiconductor substrate, method for producing the same, and light-emitting element using the same TW201316378A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2011124564 2011-06-02

Publications (1)

Publication Number Publication Date
TW201316378A true TW201316378A (en) 2013-04-16

Family

ID=47258724

Family Applications (1)

Application Number Title Priority Date Filing Date
TW101118367A TW201316378A (en) 2011-06-02 2012-05-23 Compound semiconductor substrate, method for producing the same, and light-emitting element using the same

Country Status (3)

Country Link
JP (1) JP5768879B2 (en)
TW (1) TW201316378A (en)
WO (1) WO2012164847A1 (en)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3635757B2 (en) * 1995-12-28 2005-04-06 昭和電工株式会社 AlGaInP light emitting diode
JP3900128B2 (en) * 2003-09-19 2007-04-04 住友電気工業株式会社 ZnSe light emitting device
JP5309949B2 (en) * 2008-12-12 2013-10-09 信越半導体株式会社 Compound semiconductor substrate, light emitting element, compound semiconductor substrate manufacturing method, and light emitting element manufacturing method
JP5169959B2 (en) * 2009-04-08 2013-03-27 信越半導体株式会社 Method for manufacturing light emitting device
JP2011077496A (en) * 2009-04-28 2011-04-14 Shin Etsu Handotai Co Ltd Light-emitting element, and method of manufacturing the same

Also Published As

Publication number Publication date
WO2012164847A1 (en) 2012-12-06
JPWO2012164847A1 (en) 2015-02-23
JP5768879B2 (en) 2015-08-26

Similar Documents

Publication Publication Date Title
CN101556917B (en) Method for forming quantum well structure and method for manufacturing semiconductor light emitting element
US20100133506A1 (en) Nitride semiconductor light emitting element and method for manufacturing nitride semiconductor
JP2001160627A (en) Group III nitride compound semiconductor light emitting device
JP2002231997A (en) Nitride based semiconductor light emitting device
JP2009135244A (en) Epitaxial wafer for semiconductor light emitting device and semiconductor light emitting device
JP2020098908A (en) Group iii nitride semiconductor light emitting element and method for producing the same
US7514707B2 (en) Group III nitride semiconductor light-emitting device
WO2011102450A1 (en) Method of manufacture for a compound semiconductor light-emitting element
US11984535B2 (en) III-nitride semiconductor light-emitting device comprising barrier layers and well layers and method of producing the same
US8421056B2 (en) Light-emitting device epitaxial wafer and light-emitting device
JPH09283799A (en) Semiconductor light-emitting element
WO2020122137A1 (en) Group iii nitride semiconductor light emitting element and method for producing same
JP2001094151A (en) Nitride compound semiconductor light-emitting element and manufacturing method therefor
JPH09116130A (en) Group 3-5 compound semiconductor, manufacturing method thereof, and light emitting device
TW201316378A (en) Compound semiconductor substrate, method for producing the same, and light-emitting element using the same
JP7200068B2 (en) Light emitting device and manufacturing method thereof
JP5309949B2 (en) Compound semiconductor substrate, light emitting element, compound semiconductor substrate manufacturing method, and light emitting element manufacturing method
JP2008108964A (en) Semiconductor light emitting device and manufacturing method thereof
TWI446574B (en) A compound semiconductor substrate, a light-emitting element using the same, and a method for producing a compound semiconductor substrate
JP2012174876A (en) Semiconductor light-emitting element and method for manufacturing semiconductor light-emitting element
KR101387543B1 (en) Nitride semiconductor light emitting device
JP2010278262A (en) Manufacturing method of epitaxial wafer for light emitting diode
JP3767534B2 (en) Light emitting device
WO2020209014A1 (en) Light emitting element and method of manufacturing light emitting element
JP2010232638A (en) Epitaxial wafer for light emitting device and light emitting device