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TW201122695A - Thin film transistor array substrate and method for fabricating the same - Google Patents

Thin film transistor array substrate and method for fabricating the same Download PDF

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Publication number
TW201122695A
TW201122695A TW099116016A TW99116016A TW201122695A TW 201122695 A TW201122695 A TW 201122695A TW 099116016 A TW099116016 A TW 099116016A TW 99116016 A TW99116016 A TW 99116016A TW 201122695 A TW201122695 A TW 201122695A
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Taiwan
Prior art keywords
substrate
electrode
insulating film
data line
gate
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TW099116016A
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Chinese (zh)
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TWI480657B (en
Inventor
Hee-Young Kwack
Heung-Lyul Cho
Jeong-Yun Lee
Jung-Ho Son
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Lg Display Co Ltd
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Publication of TWI480657B publication Critical patent/TWI480657B/en

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/13439Electrodes characterised by their electrical, optical, physical properties; materials therefor; method of making
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136213Storage capacitors associated with the pixel electrode

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Mathematical Physics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Geometry (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Liquid Crystal (AREA)
  • Thin Film Transistor (AREA)

Abstract

A thin film transistor array substrate is disclosed. The thin film transistor array substrate includes: a substrate; a gate line and a data line arranged to cross each other to define a pixel region on the substrate; a switch element disposed at an intersection of the gate line and the data line; second pixel electrodes and first common electrodes alternately arranged in the pixel region formed on the substrate; a second common electrode formed to overlap the data line which is interposed between a gate insulation film and a protective film; a first storage electrode formed on the substrate; a second storage electrode formed to overlap the first storage electrode and be in a single body with a drain electrode of the switch element; and an organic insulation film formed over the switch element, the second storage electrode, a gate pad, and a data pad. The second common electrode is formed to cover the data line, the protective film, the organic insulation film and the gate insulation film on the substrate, and have inclined surfaces which reach the surface of the substrate.

Description

201122695 六、發明說明: 【發明所屬之技術領域】 : 本發明係關於—種液晶顯示裝置(LCD)。 【先前技術】 ,、通常’液晶顯示裝置之巾具有介電各向異性之液晶的透光率 透過電%控制’用以顯示一影像。此液晶顯示裝置通常透過將 -衫色濾辨縣板與-賴電晶齡雕板相結合,並且透過 其間包含有一液晶層製成。 近來’成種新模式驗晶顯示裝置(LCD)正在開發以解決 習知技術之液晶顯稀置(LCD)的窄視角。具有寬視角的液晶 顯不裝置(LCD)可分類為一平面切換模式⑴遍驗㈣ (Optically Compensated Birefringence, 〇CB)模式、—邊緣電場_ (Fringe Field Swiping,FFS)模式、 或其他模式。 、在/、有寬視角之液晶顯示裝置(Lcd)之中,平面切換(奶) 模式液aa顯示裝置允畫素電極與―共同電極排列於同一基板 之上,以使得—水平電場錢於這兩個電極之間。同樣,液晶分 子之主轴在關於該基板之一水平方向上排列。因此,平面切換 (IPS )模式之液晶顯示裝置相比較於習知技術之扭轉向列 (TwlStedNematic,™)模式液晶顯示裝置具有一更寬之視角。 「第1圖」係為習知技術之平面切換(IPS)模式之液晶顯示 裝置之中的-畫素結構之示意圖。「第2圖」係為沿「第i圖」之 Ι-Γ線之晝素結構之橫截面圖。 201122695 月參閱「第1圖」及「第2圖」,一閘極線丨與一資料線$彼 此相交又以使得定義一畫素區域。一用作開關單元之薄膜電晶體 TFT位於閘極線〗與資料線5之交叉處。 在晝素區域之上,一與閘極線丨相對之第一共同線3與資料 線5相交又,第一共同電極%自第一共同線3延伸出且與資料線 5相平行,並且第一共同電極3a形成於晝素區域之兩側面。 閘極線1包含有一具有加寬寬度之閘極la。一第一儲存電極 6相鄰於閘極la。第一儲存電極6與第—共同形成為一單 一體。 而且,一與第一共同線3電連接之第二共同線13形成於第一 共同線3之上。第二共同電極13a自第二共同線13朝向晝素區域 延伸。此夕卜,與第-共同電極3a部份相^疊的第三共同電極⑶ 自第二共同線13延伸出。 第二共同電極13a與畫素電極%交替配設於晝素區域之中。 畫素電極7a自與第-儲存電極6相重疊的一第二儲存電極7 出。 「第2圖」表示沿資料線5之-區域中的w,線之橫戴面圖, 在「第2圖」之中,-閘極絕緣膜12形成一底基板1〇之上。資 料線5形成於閘極絕緣膜12之上。排列於資料線5之兩側的第一 ,、同電極3a形成於底基板10之上。第三共同電極nb形成於一 保護(或鈍化)膜19之上且與第-共同電極如部份相重曼。、 彩色渡光陣列基板包含有-黑矩陣21,黑矩陣21與資料線相 對。黑矩陣21形成於一頂基板20之上。一紅色⑻波光層^ 201122695 29&quot;代 及一綠色⑹濾、光層25b形成於黑矩陣21之兩側面。 表一覆蓋層。 如此之知技術之平面切換⑽)模式液晶齡裝置迫使 ',、、矩陣21之寬度L1變得更寬(例如至少%微米—)),用以 防止透過背光單域生且_畫魏域之邊緣傳賴光線產生之 光_漏。更具體而言,黑矩陣21形成為到達第—共㈣極% 之-邊緣,以便在關於-垂直線傾斜至少_怪定角度的方向上, 中斷光線在資料線5與第—共同電極3&amp;之間通過。由於此原因, 畫素區域之孔徑比降低。 此外,由於第-共同電極3a排列於資料線5之兩側面,因此 對於習知技術之薄膜電晶體陣縣板增加晝素區域之孔徑比比較 【發明内容】 區域之孔徑比 因此,馨於上述之問題,本發明關於一種薄膜電晶體陣列基 板’错以絲由於習知技術_及缺陷所產生—個或多個問題。 、本發明之目的之-在於提供一種薄膜電晶體陣列基板及其製 =方法其透過在一食料線之上配設一共同電極適合於增加畫素 1本發明之另-目的在於提供一種薄膜電晶體陣列基板及其製 =方法,其透過在4板之上形成—畫素電極及—制電極,適 3於增加畫素區域之孔徑比。 、皮本發明之再-目的在於提供一種薄膜電晶體陣列基板及其製 造方法’其透過平滑相鄰於—畫素區域的資料線區中的錐形表衣 201122695 面,適合於防止— 斷開缺陷 —&quot;rrj呢厂白° 地錢蹄透财㈣訂的朗得以部分 點可的實射得出。本翻的目的和其他優 _:圖:::記:=^ 某板根據ίΓΓ—般目的,—種薄膜電晶體陣列基板包含有一 :在基極=線彼此相交又_ 料線之-六^ 侧兀件,其位於開極線與資 這此第-2 碰個第二畫素電極及複數個第—共同電極, 金奸&quot;Γ電極與第—共同電極相交替排列於基板之上形成的 ;=中;一第二共同電極,其形成為與資料線相重叠,其 =::rr:;:護膜 r 一第— 相重聂且,帛存彡成域第—儲存電極 宜且與開關元件之-沒極形成為—單—體;以及 膜’此有機_臟彡成於_元件、第二儲钟極、資料線、一 閘極塾、以及―資料塾之上,其中第二共同電極 之上的資料線、保制、有機絕緣膜以及閘極絕緣膜, 達基板之表面的傾斜表面。 、勺=據^發明之—般目的,—種薄膜電晶體_基板之製造方 ^包3 ]提供_基板;形成—第_金屬膜於基板之上,並且通過 第:光罩製程將第一金屬膜形成圖案為一閘極、一閘極線、一 第儲存電極以及一閘極順次形成一閘極絕緣膜、一半導體 層、以及一第二金屬膜於基板之上且通過一第二光罩製程自第二 201122695 j驗半導體層形成雜/祕、―第二儲錢極、—通 =了貝料線:順次形成-保護膜及—有機絕緣膜於基板之上, Π過—第三光罩製㈣成有機絕緣膜之圖案用以暴露保護膜 順次執行第-及第二钮刻步驟,第—及第二細步驟 2形成圖案的有機絕緣膜用作光罩且透過使用不同氧氣 氣體,用以形成基板之上的—畫素區域、一暴露第 :儲存電極的第-接觸孔及—暴露_塾的第二接觸孔;以及形 成一第二金屬膜於基板之上,以及然後將晝素區域中的第三金屬 膜之圖案形成為複數個晝素電極及複數個共同電極。 並且本發明其他的系統、方法、特徵及優點對於本領域的普 通技術人員來說’可以透過以下圖式及詳細說變得清楚。應該 理解的是財如狀其赠統、方法、舰及優點包含於本說明 =内’包含於本發明之範圍之内,並且透過以下之申請專利範圍 付到保€。本部份之内容不看作對申料利範圍之限制。更多方 面及優點將結合以下實施例進行討論。可以理解的是,如上所述 的本發明之概括綱和隨騎軸本發明之詳細酬均是具有代 表性和解釋性的說明,並且是為了進—步揭示本發明之中請專利 範圍。 【實施方式】 以下將結合圖式部份詳細描述本發明之實施例。下文中引入 的這些實_作為將其精神傳遞至本領域之技術人貞的實例。因 此’這些實施例可體現為不同之形式,因此並不限制於在此描述 之這些實施例。 201122695 一基板、一層、—區域、田疋件,例如 之上&quot;或,,之下,,時;^了吉膜垃、或—電極稱作形成於另-元件,, 次者了插入有(間接)元件。一元件 ^之下, 圖式確定。在圖式之中,-彼 或之下#可根據 並不絲元件之實際尺寸尺寸為了清編可放大,但是 區域之係為本發明第—實施例之液晶顯柯置之—畫素 一本發明第—實施例之液晶顯示裝置包含有 叉j⑷该晝素區域透過一間極線215與一資料線315相交 —賴電晶體配設於鼠線215與資料線315之交又處。 相平^共^25在相鄰於祕線215的位置,與閘極二 相千仃。第一共同線225與資料線3〗5相交又。 * 2極線215在與資料線315相交叉之位置(區域)具有—加 見度閘極線215之加寬寬度用作一薄膜電晶體丁打之問極 250因此’閘極25〇與閘極線215形成為 抓包含有_撕-源極秦—汲極.以及_=== 未示)。 而且’一第一健存電極225a形成於畫素區域之中且與第一共 同線225形成為-體(自第一共同線225延伸出)。第一儲存電極 漁與第二儲存電極在晝素區域之巾—起形成—儲存電容 器。第二儲存電極260與第一儲存電極漁相對。第二儲存電極 260與汲極450形成為一單一體(或延伸出)。 201122695 在畫素區域之中’一第—晝素電極24〇形成為與第一共同線 • 225相重疊,並且複數個第二晝素電極,自第—晝素電極⑽ •朝向晝素區域延伸出且與資料線31S相平行。複數個第二畫素電 極730以固定間隔排列於晝素區域之内。此外,第二儲存電極⑽ 通過第-接觸孔_與第—畫素電極電連接。 、而且,一第二共同線245形成為與第-共同線225及畫素區 域中的第-儲存電極225a相對。複數個第一共同電極·自第二 共同線245朝向晝素區域延伸且與資料、線315相平行。而且,第 -共同·74〇在晝素區域中與第二晝素電極相交替排列。 一第二共同電極235自第二共同線245之兩側面延伸出以盘 資料線315相重疊。第二共同電極故防止透過一背光單元(圖 未不)之光源產生且圍繞資料線315穿過之光線引起的茂漏。而 且’第二共同電極235通過-第三接觸孔㈣與第一儲存電極島 電連接。因此’ -共同電壓通過第一共同線奶及第一儲存電極 225a提供至第:共同電極235、第_共同電極、以及第二共同 線 245。 ’、 而且’ 一有機絕緣膜600位於第二共同電極235與資料線315 之間。而且’本發明之液晶顯示裝置(LCD)提供一液晶材料之 路徑P,路徑P允許-液晶材料在彼此相鄰的晝素區域之間圍繞 資料線315流動。液晶材料之路徑p透過自資料線周圍完全去除 有機絕緣膜600,或者透過在相鄰於(或圍繞)資料線的區域形成 相比較於其他區域更薄的有機絕緣膜形成。 同’ -自閘極線215延伸出之閘極墊21〇形成於液晶顯示 201122695 . 裝置(LCD)之一墊區之中。一閘極塾接觸電極 極墊210相接觸。問極塾接觸電請通過-第一接^為與閘 問極㈣相接觸。 〜第-接觸編與 第4A圖」至「第8B圖」係為一液晶顯示裳置之 之橫截面圖,並且表示沿「第3圖」之腿,線及職、膜 電晶體陣職板之橫截面結構。 H專膜 請參閱「第4A圖」及「第4B圖」,一第—金屬膜透過―喷 、又方法况積於一透明絕緣材料之底基板100之上。然後,在一 一光罩製程_,對沉積的金屬膜執行—_步驟。 在第縣製城間,—具械光材料之光_情 &gt;儿積的金屬臈之上。然後此光阻劑透過使用具有透射區及射 =光罩執行曝光及顯影,由此形成一光阻圖案。其後,透過使 圖案作為一光罩钱刻沉積之金屬膜,以使得形成-閘極 250、一第一儲存電極取、以及一閑極塾2⑴。並且同時形成一 雜線215及一第一共同、線225。閘極線215與閘極250形成一單 一體。第-共同線225與第一儲存電極225a形成為一單—體。 第一金屬膜可自銦(Mo)'鈦㈤、輕㈤、鶴(w)、銅 (〇0、鉻⑹、銘(Αυ、其合金或其組合物之—組中選擇 材料形成。雖然如圖所示,金屬膜形成於一單層之中,然而 要時’遠金屬膜可透縣疊至少兩個金屬層形成。 「在閘極250等元件形成於底基板1〇〇上之後,如「第认圖」 及「第5B圖」所示’一閘極絕緣膜2〇〇、一非晶石夕膜及—推雜非 晶石夕膜㈣㈣之半導體層,以及一第二金屬膜順次形成於具 12 201122695 100之1極250及第—儲存電極225a以及閘㈣210的底基板 _ 第、二金屬膜可自錮(M0)、鈦㈤、钽㈤、鶴(w)、銅 ;/(Cr)鋁(A1)、其合金或其組合物之一組中選擇之一 材料升/成。而且,—例如氧化銦錫㈤ium Tin 〇涵肋)的 透明導電材料層可用作第二金屬膜。而且,賴第二金屬膜如圖 所不域—早層之巾,但是當需要時,第二金細可透過堆疊至 少兩個金屬層形成。 蚁後對覆蓋有第二金屬膜的底基板1〇〇執行使用半色調光 罩及繞射鮮之i第二光罩製程,用以自第二金屬膜形成源極 及極440及450、-第二儲存電極26〇、以及一資料線315,並 且自半導體層形成-通道層_。雖細未示,綱時形成一資料 墊。 、 由於使用半色s周光罩或繞射光罩,通道層圖案娜存在於資 料線315之下。如「第5B圖」所示,一儲存電容器形成於第一儲 存電極225a與第二儲存電極26〇之間。其後,一保護膜形成 於底基板100之全部表面上。 請參閱「第6A圖」至「第6C圖」及「第7圖」,一有機絕 緣膜600形成於其上形成有保護膜的底基板励之上如「第 6A圖」所不。其後,對其上形成有有機絕緣膜_的底基板觸 執行-第三光罩製程’第三光罩製程之中使用—具有全透射區ρι 非透射區P2、以及半透射區Μ的光罩如「第6b圖」 所不’第三光罩製程完全去除與杉_之全透龍ρι相對應的 13 201122695 有機絕緣膜600 有機絕緣膜_用以暴露保護膜,部份去除與光罩_之半透射 區P3相對應的有機絕緣膜6則以減少鱗膜·之厚度,並且 按照原樣轉(即,不去除)與光_之非透射㈣相對庠的 有機絕緣膜600具有一相比較於保護膜·更低的介電常 數。有機絕緣膜嶋可具有一大約3.〇〜4 〇之介電常數。較佳地, 位於資料線315與稱後形成的第二共同電極235 (請參閱「第犯 圖」)之_有機絕賴_具有大約為3 4〜3 8之介電常數。位 於資料線犯與稍後形成的第二共同電極235之間的有機絕緣膜 6〇〇可具有大約為3〜6微米(μιη)之厚度。或者,有機絕緣膜_ 可根據液晶顯稀置(LCD)之驅動解具有不同之厚度。 隨著驅動頻率變得更高,在資料線315鮮二共同=極(「第 3圖」之235)之間產生的耦合效應產生一訊號延遲,其中該第二 共同電極雛形成於有機絕賴_之上。然而,本發明之液晶 顯不装置(LCD)使用低介電常數的有機絕緣膜_,以使得減少 資料線315與第二共同電極况之間產生的寄生電容。因此,可 防止訊號延遲。 更具體而言,寄生電容與資料線315及第二共同電極235之 間的距離成反比例。因此,資料線315與第二共同電極235之間 有機絕緣膜600之厚度越大,寄生電容越小。結果,可減少透過 身料線315與第二共同電極235之間的耦合效應產生的訊號延遲。 舉例而言’如果液晶顯示裝置(LCD)之驅動頻率設置為12〇 赫茲(Hz)’資料線315與第二共同電極235之間的有機絕緣膜 201122695 600之厚度可為大約2 晶顯示裝置(LCm · (μΠ1)之範圍内。或者,當液 、 具有240赫茲(Ήζ)之驅動頻率時,有機π 緣膜600之厚度可為 半時’有機、% _由於當対液日Γ 微米(卿)之範_。這樣, 裝置⑽)時此厚度並不設置為—固定值, 同電顯示裝置之規格而改變。而且,需要改變第二共 此種情況下,Μ防錢顧漏且提高畫素_之孔徑比。 月 &quot;絕緣膜600可根據驅動頻率變得更薄或更厚。 制於光丙稀。八j電吊數’有機絕緣膜_並不限 6B ®」’如’本實施例之液晶顯示裝置 (LCD)之I造方法採用的第三光罩製程執行底基板则的曝光 及縣步驟,_完全及部份去除錢__。換句話而言, 騎’有機絕緣膜_透過曝光及顯影步驟形成圖案。 树光及顯影步驟之後,透敬_成_财機絕緣膜· 作為光罩,執行一蝕刻步驟。 在該侧步驟之中’如「第6C圖」所示,底基板则之一部 伤暴露以形成-晝素區域m。一第一接觸孔610形成為暴露第 -儲錢極260之一部份,其中第二儲存電極2_及極形 成為單體。而且,-第二接觸孔62〇形成為暴露問極塾加 (之一部份)。 , _,順次餘刻圍繞資料線仍形成的保護膜及閘極絕 15 201122695 緣膜加。同樣,因為半色調光罩或繞射光罩使用於第三光罩製程 之中口此了平/月相鄰於資料線之兩侧面形成的錐形表面。類似 地,堆4:於閘極塾21〇之上的保護膜5〇〇及閘極絕緣膜也順 次飯刻用以形成第二接觸孔62〇。然而,僅姓刻保護膜·用以形 成暴露第二儲存電極26〇之一部份的第一接觸孔⑽。此外,在本 發明之方法中採用的第三光罩製程透過使用不同氧含量比的氣體 執仃兩次侧步驟。同樣,保護膜5〇〇及閘極絕緣膜·之邊緣 表面被平β。因此’稍後形成的覆蓋資料線315的第二共同電極 具有有機絕緣膜600上的一頂表面,以及兩個到達底基板觸之 表面的平滑傾斜表面。結果,可防止透過在第二共同電極扭與 晝素區域之間的邊界的不良台階覆蓋(即,—陡销梯部份)產 生的斷開。 而且’如上所述,本實施例形成一較薄有機絕緣膜_於薄 ^晶體及儲存電容11之上。這樣,形成於_電晶體及儲存電 谷器之上的有機絕緣膜_之厚度減少。此外,保留於資料線31: 之上的有機絕緣膜_及保護膜5GG與保留於資料線315之下的 間極猶膜200在資料線315之兩側面具有錐形表面,由於使用 半色°周光罩及繞射光罩,資料線315之連續性得到提高。 而且’如「第7圖」所示,一第三接觸孔㈣通過第三光罩 、王,形成為與第一儲存電極225a相對應。 第—及第三接觸孔620及630可透過钱刻保護膜勝以 2⑻形成。為此,可做㈣知技術中輸刻步驟 月况下’在曝歧顯影製程之後’有機絕軸_保留於這 16 201122695 。這樣,由於保留有機絕緣膜600,每-接觸孔之内 .亚且錐軸側表面缺陷產生於這些接觸孔之中。 - ^ 上所示,在本實施例之方法中採用的第三光罩 1程透過使用不同氧含量_職體執行兩個侧步驟。因此, 如此f錐形内側表面缺陷不產生於這些接觸孔之内。201122695 VI. Description of the Invention: [Technical Field of the Invention]: The present invention relates to a liquid crystal display device (LCD). [Prior Art] In general, the transmittance of a liquid crystal display device having a dielectric anisotropy is transmitted through an electric % control to display an image. The liquid crystal display device is usually made by combining a shirt color filter plate with a Lai electric crystal age plate and a liquid crystal layer therebetween. Recently, a new mode of crystallographic display device (LCD) is being developed to solve the narrow viewing angle of a liquid crystal display (LCD) of the prior art. A liquid crystal display device (LCD) having a wide viewing angle can be classified into a plane switching mode (1) (Optically Compensated Birefringence, 〇CB) mode, a Fringe Field Swiping (FFS) mode, or other modes. In the liquid crystal display device (Lcd) having a wide viewing angle, the planar switching (milk) mode liquid aa display device allows the pixel electrodes and the "common electrode to be arranged on the same substrate, so that the horizontal electric field is used for this. Between the two electrodes. Also, the major axes of the liquid crystal molecules are arranged in a horizontal direction with respect to one of the substrates. Therefore, the liquid crystal display device of the planar switching (IPS) mode has a wider viewing angle than the twisted nematic (TM) mode liquid crystal display device of the prior art. Fig. 1 is a schematic diagram of a pixel structure in a liquid crystal display device of a planar switching (IPS) mode of the prior art. "Picture 2" is a cross-sectional view of the unitary structure of the Ι-Γ line along the "i". In 201122695, please refer to "Figure 1" and "Figure 2". A gate line and a data line $ intersect each other to define a pixel area. A thin film transistor TFT used as a switching unit is located at the intersection of the gate line and the data line 5. Above the halogen region, a first common line 3 opposite to the gate line 相 intersects the data line 5, and the first common electrode % extends from the first common line 3 and is parallel to the data line 5, and A common electrode 3a is formed on both sides of the halogen region. The gate line 1 includes a gate 1a having a widened width. A first storage electrode 6 is adjacent to the gate la. The first storage electrode 6 is formed integrally with the first. Further, a second common line 13 electrically connected to the first common line 3 is formed above the first common line 3. The second common electrode 13a extends from the second common line 13 toward the halogen region. Further, the third common electrode (3) overlapping the portion of the first common electrode 3a extends from the second common line 13. The second common electrode 13a and the pixel electrode % are alternately arranged in the halogen region. The pixel electrode 7a is discharged from a second storage electrode 7 overlapping the first storage electrode 6. "Fig. 2" shows a cross-sectional view of the line along the line of the data line 5, and in the "second picture", the gate insulating film 12 is formed on the base substrate 1''. The material line 5 is formed on the gate insulating film 12. The first, same electrode 3a arranged on both sides of the data line 5 is formed on the base substrate 10. The third common electrode nb is formed over a protective (or passivation) film 19 and is as heavy as the first common electrode. The color light-emitting array substrate includes a -black matrix 21, and the black matrix 21 is opposite to the data line. The black matrix 21 is formed on a top substrate 20. A red (8) wave layer ^ 201122695 29 &quot; and a green (6) filter, light layer 25b are formed on both sides of the black matrix 21. Table 1 overlay. The planar switching (10) mode of the prior art technique forces the ',, and the width L1 of the matrix 21 to be wider (for example, at least % micron -)) to prevent single-domain generation through the backlight and The edge produces light _ leakage. More specifically, the black matrix 21 is formed to reach the first-fourth (fourth) pole-edge so as to interrupt the light at the data line 5 and the first-common electrode 3&amp; in a direction inclined at least with respect to the - vertical line. Pass between. For this reason, the aperture ratio of the pixel area is lowered. In addition, since the first common electrode 3a is arranged on both sides of the data line 5, the aperture ratio of the region of the thin film transistor array is increased in comparison with the prior art. SUMMARY OF THE INVENTION The present invention is directed to a thin film transistor array substrate that has one or more problems due to conventional techniques and defects. The object of the present invention is to provide a thin film transistor array substrate and a method for manufacturing the same, which is suitable for adding a pixel by applying a common electrode on a food material line. The crystal array substrate and the method thereof are formed by forming a pixel electrode and an electrode on the four plates, and increasing the aperture ratio of the pixel region. Further, it is an object of the present invention to provide a thin film transistor array substrate and a method of fabricating the same that are adapted to prevent-breaking by smoothing the face of the cone-shaped cover 201122695 in the data line region adjacent to the region of the pixel region. Defect - &quot; rrj factory white 钱 蹄 蹄 ( ( 四 四 四 四 四 得以 得以 得以 得以 得以 得以 得以 得以 得以 得以 得以 得以 得以 得以 得以 得以The purpose of this flip and other advantages _: Figure:::Remarks: =^ A board according to the purpose of ΓΓ, - a thin film transistor array substrate contains: at the base = line intersect with each other _ material line - six ^ The side member is located on the open circuit and the second electrode of the second pixel and the plurality of first common electrodes, and the gold electrode and the common electrode are alternately arranged on the substrate. a second common electrode formed to overlap with the data line, which =::rr:;: the protective film r, the first phase, the phase, and the storage electrode, And the non-polarity of the switching element is formed as a single body; and the film 'this organic _ 彡 is formed on the _ component, the second storage clock pole, the data line, a gate 塾, and the data ,, wherein A data line, a protective film, an organic insulating film, and a gate insulating film over the common electrode, reaching an inclined surface of the surface of the substrate. , spoon = according to the general purpose of the invention, a thin film transistor _ substrate manufacturing method ^ package 3] provide _ substrate; form - the _ metal film on the substrate, and through the: reticle process will be the first The metal film is patterned into a gate, a gate line, a storage electrode and a gate, and a gate insulating film, a semiconductor layer, and a second metal film are sequentially formed on the substrate and passed through a second light. The mask process from the second 201122695 j semiconductor layer formation of miscellaneous / secret, "the second piggy bank, - pass = shell material line: sequential formation - protective film and - organic insulating film on the substrate, Π over - third The mask is made of (4) a pattern of an organic insulating film for exposing the protective film, and the first and second button steps are sequentially performed, and the organic insulating film patterned by the first and second fine steps 2 is used as a mask and transmits different oxygen gases. Forming a pixel region over the substrate, exposing a first contact hole of the storage electrode and a second contact hole exposing the electrode; and forming a second metal film on the substrate, and then Pattern formation of a third metal film in a halogen region Day plurality of pixel electrodes and a plurality of common electrodes. The other systems, methods, features, and advantages of the invention will be apparent to those skilled in the <RTIgt; It should be understood that the terms, methods, ships, and advantages of the invention are included in the scope of the present invention and are covered by the following claims. The content of this section is not to be construed as limiting the scope of the application. Further aspects and advantages will be discussed in conjunction with the following examples. It is to be understood that the summary of the invention and the claims of the invention as described above are both representative and explanatory, and are intended to further disclose the scope of the invention. [Embodiment] Hereinafter, embodiments of the present invention will be described in detail in conjunction with the drawings. These examples are incorporated below as examples of the teachings of the art to those skilled in the art. Accordingly, the embodiments may be embodied in different forms and are not limited to the embodiments described herein. 201122695 A substrate, a layer, a region, a field element, such as above &quot; or, below, when; ^ 吉膜, or - electrode is said to be formed in another component, the second is inserted (indirect) component. Below a component ^, the schema is determined. In the drawings, -P or # can be enlarged according to the actual size of the non-wire component, but the region is the liquid crystal display of the first embodiment of the present invention - a pixel The liquid crystal display device of the first embodiment includes a fork j (4). The halogen region intersects a data line 315 through a pole line 215 - the plasma is disposed at the intersection of the mouse line 215 and the data line 315. The level ^^^25 is adjacent to the secret line 215 and is two thousand miles away from the gate. The first common line 225 intersects with the data line 3 〖5. * The 2-pole line 215 has a widened width at the position (area) intersecting the data line 315 - the gate width of the gate line 215 is used as a thin film transistor for the gate 250. Therefore, the gate 25 is connected to the gate. The pole line 215 is formed to include a _ tear-source Qin-dip pole. and _=== not shown. Further, a first storage electrode 225a is formed in the pixel region and formed as a body (extending from the first common line 225) with the first common line 225. The first storage electrode and the second storage electrode form a storage capacitor in the area of the halogen region. The second storage electrode 260 is opposite to the first storage electrode. The second storage electrode 260 and the drain 450 are formed as a single body (or extended). 201122695 In the pixel region, the 'one-norsing electrode 24〇 is formed to overlap with the first common line • 225, and a plurality of second halogen electrodes are extended from the first-alkaline electrode (10) to the halogen region It is parallel to the data line 31S. A plurality of second pixel electrodes 730 are arranged at regular intervals within the halogen region. Further, the second storage electrode (10) is electrically connected to the first pixel electrode through the first contact hole_. Further, a second common line 245 is formed to oppose the first common line 225 and the first storage electrode 225a in the pixel region. A plurality of first common electrodes extend from the second common line 245 toward the halogen region and are parallel to the data and line 315. Further, the first-common 74 is alternately arranged with the second halogen electrode in the halogen region. A second common electrode 235 extends from both sides of the second common line 245 and overlaps with the disk data line 315. The second common electrode prevents leakage caused by light generated by a light source of a backlight unit (not shown) and passing around the data line 315. And, the second common electrode 235 is electrically connected to the first storage electrode island through the -third contact hole (4). Therefore, the common voltage is supplied to the first common electrode 235, the _common electrode, and the second common line 245 through the first common line milk and the first storage electrode 225a. And an organic insulating film 600 is located between the second common electrode 235 and the data line 315. Further, the liquid crystal display device (LCD) of the present invention provides a path P of a liquid crystal material which allows the liquid crystal material to flow around the data line 315 between the pixel regions adjacent to each other. The path p of the liquid crystal material is formed by completely removing the organic insulating film 600 from around the data line, or by forming an organic thin film which is thinner than other regions in a region adjacent to (or surrounding) the data line. The gate pad 21, which extends from the gate line 215, is formed in a pad region of the liquid crystal display 201122695. A gate 塾 contact electrode is in contact with the pad 210. If you contact the pole, please contact the first pole to contact the gate (4). ~第第-contact and 4A diagrams to 8B diagrams are cross-sectional views of a liquid crystal display, and indicate the leg along the "3rd figure", line and position, film transistor array board The cross-sectional structure. H film Please refer to "Fig. 4A" and "Fig. 4B". A first metal film is sprayed through and sprayed onto a base substrate 100 of a transparent insulating material. Then, in a mask process, the -_ step is performed on the deposited metal film. Between the county towns, the light of the material light material _ love &gt; The photoresist is then subjected to exposure and development by using a transmissive region and a photomask, thereby forming a photoresist pattern. Thereafter, the metal film deposited as a mask is used to form a gate 250, a first storage electrode, and a dummy electrode 2 (1). At the same time, a miscellaneous line 215 and a first common line 225 are formed. Gate line 215 is formed in one unit with gate 250. The first common line 225 and the first storage electrode 225a are formed as a single body. The first metal film may be formed from a material selected from the group consisting of indium (Mo) 'titanium (f), light (five), crane (w), copper (〇0, chromium (6), ing (Αυ, its alloy or a combination thereof). As shown in the figure, the metal film is formed in a single layer. However, when the far metal film can be formed by stacking at least two metal layers, "after the gate electrode 250 and the like are formed on the base substrate 1", "The first picture" and "5B" show 'a gate insulating film 2〇〇, an amorphous stone film, and a semiconductor layer of the amorphous stone film (4) (4), and a second metal film sequentially The base substrate formed on the first pole 250 and the first storage electrode 225a and the gate (four) 210 having 12 201122695 100 _ the first and second metal films can be self-twisted (M0), titanium (five), bismuth (five), crane (w), copper; One of the materials selected from the group consisting of aluminum (A1), an alloy thereof, or a combination thereof is ascending/forming. Further, a layer of a transparent conductive material such as indium tin oxide (yttrium yttrium) can be used as the second metal film. Moreover, the second metal film is not in the domain of the early layer, but when needed, the second gold thin film can be formed by stacking at least two metal layers. The second substrate process is performed on the base substrate 1 covered with the second metal film by using the halftone mask and the diffractive film to form the source and the poles 440 and 450 from the second metal film. a second storage electrode 26A, and a data line 315, and a channel layer is formed from the semiconductor layer. Although not shown, a data pad is formed. Due to the use of a half-color s-perimeter or a diffractive mask, the channel The layer pattern Na exists under the data line 315. As shown in Fig. 5B, a storage capacitor is formed between the first storage electrode 225a and the second storage electrode 26A. Thereafter, a protective film is formed on the base substrate. On the entire surface of the 100. Please refer to "6A" to "6C" and "7". An organic insulating film 600 is formed on the base substrate on which the protective film is formed as shown in Fig. 6A. Thereafter, the base substrate on which the organic insulating film is formed is touch-executed - the third mask process is used in the third mask process - having the total transmission region ρι non-transmissive region P2, and semi-transmission The mask of the district is like "Picture 6b". The third mask process is completely removed from the fir. _的全透龙ρι corresponds to 13 201122695 Organic insulating film 600 organic insulating film _ used to expose the protective film, partially remove the organic insulating film 6 corresponding to the semi-transmissive region P3 of the reticle to reduce the scale film The thickness, and the organic insulating film 600 which is turned (i.e., not removed) as opposed to the non-transmissive (four) light of the light has a dielectric constant lower than that of the protective film. The organic insulating film can have an approximate 3. The dielectric constant of 〇~4 。. Preferably, the second common electrode 235 located on the data line 315 and the post-formation (see "the first map") has an approximate value of 3 4~ The dielectric constant of the organic insulating film 6 位于 between the data line and the second common electrode 235 which is formed later may have a thickness of about 3 to 6 μm. Alternatively, the organic insulating film _ may have a different thickness depending on the driving solution of the liquid crystal display (LCD). As the drive frequency becomes higher, the coupling effect generated between the data line 315 and the common pole ("235" of Figure 3) produces a signal delay, wherein the second common electrode is formed in an organic stagnation. Above _. However, the liquid crystal display device (LCD) of the present invention uses a low dielectric constant organic insulating film _ to reduce the parasitic capacitance generated between the data line 315 and the second common electrode condition. Therefore, signal delay can be prevented. More specifically, the parasitic capacitance is inversely proportional to the distance between the data line 315 and the second common electrode 235. Therefore, the larger the thickness of the organic insulating film 600 between the data line 315 and the second common electrode 235, the smaller the parasitic capacitance. As a result, the signal delay caused by the coupling effect between the body line 315 and the second common electrode 235 can be reduced. For example, if the driving frequency of the liquid crystal display device (LCD) is set to 12 Hz (Hz), the thickness of the organic insulating film 201122695 600 between the data line 315 and the second common electrode 235 may be about 2 crystal display devices ( In the range of LCm · (μΠ1), or when the liquid has a driving frequency of 240 Hz, the thickness of the organic π-edge film 600 can be half-time 'organic, % _ due to the 対 Γ 微米 micron In the case of the device (10), the thickness is not set to a fixed value, which varies with the specifications of the electric display device. Moreover, it is necessary to change the second total. In this case, the money is prevented from leaking and the aperture ratio of the pixel is increased. The month &quot; insulating film 600 can be made thinner or thicker depending on the driving frequency. Made from light propylene. 8j electric hanging number 'organic insulating film _ and not limited to 6B ® '', as in the liquid crystal display device (LCD) of the present embodiment, the third mask process is performed to perform the exposure and the county step of the base substrate. _ Completely and partially remove money __. In other words, the 'organic insulating film' is patterned by exposure and development steps. After the tree light and the development step, the etching process is performed as a mask. In the side step, as shown in Fig. 6C, one of the base substrates is exposed to form a halogen region m. A first contact hole 610 is formed to expose a portion of the first-storage pole 260, wherein the second storage electrode 2_ and the pole shape are single. Moreover, the -second contact hole 62 is formed to be exposed (partially). , _, in the same time, the protective film and the gate formed around the data line are still 15 201122695. Also, because the halftone mask or the diffractive reticle is used in the third mask process, the flat/moon is adjacent to the tapered surface formed on both sides of the data line. Similarly, the stack 4: the protective film 5A over the gate electrode 21〇 and the gate insulating film are also sequentially used to form the second contact hole 62〇. However, only the last name of the protective film is formed to form the first contact hole (10) exposing a portion of the second storage electrode 26''. In addition, the third mask process employed in the method of the present invention performs the two-side step by using gases of different oxygen content ratios. Similarly, the edge surfaces of the protective film 5 and the gate insulating film are flat β. Therefore, the second common electrode of the cover data line 315 formed later has a top surface on the organic insulating film 600, and two smooth inclined surfaces reaching the surface of the base substrate. As a result, the breakage caused by the poor step coverage (i.e., the steep pin ladder portion) passing through the boundary between the second common electrode twist and the halogen region can be prevented. Further, as described above, this embodiment forms a thinner organic insulating film _ on the thin crystal and the storage capacitor 11. Thus, the thickness of the organic insulating film formed on the _ transistor and the storage grid is reduced. Further, the organic insulating film _ and the protective film 5GG remaining on the data line 31: and the inter-substrate 200 remaining under the data line 315 have a tapered surface on both sides of the data line 315 due to the use of a half color. The continuity of the data line 315 is improved by the perimeter mask and the diffractive mask. Further, as shown in Fig. 7, a third contact hole (4) is formed to correspond to the first storage electrode 225a through the third mask and the king. The first and third contact holes 620 and 630 can be formed by the engraved protective film to be 2(8). To this end, we can do (4) the infiltration step in the technology. Under the condition of the exposure development process, the organic axis is retained in this 16 201122695. Thus, since the organic insulating film 600 is left, defects in the surface of each of the contact holes are formed in the contact holes. - ^ As shown above, the third mask used in the method of the present embodiment performs two side steps by using different oxygen contents. Therefore, such f-conical inner surface defects are not generated within these contact holes.

睛參閱「第8A圖」及「第8B 有接觸孔的底基板100之卜卜 -’屬、$成於具 ' 之上,第二金屬膜由粗線700表示,並且 笛、後光阻膜770塗覆於第三金屬膜之上。隨後,對光阻膜B及 二金屬膜執行具有曝歧顯影步驟的第四鮮製程,以使得 =之圖案形成為一第一晝素電極、第一共同電極、 彻^電極730、-第二共同電極235、以及一閘極塾接觸電極 第三金屬膜可自鉬(M。)、鈦(Τι)、组㈤、鶴(w)、鋼 (Cu)、鉻(C〇、銘(A1)、其合金或其組合物之一組中選擇之一 n __氧化銦錫(indiumTin〇xide, 氧化銦鋅andium Zinc 0xlde,IZ〇)的透明導電材料層可用作第三 金屬膜。而且,雖然第三金屬膜如圖所示形成一單層中唯 需要時,第三金屬膜可透過堆疊至少兩個金屬層形成。-第,、同電極740、第二共同電極235、以及問極 71〇可由-不透明金屬形成,並且第-晝素電極24。及第』3 =73〇可由透明導電材_成。此雜況下,該鮮製程執行兩 次。 為了自衫色濾光基板去除一黑矩陣或減少黑矩陣之寬度,本 201122695 貫施例之液晶顯不裝置(LCD)之中的第二共同電極235較佳-由 一不透明金屬形成。 相反,第一畫素電極240、第一共同電極74〇、第二晝素電極 730、第二共同電極235 '以及閘極墊接觸電極71〇可由一透明導 電材料形成。此種情況下,—黑矩陣形成於與資料線315相對的 彩色濾光陣列基板之上。 第一晝素電極240通過第一接觸孔6丨〇與第二儲存電極26〇 相連接。第二畫素電極73〇及第一共同電極74〇在底基板觸之 晝素區域中彼此相交替排列且與資料線3丨5相平行。 第二共同電極235形成為覆蓋資料線315。換句話而言,第二 共同電極235形成於覆蓋資料線3!5的有機絕緣膜6〇〇之表面上, 即,負料線315上方的有機絕緣膜6〇〇之水平表面及資料線315 之兩側面的有機絕緣膜6〇〇之傾斜側表面上。結果,第二共同電 極235形成為覆蓋資料線315之下的全部閘極絕緣膜200,以及沉 積於育料線315之上的保護膜5〇〇及有機絕緣膜6〇〇。 如此之一第二共同電極235屏蔽資料線315與第二畫素電極 730之間形成的一電場。同樣,可防止沿資料線315產生的光線洩 漏。 而且’由於有機絕緣膜_由相比較於保護膜500具有更低 介電常數的材料形成,因此可減少第二共同電極235與資料線315 之間產生的寄生電容。因此,可減少透過耦合效應產生的訊號延 遲。 問極塾接觸電極710通過第二接觸孔620與閘極墊210電連 18 201122695 貝料塾區域之中的資料塾接觸電極也與一資 ' 接。雖然圖未示 料墊電連接。 第9圖」至「第11圖」係分別為沿「第3圖」之IV-IV,. V-V及:wv,線的液晶顯示裝置之橫截面結構之橫截面圖。 本實_之輸爾置(LCD)可包含有峨貞型之間隔 物。一種類型之間隔物係為間隙柱狀間隔物,用以維持-彩色;慮 光陣列基板與-_電晶體_基板之間的單元_,並且另一 種類型之間隔物係為接觸柱狀間隔物,用以防止_柱狀間隔物 透過外部按壓之損壞。_柱狀間隔物制於習知技術之液晶顯 示裝置(LCD)。這樣’現在描述本實施例之與間隙柱狀間隔物一 起形成的接觸柱狀間隔物。 第9圖」至「第11圖」表示一接觸柱狀間隔物400。因為 間隔物並不關於其位置,因此_柱狀間隔物(圖未示)及接 觸柱狀間隔物之位置可自由改變。 當液晶顯示裝置(LCD)之顯示區域透過一外力按壓時,本 實施例之液晶顯示裝置(LCD)中採用的接觸柱狀間隔物4〇〇分 散間隙柱狀間隔物的可承受之力。如果液晶顯示裝置(LCD)僅 包含有間隙柱狀間隔物,則間隙柱狀間隔物被破壞或喪失其恢復 力。然而,當液晶顯示裝置(LCD)的顯示區域之一部份透過一 相比較於預定力更大的外力按壓時,接觸柱狀間隔物4〇〇與間隙 柱狀間隔物一起維持液晶顯示裝置(LCD)之單元間隙。 「第9圖」所示之接觸柱狀間隔物4〇〇配設為與儲存電容器 相對應。請參閱「第3圖」及「第9圖」,與第一共同線225形成 19 201122695 為-單-體的第-贿電極225a形成於底基板1〇〇之上。而且, -間極絕緣臈200、-保護膜鄕、_有機絕緣膜_、以及—第 二儲存電極260順次形成於第-儲存電極225a之上。 另方面’-黑矩陣35〇及一覆蓋層371順次形成於一盘底For the eye, refer to "8A" and "8BB of the bottom substrate 100 with contact holes", and the second metal film is indicated by the thick line 700, and the flute and the rear photoresist film. 770 is applied on the third metal film. Subsequently, a fourth fresh process having an exposure development step is performed on the photoresist film B and the two metal film, so that the pattern of = is formed as a first halogen electrode, first The common electrode, the electrode 730, the second common electrode 235, and the third metal film of the gate contact electrode may be from molybdenum (M.), titanium (Τι), group (five), crane (w), steel (Cu a transparent conductive material selected from the group consisting of chromium (C〇, Ming (A1), alloys or combinations thereof) n __ indium tin oxide (indium Tin 〇 xide, indium zinc oxide andium Zinc 0xlde, IZ 〇) The layer can be used as the third metal film. Moreover, although the third metal film is formed as needed in a single layer as shown, the third metal film can be formed by stacking at least two metal layers. -, the same electrode 740 The second common electrode 235 and the gate electrode 71 are formed of an opaque metal, and the first-deuterium electrode 24 and the third layer = 73 〇 It can be made of a transparent conductive material. Under this circumstance, the fresh process is performed twice. In order to remove a black matrix from the shirt color filter substrate or reduce the width of the black matrix, the liquid crystal display device (LCD) of this 201122695 embodiment is implemented. The second common electrode 235 is preferably formed of an opaque metal. In contrast, the first pixel electrode 240, the first common electrode 74A, the second halogen electrode 730, the second common electrode 235', and the gate pad The contact electrode 71A may be formed of a transparent conductive material. In this case, a black matrix is formed on the color filter array substrate opposite to the data line 315. The first halogen electrode 240 passes through the first contact hole 6 The second storage electrode 26 is connected to each other. The second pixel electrode 73 and the first common electrode 74 are alternately arranged with each other in the contact region of the base substrate and are parallel to the data line 3丨5. 235 is formed to cover the data line 315. In other words, the second common electrode 235 is formed on the surface of the organic insulating film 6A covering the data line 3!5, that is, the organic insulating film 6 above the negative material line 315. Horizontal surface and data On both sides of the organic insulating film 6 on the inclined side surface of the 315. As a result, the second common electrode 235 is formed to cover all of the gate insulating film 200 under the data line 315, and deposited on the growth line 315. The protective film 5〇〇 and the organic insulating film 6〇〇. Such a second common electrode 235 shields an electric field formed between the data line 315 and the second pixel electrode 730. Similarly, the light generated along the data line 315 can be prevented. Further, 'because the organic insulating film_ is formed of a material having a lower dielectric constant than the protective film 500, the parasitic capacitance generated between the second common electrode 235 and the data line 315 can be reduced. Therefore, the signal delay caused by the coupling effect can be reduced. The pole contact electrode 710 is electrically connected to the gate pad 210 through the second contact hole 620. 18 201122695 The data in the beryllium area is also connected to the contact electrode. Although the figure does not show the electrical connection. Fig. 9 to Fig. 11 are cross-sectional views showing the cross-sectional structures of the liquid crystal display devices of the IV-IV, V-V and :wv lines along the "Fig. 3", respectively. The actual liquid crystal display (LCD) may contain a spacer type of spacer. One type of spacer is a gap column spacer for maintaining a color; a cell _ between the light-array substrate and the --transistor substrate, and another type of spacer is a contact column spacer To prevent damage to the columnar spacer through external compression. The column spacer is made of a conventional liquid crystal display device (LCD). Thus, the contact column spacer formed in the present embodiment together with the gap column spacers will now be described. Fig. 9 to Fig. 11 show a contact column spacer 400. Since the spacer is not related to its position, the position of the columnar spacer (not shown) and the contact column spacer can be freely changed. When the display area of the liquid crystal display device (LCD) is pressed by an external force, the contact column spacers 4 employed in the liquid crystal display device (LCD) of the present embodiment divide the allowable force of the gap column spacers. If the liquid crystal display device (LCD) contains only the gap column spacer, the gap column spacer is destroyed or its restoring force is lost. However, when a portion of the display region of the liquid crystal display device (LCD) is pressed by an external force greater than a predetermined force, the contact column spacer 4 维持 maintains the liquid crystal display device together with the spacer column spacer ( LCD) cell gap. The contact column spacer 4 shown in Fig. 9 is arranged to correspond to the storage capacitor. Please refer to "Fig. 3" and "Fig. 9", and form a first common line 225. 19 201122695 A single-body first-brake electrode 225a is formed on the base substrate 1A. Further, an inter-electrode insulating layer 200, a protective film 鄕, an organic insulating film _, and a second storage electrode 260 are sequentially formed over the first storage electrode 225a. Another aspect'-black matrix 35〇 and a cover layer 371 are sequentially formed on the bottom of a disk

基板1〇0相對的彩色遽光陣列基板的頂基板300之上。而且,I 接觸柱狀間隔物400與底基板刚之上的第二儲存電極260相對 應’形成於覆蓋層371之上。 此外’-溝槽G與接觸柱狀間隔物·相對形成於有機絕緣 膜600之上。溝槽G可透過完全或部份去除第二儲存電極細之 上的有機絕緣膜600形成。 請參閱「第3圖」、「第10圖」及「第η圖」,另一接觸柱狀 間隔物400與閘極線215 (「第1〇 圃相對形成於頂基板300之 覆盍牛之上,並且再一接觸柱狀間隔物4〇〇與資料線315 η圖」)相對形成於頂基板之覆蓋件371之上、’ :二:冓槽™去除一 600,與接觸柱狀間隔物400相對形成於間極線2 保護膜500透過另一溝槽g暴露。或者,二、 化,, 有機絕緣膜_之圖案形成,其中有 私G可透過瓜成The substrate 1〇0 is opposite to the top substrate 300 of the color light-emitting array substrate. Moreover, the I contact column spacer 400 is formed on the cover layer 371 corresponding to the second storage electrode 260 just above the base substrate. Further, the '-groove G and the contact column spacer are formed on the organic insulating film 600. The trench G can be formed by completely or partially removing the organic insulating film 600 on the thin portion of the second storage electrode. Please refer to "3", "10th" and "Nth", and contact column spacer 400 and gate line 215 ("The first 〇圃 is formed on the top substrate 300 and covered with yak" Upper, and further contact with the column spacer 4 and the data line 315 η"" are formed on the cover 371 of the top substrate, ': 2: the trench TM is removed by 600, and the contact column spacer 400 is formed on the interpolar line 2 and the protective film 500 is exposed through the other trench g. Or, a second, chemical, organic insulating film _ pattern formation, in which private G can be through the melon

之中的厚度相比較於鄰近另-溝膜6〇0在另一溝槽G W邮他區域巾之厚度更小。 類似地,再一溝槽G與再一接觸杈肤 關」),透過去除保護膜之上的有^隔物·相對(「第 線315之上。隨後,第二共同電極H緣膜_形成於資料 上 。詳細而言,第二共同電極235形成^有機絕緣膜帽之 ;有機絕緣膜600、再一溝 20 201122695 槽G之内側表面、以及暴露的保護膜500之上。或者,有機絕緣 膜_可,留於再—溝槽G之中,該再—槽槽G之中的有機絕緣 膜600之厚度相比較於相鄰再―溝糾的其他區域中有機絕緣膜 _之厚奴小。骑辭色縣罩鎌射群料義區實現此 結果。 —如果按璧具有接觸柱狀間隔物4〇〇及間隙柱狀間隔物的液晶 顯不裝置之齡(1域之—部份,_柱狀間隔物轉單元間隙直 至接觸柱朗_ 與溝槽G之絲面相鞠。#接觸柱狀間 隔物400與槽G之底表面相接觸時,間隙柱狀間隔物與接觸柱狀 間隔物鱗持單元_。換句話而言,本實施例之液晶顯 示裝置(LCD)根據顯示區域之—部份的按壓力之強度,允許僅 間隙柱狀間隔物或全部間隙柱狀間隔物及接觸柱狀間隔物維持單 元間隙。 第12圖」係為沿「第3圖」之νπ_νπ,線的液晶材料之路 徑的橫截面結構之橫截面圖。 請參閱「第3圖」及「第12圖」,有機絕緣膜_、保護膜 500、以及閘極絕賴自本實施例之液關示裝置(lcd)全 部去除。相反,有機絕緣膜600形成於位於晝素區域之間的非顯 示區域之上。同樣,一液晶材料放置於每一晝素區域之中。因此, 需要所有晝素區域填充有相同高度的液晶材料。 換句話而言,雖然液晶材料過填充或欠填充於一些畫素區域 中’由於有機絕緣膜600形成於資料線315之上,因此液晶材料 不在全部畫素區域之巾均句分佈。如果液晶材料在晝素區域中填 21 201122695 ΓίΙΙΓ度(或不同高度),則產生-例如斑點之缺陷。此 過填充液曰好於晝素區域中的液晶材料破壞時,可損傷相鄰於 本所有晝素區域中的液晶材料之填充程度(高度), 的_::=:=在相鄰畫素區域之間 間流動。 允存液阳材料在相鄰之畫素區域之 伴護=所=雜絕緣_、通道_32G、資料線315、 保桃5〇〇、有機絕緣膜6〇〇 底基板100之上。透過八心Λ第〜同電極235順次形成於 機鴨膜600 4過王科部份去除與資料線仍相重疊之有 機、、,邑緣膜_ ’可形成液晶材料之路徑Ρ。 =材=之路# ρ形輪蝴料線仍之寬 二::㈣徑Ρ後可選擇性地調節。而且,至 =日材料之路徑ρ可形成於每—晝素區域中。 第13Α圖|及「笙π 線的=顯购之横截面結構=面°圖第3圖」之νπι·νιπ’ W二3=1」=第7圖」,本實施例圍繞資料線 通道声圖崇物 光陣列基板之結構如圖所示。 絕緣膜之I。^崎315順次形成於輸1GG之開極 於資料線315之上。而日及有機絕緣膜_順次形成 600之上用以覆蓋資;第235形成於有機絕緣膜 5。換句邊而言,第二共同電極235形 22 201122695 成為覆蓋有機絕緣膜_、保護膜5〇〇、以及閘極絕緣膜2⑻且具 • 有到達底基板100的傾斜表面。 八 如此之一第一共同電極235由不透明金屬形成。這樣,第二 共同電極235可自錮(M。)、鈦(Ti)、组㈤、鶴(W)、銅(〇〇、 絡(Cr) |呂(A1)、其合金或其組合物之一組中選擇之一種材料 形成。 而且’與第二共同電極235相對,形成於彩色遽光陣列基板 之上的黑矩陣350還可減少為相比較於習知技術更小之寬度。黑 2陣350形成之厚度範圍位於第二共同電極235與資料線315之 見度之間。舉例而言,黑矩陣350可具有大約6〜16微米(μπ〇 之範圍内的寬度。 、,此種方式下,上述黑矩陣350減少之寬度允許一紅色(R)遽 光層303a、-綠色⑹遽光層3〇3卜以及一藍色⑻遽光層(圖 未不)形成為具有較大尺寸(即,一擴大之尺寸)。因此,可提高 液晶顯示裝置(LCD)之孔徑比。 一第13B圖」係為已完全去除黑矩陣的一彩色濾光陣列基板 之不意圖。此種情況下,薄膜電晶體陣列基板之上的第二共同電 極235用作黑矩陣。由於黑矩陣自液晶顯示裝置(即,彩色遽光 車歹J基板)上去除,因此,「第13B圖」所示之液晶顯示裝置(LCD) 相比較於「第13A圖」之液晶顯示裝置具有更大之孔徑比。 第14A圖」及「第14B圖」係為解釋將習知技術之钱刻方 法應用於本實施例之接觸孔製造過輯產生問題之示意圖。 如第14A圖」及「第14B圖」所示,本實施例之薄膜電晶 23 201122695 含有,塾210,間極塾210形成於底基板薦 搞執· &amp; °之卜薄膜電晶體陣列基板更包含有歡形成於間 \ ΐ的間極絕緣膜細、保護膜别、以及有機絕緣膜_。 :’、、了暴路閘極塾21〇,可使用一 f知技術之乾侧製程。此種 下’在曝光及顯影製程之後,有機絕緣膜600保留於該孔 之内。因此’由於保留的有機絕緣議,孔之内側表 如「第14A同 &amp; 士办 圖」所不,㈣於該孔之_有機絕緣膜600在 膜6〇0之-底部份之内形成-根切結構。換句話而言, Ρ白1盖產生於有機絕緣膜600、保護膜500、以及閘極絕緣膜 200之中。 如 金屬膜470可具有一堆疊有 齡鹿/14Β圖」所示,產生於孔内的台階覆蓋在-稍後形成 :金屬膜470之中產生斷開。實際上,在本實施例之中,透過在 孔之内側壁上喊的纟隨蓋,形成 墊接觸電極之中可產生—電氣斷開 至少兩個金屬層之結構。 為2解决觸題’胃械接觸孔時,本實施例改變一姓刻氣 體之含量且執行兩次餘刻製程。 第15Α圖」至「第15C圖」係為轉本實施例之一接觸孔 製造期間的i刻製程之示意圖。雜刻製程可完整應用於「第 a圖」至「第7圖」所示之第三光罩製程。 如「第15A圖」至「第ηγ _ ^ _ 不5(:圖」所示,閘極墊210形成於底 基板100之上。其後,閘極絕续肢 a、緣膜2〇〇、保護膜5〇〇、以及有機絕 緣膜600順次形成於閘極塾21〇之上。 24 201122695 ,在執仃第一姓刻製程之前’有機絕緣膜600透過-光罩製程 喊職,形成圖案的有機絕緣麟在第—侧製程之中用作— 光罩。第一钱刻製程中使用的六氟化硫:氧氣⑽:〇2) 體的流量比可為大約跡1:3.〇之範圍内。對於六氣化硫:= ⑽氣體,較佳具有—大約1:25之流量比。舉例而言, 如果六鼠化硫(SF6)對應於侧,則氧氣⑽可為大約。 10000〜12000之範圍内。 ㈣^後’ Γ化硫:氧氣(舰⑻働顧的流量比變化且 靖程。此時,六嶋:氧氣( — Μ 炉.氧# =可為Μ 1:2·4〜^之範_。較佳地,六氟化 瓜.乳乳(SF6..02)設置為大約1:2 5之流量比。 氣體言’如果在第—及第&quot;_製程制增加氧氣(〇2) 二笛_ 3里接觸孔之巾㈣側表面之粗糙度可改善。同樣,執 ^第二侧的時間概較於執行第—_之時_或 钭二?二圖」所示,f•墊210的接觸孔之第-及第二傾 2及82形成為一平滑之表面。這樣,台階覆蓋不產生於 有機絶緣膜_、賴膜·、以及閘極絕緣膜·之中。 之上,但卜是:開470如「第15C圖」所示形成於底基板1〇° 之中。胁閘極塾210的接觸孔之内的金屬膜470 接觸⑽本實施例之第三光轉程執行兩蝴製程。結果, 接觸孔之内側表面之上的台階覆蓋被消除。 25 201122695 :第16圖」至「第】8圖」係為沿「第3圖」之随,及咖工, 線的薄膜電晶體陣列基板之橫截面圖,並且解釋根據本發明之第 二至第四實施例之液晶顯示裝置之製造方法。 雖然透過第三至第四實闕之方法製造的_電晶體陣列基 與透過第-實施例之方法製造的薄膜電晶體陣 不相同之結構,但是第二至第四實_之製造綠可按照^ 2圖」至「第8B圖」所示之第一實施例之製造方法相同的方式 「行。因此’將解釋第二至第四實施例之方法中與「第从圖」至The thickness of the towel is smaller than that of the adjacent groove film 6〇0 in the other groove G W. Similarly, another groove G and another contact with the skin") are removed by removing the spacers on the protective film ("the first line 315. Then, the second common electrode H film _ formation" In detail, the second common electrode 235 forms an organic insulating film cap; the organic insulating film 600, the inner surface of the groove 20 201122695 groove G, and the exposed protective film 500. Or, organic insulation The film _ can be left in the re-groove G, and the thickness of the organic insulating film 600 in the re-groove G is compared with the thickness of the organic insulating film in the other regions of the adjacent re-groove This result is achieved by riding the resounding county cover smashing group. - If the 璧 has the contact with the column spacer 4〇〇 and the gap column spacer, the age of the liquid crystal display device (1 field - part, _ The column spacer turns to the cell gap until the contact column _ is opposite to the surface of the groove G. # Contact column spacer 400 is in contact with the bottom surface of the groove G, the gap column spacer and the contact column spacer scale Holding unit_. In other words, the liquid crystal display device (LCD) of the present embodiment is displayed according to The intensity of the pressing force of the portion of the domain allows the gap between the columnar spacers or the entire gap column spacers and the contact column spacers to maintain the cell gap. Figure 12 is the νπ_νπ along the "Fig. 3". Cross-sectional view of the cross-sectional structure of the path of the liquid crystal material of the line. Please refer to "Fig. 3" and "Fig. 12", the organic insulating film _, the protective film 500, and the gate are absolutely closed from the liquid of this embodiment. The display device (lcd) is completely removed. On the contrary, the organic insulating film 600 is formed on the non-display region between the pixel regions. Similarly, a liquid crystal material is placed in each of the halogen regions. Therefore, all the halogens are required. The region is filled with the liquid crystal material of the same height. In other words, although the liquid crystal material is overfilled or underfilled in some pixel regions, since the organic insulating film 600 is formed on the data line 315, the liquid crystal material is not in all the pixels. The area of the towel is evenly distributed. If the liquid crystal material fills 21 201122695 ΓίΙΙΓ (or different height) in the halogen region, it will produce a defect such as a spot. This overfill liquid is better than the halogen region. When the liquid crystal material is destroyed, it can damage the filling degree (height) of the liquid crystal material adjacent to all the halogen regions, and _::=:= flows between adjacent pixel regions. In the neighboring pixel region, the following is the same as the following: = = impurity insulation _, channel _32G, data line 315, hibiscus 5 〇〇, organic insulating film 6 〇〇 bottom substrate 100. The electrode 235 is sequentially formed on the machine duck film 600 4 to remove the organic material that overlaps with the data line, and the edge film _ 'can form a path of liquid crystal material Ρ. = material = road # ρ-shaped wheel butterfly The width of the material line is still two:: (4) The diameter of the material can be selectively adjusted. Moreover, the path ρ of the material to the day can be formed in each of the halogen regions. Figure 13 and the "横截π line = the cross-sectional structure of the purchase = the surface of the figure 3" νπι·νιπ' W 2 3 = 1" = Fig. 7", this embodiment surrounds the data line channel sound The structure of the Figure Chongguang array substrate is shown in the figure. I of the insulating film. ^Saki 315 is formed in turn on the input line 1 365 above the data line 315. The day and the organic insulating film are sequentially formed over 600 to cover the capital; the second layer is formed on the organic insulating film 5. In other words, the second common electrode 235 shape 22 201122695 becomes an overlying organic insulating film _, a protective film 5 〇〇, and a gate insulating film 2 (8) and has an inclined surface reaching the base substrate 100. Eight such a first common electrode 235 is formed of an opaque metal. Thus, the second common electrode 235 can be self-twisted (M.), titanium (Ti), group (five), crane (W), copper (ruthenium, complex (Cr) | Lu (A1), alloys thereof, or combinations thereof A material selected from the group is formed. And 'as opposed to the second common electrode 235, the black matrix 350 formed on the color light-emitting array substrate can be reduced to a smaller width than the conventional technique. The thickness range formed by 350 is between the visibility of the second common electrode 235 and the data line 315. For example, the black matrix 350 may have a width in the range of about 6 to 16 micrometers (μπ〇), in this manner The reduced width of the black matrix 350 allows a red (R) phosphor layer 303a, a green (6) phosphor layer 3〇3b, and a blue (8) phosphor layer (not shown) to be formed to have a larger size (ie, , an enlarged size). Therefore, the aperture ratio of the liquid crystal display device (LCD) can be improved. A 13B diagram is a schematic of a color filter array substrate in which the black matrix has been completely removed. In this case, the film The second common electrode 235 over the transistor array substrate serves as a black matrix. The liquid crystal display device (LCD) shown in the "Fig. 13B" has a liquid crystal display device of the "Fig. 13A" as compared with the liquid crystal display device (i.e., the color illuminating rut J substrate). The larger aperture ratio. Fig. 14A and Fig. 14B are diagrams for explaining the problem of applying the conventional method of applying the money engraving method to the contact hole fabrication of the present embodiment. As shown in Fig. 14B, the thin film electro-crystal 23 201122695 of the present embodiment contains 塾210, and the inter-electrode 塾210 is formed on the bottom substrate, and the thin-film transistor array substrate further comprises a nucleus formed in the middle. \ ΐ 间 间 绝缘 绝缘 、 、 保护 保护 保护 保护 保护 保护 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机After the development process, the organic insulating film 600 remains in the hole. Therefore, due to the retained organic insulation, the inner side of the hole is not in the "14A with &amp; the map", and (4) the organic insulation of the hole The film 600 forms a root-cut structure within the bottom portion of the film 6〇0 In other words, the white cover 1 is produced in the organic insulating film 600, the protective film 500, and the gate insulating film 200. For example, the metal film 470 may have a stacked age-old deer/14Β image, which is generated in the hole. The inner step is covered - later formed: a break occurs in the metal film 470. In fact, in the present embodiment, the squeaking of the squeegee on the inner side wall of the hole can be generated by forming a pad contact electrode. - Electrically disconnecting the structure of at least two metal layers. In the case of solving the problem of 'gastric contact hole', the present embodiment changes the content of a surname gas and performs two remnant processes. 15th to 15C Figure is a schematic diagram of the process of the contact hole during the manufacture of one of the embodiments of the present embodiment. The engraving process can be applied to the third mask process shown in "A" to "Fig. 7". As shown in "Fig. 15A" to "Nth γ _ ^ _ not 5 (: figure), the gate pad 210 is formed on the base substrate 100. Thereafter, the gate has a permanent limb a, a film 2, The protective film 5 〇〇 and the organic insulating film 600 are sequentially formed on the gate 塾 21 。. 24 201122695 , before the execution of the first surname process, the organic insulating film 600 is shouted through the mask process to form a pattern. The organic insulating lining is used as a mask in the first-side process. The sulphur hexafluoride used in the first process: oxygen (10): 〇 2) The flow ratio of the body can be approximately 1:3. Inside. For a six gasified sulfur: = (10) gas, it is preferred to have a flow ratio of about 1:25. For example, if six mouse sulphur (SF6) corresponds to the side, oxygen (10) can be about. Within the range of 10000~12000. (4) ^ After ' Γ 硫 sulfur: oxygen (ship (8) care of the flow ratio change and Jing Cheng. At this time, six 嶋: oxygen (- 炉 furnace. Oxygen # = can be Μ 1:2 · 4 ~ ^ _ _. Jiadi, hexafluoride. Breast milk (SF6..02) is set to a flow ratio of about 1:2 5. Gas says 'If you increase oxygen in the first-and-th-process system(〇2) 二笛_ The roughness of the side surface of the contact hole (4) of the contact hole can be improved. Similarly, the time of the second side of the contact hole is compared with the time of the execution of the first - _ or 钭 2 - 2 picture, the contact of the f• pad 210 The first and second dips 2 and 82 of the hole are formed as a smooth surface. Thus, the step coverage is not generated in the organic insulating film, the film, and the gate insulating film. The opening 470 is formed in the base substrate 1? as shown in Fig. 15C. The metal film 470 in the contact hole of the gate electrode 210 contacts (10) the third light path of the embodiment performs the two-mask process. As a result, the step coverage on the inner side surface of the contact hole is eliminated. 25 201122695: Fig. 16 to "8th picture" is a thin film transistor array along the "Fig. 3", and the coffee machine, the line. A cross-sectional view of a substrate, and explaining a method of manufacturing the liquid crystal display device according to the second to fourth embodiments of the present invention. Although the transistor array substrate and the pass-through method are manufactured by the third to fourth embodiments The thin film transistor array manufactured by the method of the example has a different structure, but the second to fourth real green can be manufactured in the same manner as the manufacturing method of the first embodiment shown in FIG. 2 to FIG. 8B. "Line. Therefore, it will explain the method of the second to fourth embodiments and the "from the figure" to

If圖」所示之結構相區別的部份。而且,第二至第四實施例 之技的相同標號表示與「第4A圖」至「第8B圖」所示 7G件。 第-至第四實施例之方法允許修改非顯示區域之中的结 區域之上形成有根據第-實施例之方嶋 請參閱「第3圖」及「第16圖第一 覆蓋有一的區域中形成的有機 線315之上形成的有機絕緣膜_不同之厚度。 更具體“ ’第二實施例之方法允許_電 與間極塾-之區域中的有機一 二圖未不,有機絕緣膜圖案按照與閘極塾21。及 越電4之_巾_之方式_成於:#畴 話而言,覆蓋有資料塾及閑極娜的非顯示區二 ^之圖案相比較於與資料細相重*的有機絕緣膜to具 26 201122695 有更小之厚度。具有較小厚度的有機絕緣膜之圖案可 '三光罩製程實現,第三光罩製程中使用半色調光罩及繞射之第 一用以形成這些接觸孔。 凡耵尤罩之 在此種方式下,墊區中的麵絕緣膜嶋之_降低之 來自於有機縣膜6_味於保制及又 厚之事實。如果錢絕賴_a之圖餘顯示及非_區形成且 有均勾之厚度,會產生外部驅動積體電路的終端之接觸缺陷。 因此’在墊區域中具有降低有機絕緣膜的液晶顯示褒置 (LCD)使得料與外部驅動频f路的終端電接觸。 第三實施例之方法獲得一薄膜電晶體陣列基板之結構,如「第 Π圖」所示’該結構中有機絕緣膜6〇〇a之圖案完全自閘極塾區域 及資料塾區域去除。這樣,當閘極墊接觸電極71〇形成於保護膜 500之上時’閘極墊接觸電極71〇與閑極塾21〇電連接。類似地, 當-資料墊接觸電極(圖未示)形成於保護膜之上時,資料 墊接觸電極(圖未示)與資料墊(圖未示)電連接。 第四實施例之方法獲得一薄膜電晶體陣列基板之結構,該結 構中有機絕緣膜600a之_、保護膜5〇〇、以及閘極絕緣膜2〇〇 自閘極墊區域完全去除。類似地,有機絕緣膜6〇〇a之圖案及保護 膜500完全自資料墊區域去除。此種情況下,保留資料墊之下的 閘極絕緣膜200。而且,閘極墊之間與資料塾之間的所有有機絕緣 膜600a之圖案、保護膜5〇〇、以及閘極絕緣膜2〇〇被去除,以使 得底基板100之表面暴露於資料墊之間與閘極墊之間。 • 結果,閘極墊接觸電極710直接形成於閘極墊210及底基板 27 201122695 100之上。而且,閘極墊接觸電極710完全覆蓋閘極墊21()。. 此種方式下,本發明之實施例之方法可在液晶顯示裝置 (LCD)之墊區中形成不同之結構,而不需要一另外的光罩製程。 雖然本發明之實施例以示例性之實施例揭露如上,然而本領 域之技術人員應當意識到在不脫離本發明所附之申請專利範圍所 揭示之本發明之精神和範圍的情況下,所作之更動與潤飾,均屬 本發明之專利保護範圍之内。特別是可在本說明書、圖式部份及 所附之申睛專利範圍中進行構成部份與/或組合方式的不同變化 及修改。除了構成部份與/或組合方式的變化及修改外,本領域 之技術人員也應當意識到構成部份與/或組合方式的交替使用。 【圖式簡單說明】 第1圖係為習知技術之平面切換(IPS)模式之液晶顯示裝置 之中的一晝素結構之示意圖; 第2圖係為沿第i圖之u,線之畫素結構之橫截面圖; 第3圖係為本發明第一實施例之液晶顯示裝置之一畫素區域 之示意圖; 第4A圖、第5A圖、第6A圖至第6C圖、第8A圖、以及第 犯圖係為沿第3圖之IWI,線及1腿,線之薄膜電晶體陣列基板之 心、戴面圖’並賴以解釋本發明第—實施例之液晶顯示裝置之製 方/会, 第4B圖係為第4A圖之薄膜電晶體陣列基板之平面結構之示 意圖; 〃 28 201122695 第5B圖係為第5A圖之薄膜電晶體陣列基板之平面結構之示 意圖; 第7圖係為第6C圖之薄膜電晶體_基板之平面結構之示 意圖; 第9圖至第11圖係分別為沿第3圖之wjv'v—v,及以, 線的液as顯示裝置之橫截面結構之橫截面圖; 第12圖係為沿第3圖之νπ·νπ,線的液晶材料路徑之橫戴面 結構之橫截面圖; 第13Α圖及第13Β圖係為沿第3圖之vjmvm,線的液晶顯 示裝置之橫戴面結構之橫截面圖; 第14A圖及第14B圖係為解釋將習知技術之蝕刻方法應用於 本實施例之接觸孔製造過程所產生問題之示意圖; 第15A圖至第15C圖係為在本實施例之一接觸孔製造期間, 解釋一蝕刻製程之示意圖;以及 第丨6圖至第18圖係為沿第3圖之π-ll,及πι-m,線的薄犋電 曰曰體陣列基板之橫截面圖,並且解釋根據本發明之第二至第四實 施例之液裝置之製紗法。 、 【主要7C件符銳說明】 1 閘極線 閘極 第一共同線 la 3 201122695 3a 第一共同電極 5 資料線 6 第一儲存電極 7 第二儲存電極 7a 畫素電極 10 底基板 12 閘極絕緣膜 13 第二共同線 13a 第二共同電極 13b 第三共同電極 19 保護膜 20 頂基板 21 黑矩陣 25a 紅色濾光層 25b 綠色滤光層 29 覆蓋層 100 底基板 200 閘極絕緣膜 210 閘極塾 215 閘極線 225 第一共同線 30 201122695 225a 第一儲存電極 235 第二共同電極 240 第一晝素電極 245 第二共同線 250 閘極 260 第二儲存電極 300 頂基板 303a 紅色濾光層 303b 綠色濾光層 315 資料線 320 通道層圖案 340 通道層 350 黑矩陣 371 覆蓋層 400 接觸柱狀間隔物 440 源極 450 〉及極 470 金屬膜 500 保護膜 600 、 600a 有機絕緣膜 610 第一接觸孔 31 201122695 620 第二接觸孔 630 第三接觸孔 700 第三金屬膜 710 閘極墊接觸電極 730 第二晝素電極 740 第一共同電極 770 光阻膜 800 光罩 TFT 薄膜電晶體 G 溝槽 R 頂基板 P 路徑 P1 全透射區 P2 非透射區 P3 半透射區 L1 寬度 S1 第一傾斜表面 S2 第二傾斜表面 32The part of the structure shown in the If figure. Further, the same reference numerals as in the second to fourth embodiments denote the 7G pieces shown in "Fig. 4A" to "8B". The method of the first to fourth embodiments allows the modification of the junction region among the non-display areas to be formed in the region according to the first embodiment, which is referred to as "the third diagram" and "the first coverage of the 16th diagram". The organic insulating film formed over the formed organic line 315 has a different thickness. More specifically, 'the method of the second embodiment allows an organic one or two in the region of the inter-electrode and the inter-electrode ,-, the organic insulating film pattern Follow the 塾21 with the gate. And the way of the electric 4 4 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ With 26 201122695 has a smaller thickness. The pattern of the organic insulating film having a small thickness can be realized by a three-mask process in which a halftone mask and a first diffraction are used to form the contact holes. In this way, the surface insulation film in the pad area is reduced from the fact that the organic film 6_ is protected and thick. If the money depends on the _a map and the non-Z area is formed and the thickness of the hook is formed, the contact defect of the terminal of the external drive integrated circuit is generated. Therefore, a liquid crystal display (LCD) having a reduced organic insulating film in the pad region causes the material to be in electrical contact with the terminal of the external driving frequency. The method of the third embodiment obtains the structure of a thin film transistor array substrate as shown in the "Fig. 1". The pattern of the organic insulating film 6〇〇a in the structure is completely removed from the gate region and the data region. Thus, when the gate pad contact electrode 71 is formed over the protective film 500, the gate pad contact electrode 71 is electrically connected to the idle electrode 21'. Similarly, when a data pad contact electrode (not shown) is formed over the protective film, the data pad contact electrode (not shown) is electrically connected to a data pad (not shown). The method of the fourth embodiment obtains a structure of a thin film transistor array substrate in which the organic insulating film 600a, the protective film 5, and the gate insulating film 2 are completely removed from the gate pad region. Similarly, the pattern of the organic insulating film 6〇〇a and the protective film 500 are completely removed from the material pad region. In this case, the gate insulating film 200 under the data pad is retained. Moreover, the pattern of all the organic insulating films 600a between the gate pads and the data pads, the protective film 5A, and the gate insulating film 2 are removed, so that the surface of the base substrate 100 is exposed to the data pad. Between the gate and the pad. • As a result, the gate pad contact electrode 710 is formed directly over the gate pad 210 and the base substrate 27 201122695 100. Moreover, the gate pad contact electrode 710 completely covers the gate pad 21(). In this manner, the method of the embodiment of the present invention can form different structures in the pad region of a liquid crystal display device (LCD) without requiring an additional mask process. While the embodiments of the present invention have been described above by way of exemplary embodiments, those skilled in the art will recognize that the present invention can be practiced without departing from the spirit and scope of the invention disclosed in the appended claims. Modifications and retouchings are within the scope of patent protection of the present invention. In particular, variations and modifications of the components and/or combinations may be made in the scope of the specification, the drawings and the accompanying claims. In addition to variations and modifications in the component parts and/or combinations thereof, those skilled in the art should also be aware of the alternate use of the components and/or combinations. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram of a unitary structure in a liquid crystal display device of a planar switching (IPS) mode of the prior art; FIG. 2 is a drawing along line u of the i-th figure A cross-sectional view of a prime structure; FIG. 3 is a schematic view showing a pixel region of a liquid crystal display device according to a first embodiment of the present invention; FIG. 4A, FIG. 5A, FIG. 6A to FIG. 6C, and FIG. And the first line of the invention is the IWI of the 3rd line, the line and the 1 leg, the core of the thin film transistor array substrate, and the wearing surface 'and to explain the prescription of the liquid crystal display device of the first embodiment of the present invention/ 4B is a schematic view showing the planar structure of the thin film transistor array substrate of FIG. 4A; 〃 28 201122695 FIG. 5B is a schematic diagram showing the planar structure of the thin film transistor array substrate of FIG. 5A; Fig. 6C is a schematic view showing the planar structure of the thin film transistor_substrate; Fig. 9 to Fig. 11 are the cross-sectional structures of the liquid as display device along the line wjv'v-v of Fig. 3 and Fig. 3, respectively. Cross-sectional view; Figure 12 is the cross-section of the liquid crystal material along the line νπ·νπ in Figure 3 Cross-sectional view of the wearing structure; Figure 13 and Figure 13 are cross-sectional views of the cross-sectional structure of the liquid crystal display device along the line vjmvm of Figure 3; Figures 14A and 14B are for explanation The etching method of the prior art is applied to the schematic problem of the contact hole manufacturing process of the present embodiment; FIGS. 15A to 15C are schematic views explaining an etching process during the manufacture of the contact hole of the embodiment; FIGS. 6 to 18 are cross-sectional views of the thin 犋-electrode array substrate along the line π-ll and πι-m of FIG. 3, and explain the second to fourth according to the present invention. The yarn making method of the liquid device of the embodiment. [Major 7C piece Furui description] 1 Gate line gate first common line la 3 201122695 3a First common electrode 5 Data line 6 First storage electrode 7 Second storage electrode 7a Picture element electrode 10 Base board 12 Gate Insulating film 13 second common line 13a second common electrode 13b third common electrode 19 protective film 20 top substrate 21 black matrix 25a red filter layer 25b green filter layer 29 cover layer 100 base substrate 200 gate insulating film 210 gate塾215 gate line 225 first common line 30 201122695 225a first storage electrode 235 second common electrode 240 first halogen electrode 245 second common line 250 gate 260 second storage electrode 300 top substrate 303a red filter layer 303b Green filter layer 315 data line 320 channel layer pattern 340 channel layer 350 black matrix 371 cover layer 400 contact column spacer 440 source 450 〉 and pole 470 metal film 500 protective film 600, 600a organic insulating film 610 first contact hole 31 201122695 620 second contact hole 630 third contact hole 700 third metal film 710 gate pad contact electrode 730 second Prime electrode 740 first common electrode 770 photoresist film 800 photomask TFT thin film transistor G trench R top substrate P path P1 full transmission region P2 non-transmissive region P3 semi-transmissive region L1 width S1 first inclined surface S2 second inclined surface 32

Claims (1)

201122695 七、申請專利範圍: 1. 一種薄膜電晶體陣列基板,係包含有: 一基板; 一閘極線及一資料線’係彼此相交叉排列用以在該基板之 上疋義一晝素區域; 一開關元件,係配設於該閘極線與該資料線之一交叉處; 複數個第二晝素電極及複數個第一共同電極,係相交替排列於 該基板之上形成的該畫素區域之中; 一第二共同電極,係形成為與該資料線相重疊,其中該資 料線位於一閘極絕緣膜與一保護膜之間; 一第一儲存電極,係形成於該基板之上; 一第二儲存電極,係形成為與該第一儲存電極相重疊且與 該開關元件之一沒極形成為一單一體;以及 一有機絕緣膜,係形成於該開關元件、該第二儲存電極、 該資料線、一閘極塾、以及一資料墊之上, 其中該第二共同電極形成為覆蓋該基板之上的該資料 線、該保護膜、該有機絕緣膜以及該閘極絕緣膜,且具有到達 §亥基板之表面的傾斜表面。 (1 . 一種薄膜電晶體陣列基板,係包含有: 一基板; 一閘極線及一資料線’係彼此相交又排列用以在該基板之 33 201122695 上疋義一畫素區域; 開關7L件’係配設於該閘極線與該資料、線之一交又斤 及複二畫素電極,係自—第—晝素電極延伸出,以 及複數鮮,電極,_二畫素電極與鱗第一共同 電極係,讀排列於該基板之上形成的該晝素區域之中; 第/、同電極,係形成為與該資料線相重疊,其中該資 料線位於1極絕緣職-賴膜之間; 一第一儲存電極’係形成於該基板之上; 一第二儲存電極,係形成為與該第—儲存電極相重疊且與 該開關元件之—祕形成為u ;以及 、 有機絕緣膜,係形成於該關元件、該第二儲存電極、 §亥:貝料線、-閘極墊、以及-資料墊之上, 其中該第二共同電極形成為覆蓋該基板之上的該資料 線、該保、該有機絕賴以及關極絕_,且具有到達 該基板之表面的傾斜表面。) 2.如請求項第1項所述之細t晶體陣板,其巾形成於該開 關元件、該第二儲存電極、該_墊、以及該資料塾之上的兮 有機絕緣膜之—厚度相味於該資躲之上形成的該有機絕 緣膜之厚度更小。 3.如請求項第1項所述之薄膜電晶體陣列基板,其中該第二共同 電極由一不透明金屬形成。 衊 34 201122695 •如。月求項第1項所述之薄膜電晶體陣列基板,其中當該薄膜電 , 晶體_基板之-驅動轉係為12Q _ (Hz)時,該資料線 與該第二共同電極之間的該有機絕緣膜之厚度為a.5〜Μ微米 (μιπ)之範圍内。 5·如請求項第1項所述之_電晶體陣列基板,其中當該薄膜電 晶體陣列基板之一驅動頻率係為24〇赫兹㈤時,該資料線 與該第二共同電極之間的該有機絕緣膜之厚度為5.5〜6.5微米 (μιη)之範圍内。 6·如請求項第i項所述之_電嶋列基板,更包含有一液晶 材料之路徑’該路徑形成於與鱗之—部份相重疊之區域 -己。又為允許填充於該晝素區域巾㈣液晶材料在彼此相 鄰的畫素區域之間流動。 月求項第6項所述之薄膜電晶體陣列基板,其中該液晶材料 之該路徑透過去除與該:桃_重疊之該有機絕緣膜之一部 份形成。 8. 一種_電晶體陣職板之製造方法,係包含以下步驟: 提供一基板; 7成第金屬膜於該基板之上,並且通過一第一光 程將該第-金屬膜形成圖案為—閘極、—f_ 一第— 電極以及一閘極墊; 子 : 順次形成一間極絕緣膜、一半導體層、以及-第二金屬膜 35 201122695 於該基板之上且通過-第二光罩製程自該第二金屬膜及該半 體層形成祕/汲極、-第二儲存電極、_通道層、以及一 資料線; 順次形成-保護膜及-有機絕緣膜於該基板之上,並且通 過-第三光罩製細彡成該有機絕緣膜之圖案用以暴露該保護 膜之一部份; 順次執行第-侧步狱第二_步驟,对―侧步驟 及該第二侧步驟之中形成__有機絕緣膜用作-姓刻 光罩且透過制不同魏含職體,㈣形成該基板 之^的-晝素區域、-暴露該第二儲存電極的第—翻孔及一 暴露該閘極墊的第二接觸孔;以及 電 第三金屬膜於該基板之上,以及_將該晝素區域 中的遠第三金屬__成為—晝素電極及—第二共同 極(複數個晝素電極及複數個共同電極)。 9ΤΓ=Γ之薄膜電晶體陣列基板之製造方法,其_ 轉軸重疊之該有機職膜之至 畫素區物撕’物^在相鄰之 如請求項第8項所述之 該第三光罩製程使用— 極/汲極與該第二儲存 薄膜電晶體陣聰板之製造方法,其中 半色调光n繞射解且使得該源 電極之上㈣有機絕緣難比較於該 36 10. 201122695 貝料線之上的該有機絕緣膜之具有之厚度更小。 11’如明求項第8項所述之薄膜電晶體陣列基板之製造方法’其中 Λ第名虫刻步驟中使用的該餘刻氣體包含有六氟化硫:氧氣 (SF6:〇2)的流量比為1:2.0〜1:3.0之範圍内。 12’如4求項第8項所述之賴電晶體陣·板之製造方法,其中 4第一侧步驟巾制的該侧氣體包含有六氟化硫:氧氣 (SF6:〇2)的流量比為I:2.4〜1:3.0之範圍内。 13.如請求項第8項所述之薄膜電晶體陣列基板之製造方法,其中 透過該第二光罩製程形成的該第一接觸孔與該第二接觸孔之 该專内侧表面被平滑。 37201122695 VII. Patent application scope: 1. A thin film transistor array substrate, comprising: a substrate; a gate line and a data line' are arranged to cross each other to define a unitary region on the substrate; a switching element is disposed at an intersection of the gate line and the data line; a plurality of second halogen electrodes and a plurality of first common electrodes are alternately arranged on the substrate to form the pixel a second common electrode is formed to overlap the data line, wherein the data line is between a gate insulating film and a protective film; a first storage electrode is formed on the substrate a second storage electrode formed to overlap the first storage electrode and formed as a single body with one of the switching elements; and an organic insulating film formed on the switching element, the second storage An electrode, the data line, a gate, and a data pad, wherein the second common electrode is formed to cover the data line over the substrate, the protective film, the organic insulating film, and the A gate insulating film, and has an inclined surface to the surface of the substrate of the Hai §. (1) A thin film transistor array substrate comprising: a substrate; a gate line and a data line 'being intersect with each other and arranged to be on the substrate 33 201122695; a switch 7L piece' The system is disposed on the gate line and one of the data and the line, and the two-dimensional element electrode is extended from the first-parent element electrode, and the plurality of fresh, electrode, _ two-pixel electrode and scale a common electrode system, read and arranged in the halogen region formed on the substrate; the /, the same electrode, is formed to overlap with the data line, wherein the data line is located in the first pole insulation a first storage electrode is formed on the substrate; a second storage electrode is formed to overlap the first storage electrode and form a U with the switching element; and an organic insulating film Forming on the off component, the second storage electrode, the sho: the batter, the gate pad, and the data pad, wherein the second common electrode is formed to cover the data line above the substrate The insurance, the organic solitude and the An slanted surface having a surface that reaches the surface of the substrate.) The thin crystal array of claim 1, wherein the wiper is formed on the switching element, the second storage electrode, the _pad, And the thickness of the organic insulating film formed on the 兮 organic insulating film on the data 更 is smaller than the thickness of the organic insulating film formed on the occlusion. 3. The thin film transistor array substrate of claim 1, wherein the second common electrode is formed of an opaque metal.蔑 34 201122695 • 如. The thin film transistor array substrate according to Item 1, wherein when the thin film is electrically, the crystal substrate is driven to 12Q _ (Hz), the data line and the second common electrode are The thickness of the organic insulating film is in the range of a.5 to Μmicrometer (μιπ). 5. The transistor array substrate according to claim 1, wherein when the driving frequency of one of the thin film transistor array substrates is 24 Hz (f), the data line and the second common electrode The thickness of the organic insulating film is in the range of 5.5 to 6.5 μm. 6. The substrate according to claim i, further comprising a path of a liquid crystal material, wherein the path is formed in an area overlapping with a portion of the scale. Further, in order to allow the liquid crystal material to be filled in the halogen region, the liquid crystal material flows between the pixel regions adjacent to each other. The thin film transistor array substrate according to Item 6, wherein the path of the liquid crystal material is formed by removing a portion of the organic insulating film overlapping with the peach layer. 8. A method for manufacturing a transistor array, comprising the steps of: providing a substrate; and forming a metal film on the substrate, and patterning the first metal film by a first optical path to be- a gate, an -f_-electrode, and a gate pad; a sub-gate sequentially forming a gate insulating film, a semiconductor layer, and a second metal film 35 201122695 over the substrate and through the second mask process Forming a secret/drain, a second storage electrode, a channel layer, and a data line from the second metal film and the half layer; sequentially forming a protective film and an organic insulating film on the substrate, and passing through a third photomask is formed into a pattern of the organic insulating film for exposing a portion of the protective film; sequentially performing a second-step of the first-side jail, forming a side-by-side step and the second side step __ organic insulating film is used as a surname mask and through different Wei-containing bodies, (4) forming a substrate----------------------------------------------- a second contact hole of the pole pad; and an electric third metal film Above the substrate, and the far third metal __ in the halogen region is a halogen element electrode and a second common electrode (a plurality of halogen electrodes and a plurality of common electrodes). a method for manufacturing a thin film transistor array substrate, wherein the refractory axis overlaps the organic film to the pixel region, and the third photomask is adjacent to the eighth mask as claimed in claim 8 The process uses a pole/drain and a method of manufacturing the second storage film transistor array, wherein the halftone light n is diffracted and the organic electrode on the source electrode is hard to compare with the 36 10. 201122695 The organic insulating film above the wire has a smaller thickness. 11' The method for producing a thin film transistor array substrate according to Item 8, wherein the residual gas used in the first insecticidal step contains sulfur hexafluoride: oxygen (SF6: 〇2) The flow ratio is in the range of 1:2.0 to 1:3.0. The method for manufacturing a silicon crystal array board according to the item 4, wherein the side gas of the first side step towel comprises a flow rate of sulfur hexafluoride: oxygen (SF6: 〇2). The ratio is in the range of I: 2.4 to 1:3.0. The method of manufacturing a thin film transistor array substrate according to claim 8, wherein the first contact hole formed through the second mask process and the inner side surface of the second contact hole are smoothed. 37
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