SU993257A1

SU993257A1 - Device for obtaining quadratic function

Info

Publication number: SU993257A1
Application number: SU813323803A
Authority: SU
Inventors: Вячеслав Родионович Толокновский; Юрий Леонидович Востряков
Original assignee: Предприятие П/Я Р-6378
Priority date: 1981-08-05
Filing date: 1981-08-05
Publication date: 1983-01-30

Description

Изобретение относитс к вычислительной технике и может иг1йти применение в специализированных вычислител х информаиионно-измерительиых систем при линеаризации частотных измерительных преобразователей и при обработке информаци с частотных .датчиков.The invention relates to computing and can be used in specialized computers of information and measurement systems in the linearization of frequency transducers and in the processing of information from frequency sensors.

Известно устройство дл получени квадратичной зависимости, содеркащее два счетчика, эламеаты за1фета и зпв мент сборки It is known a device for obtaining a quadratic dependence, containing two counters, elameates for zafeta and zpv ment assembly

Недостатком данного устройства в л етс то, 4to с его кгхрда поступа ёт линейна зависимость ютуль ов во времени и лишь ее сумма дает квадфа тичную зависимость.The disadvantage of this device is that, 4to, its linear dependence of the yutul s in time arrives and only its sum gives a quadratic dependence.

Наиболее близким по технической су&оюсти к пр цлагаемсму вл етс устройство воспроизведени целых степеней, содержащее m поразр дных счетчиков, m групп элшкентов И, m элементов ИЛИ, вход и выход устройства 2 .The closest in technical terms is to the device is a device for playing whole degrees, containing m bit counters, m groups of AND, m elements OR, input and output of device 2.

Недостатком данного устройства вл етс то, что нельз получить квадрё1тичнук); зависимость в параллельном коде.The disadvantage of this device is that it is not possible to get a quad-grandchild); dependency in parallel code.

Цель изобретени - расширение функциональных возможностей устройстThe purpose of the invention is to expand the functionality of the device.

ва за счет получени квадратичной зависимо9ти в параллельном и после.довательном кодах.va due to obtaining a quadratic dependence in parallel and after the addendum codes.

Поставленна .цель достигаетс тем, что в устройство, содержащее перки делитель частоты, вход кртог рого вл етс входом устройства, счетчик участков, выходы которого соедивены с первыми входами злвлёнтов И The target is achieved by the fact that the device containing the perks of the frequency divider, the input of the bridge is the input of the device, the section counter, the outputs of which are connected to the first inputs of the terminals.

10 первой группы, вторые входы которых подключены к первым выходам первого делител частоты, первый элемент ИЛИ, входы которого соединены с выходами элементов И первой группы, второй 10 of the first group, the second inputs of which are connected to the first outputs of the first frequency divider, the first element OR, whose inputs are connected to the outputs of elements AND of the first group, the second

« делитель частоты, выходы которого подкгаочены к первым входам элементов И второй труппы, выходы которых через второй элемент ИЛИ соединены 2Q с выходом устройства, введены счетчик результатов, регистр зфанени , формирователь импульсов и элемент НЕ, вход которого подключен- к входУ устройства , а выход соединен с входом второго делител частоты, второй уп25 равл ющий выход (первого--делител частоты соединен с входом счетчика участ ков и через формирователь импульсов с первом входом регистра хранени , выходы которого подключены к вторым “A frequency divider whose outputs are hooked up to the first inputs of the elements AND the second group, whose outputs through the second element OR are connected to the device output 2Q, a result counter, a record register, a pulse driver and an element NOT whose input is connected to the device input, and the output connected to the input of the second frequency divider, the second control equalizing the output (the first one - the frequency divider is connected to the input of the segment counter and through the pulse shaper to the first input of the storage register whose outputs are connected to the second

Claims

30 entrance elements And the second group. the output of the first element OR is connected to the input of the counter, the results, you. the strokes of which are connected to the second input of the storage register. the drawing shows the block diagram of the device, the device contains the first frequency divider 1, the first group 2 elemen 1 cops AND, 3 sections counter, 4 pulses shaper, first element OR 5, NOT element b, result counter, storage register 8, rewind a group of 9 elements And, the second frequency generator 10, the second element The device operates as follows. In the initial state, the unit is recorded in the counter, and Counter 7, the divisor 1 and the register 8 are in the zero state. Wave frequency is fed to the first frequency divider 1 and through the NB b element to the second frequency divider 10. The 1 h time divider, the first group of 2 AND elements, the counter of 3 sections and the first OR 5 element are a binary multiplier, output whose passage is a linear sequence of a pulse (on the 1st segment passes one impulse on the 2nd - two pulses, etc.) and the result is fed to the input of the counter 7 in which, depending on the number of the section, the code of the quadratic dependence accumulates. the number of overflows per go divider 1 frequency. The overflow signal of the first splitter 1 hour is fed to the input of the 3 sections counter and to the input of the former of 4 pulses, which generates a pulse on the leading edge of the overflow signal and is used to write the counter code 7 of the result into the storage register 8. Similarly to the previously described, the second frequency divider 10, the storage register 8 r vtpra group of 9 elements AND the second element OR li is a binary multiplier, at the output of which we get a quadruple: dependence in the serial code depending on the plot timer or something same thing from time to time. example. 5 b 718 9 567 8 56789 10 15 21 28 36 45 10 15 21 28 3.6 45 10 15 21 28 36 45, where KU is one of the 3 sections; p - number of the site; number of pulses transmitted during the section, p. element OR 5; Ny- counter code 7 of the result at the end of the current segment; , Ng - storage register code 8; N., / N is the number of pulses that have passed during the development of a section from the element OR 11 device VSG. As can be seen from the above example, the proposed device allows, depending on the area number or time, to obtain a quadratic dependence in the parallel code. In the result counter and the serial code from the output of the device. The economic effect of using the proposed device is achieved due to the fact that the device receives a quadratic dependence in serial and parallel codes, which significantly expands the field of application of the device. J The invention The device for obtaining the fundamental dependence, containing the first frequency divider, whose input is the device input, a site counter, the outputs of which are connected to the first inputs of elements AND of the first group, the second inputs of which are connected to the first outputs of the first frequency divider, the first element OR, whose inputs are connected to the outputs of elements AND of the first group, the second frequency divider, whose outputs are connected to the first inputs of elements AND of the second group, the outputs of which through the second element OR are connected to the output of the device And often, in order to expand the field of application of the device, a quadratic 3Sc c parallel and sequential codes are entered / into it a reeushTatM counter / storage register, a pulse driver and an HE element whose input is connected to and the output is connected to the input of the second frequency divider / second ynf equal to the output of the first frequency divider connected to the input of the section counter and through the driver; I pulses with the first input cm of the storage register whose outputs are connected to the second inputs of the elements And the second group, you The move of the first element OR is connected to the input of the counter {of the results: whose outputs are connected to the second input of the registry register, Sources of information taken into account during the examination I. USSR author certificate 326588, cl. G 06 F 7/552, 1970..

2. Dancheev V., P. Digital-frequency computing devices, M., Energie, 1976, p. 45, fig. 2-6 (prototype).

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