SU760121A1 - Analogue divider - Google Patents

Description

The invention relates to electrical computing devices and can be used in analog computers.

Known separating device, 5 containing an adjustable field-effect transistor, valve elements, the control unit [1].

This device is characterized by low accuracy. ’Θ

The closest to the proposed is an analog device containing the first amplifying unit, the inverting input of which is connected 15 to the drain of the first adjustable field-effect transistor, and through the first scaling resistor with a voltage-divider source, the non-inverting input of the first amplifying unit under-20 keys transistor, the gate of which is' Connected to the output of the first amplifying unit and the gate of the third adjustable field-effect transistor, 25 second amplifying unit, inv rtiruyuschy input of which is connected to the drain of the fourth field-effect transistor controlled, whose gate is connected to one output of the divider 30 ear-

2

The other output of which is connected to the gate of the first field-effect transistor, the drain of the first and second adjustable field-effect transistors, respectively, through the first and second balancing resistors are connected to the first, the output of the power supply, the second output of which is connected to the input of the voltage divider, the third .; an amplifying unit whose inverting input through the second scaling resistor is connected to the output of a voltage-divisible source, the output of the third amplifying unit is connected to the output of the device and through the third balancing resistor to the non-inverting input of the second amplifying unit whose output through the third scaling resistor is connected to the inverting input of the third amplification block, which is output through the fourth balancing resistor coupled to the drain of the fourth ^- the adjustable field Transistor and, a non-inverting input of the third amplification block through a bias resistor connected to the sources of FETs and controlled to zero potential bus capacitor [2]

Shi ..

760121

"......... The disadvantage of the known device '

is a small dynamic range due to saturation of the third amplifying unit due to the drift of its parameters. · '"' '

The invention aims to expansion, the dynamic range of the A rise and ⁵ shenie precision work. '

To do this, in the proposed device, the drain of the third adjustable field-effect transistor through an isolating capacitor is connected to a non-inverted input of the second amplifying unit. .

The drawing shows the functional _____ scheme of the proposed device.

It contains a power source 1, a divider 2 voltage 2, the first, second, third and fourth balancing resistors 3, 4, 5 and 6, the first, second, third and fourth adjustable ........ my field-effect transistors 7, 8, 9 and 10, 20

separation capacitor 11, the voltage source of the divider 12, the first; the second and third scaling resistors 13, 14 and 15, the first, the second and. the third amplifying blocks 16, 17 and 18 "75 source voltage-dividend 19, the resistor 20 offset, bus 21 zero potential. And the output 22 .- '· *

The device works as follows. l., .- - ₃₀

From the divider 2 voltage to the valves

proportional to the magnitude of the voltage source voltage divider 12.

The bias voltage at the input of the amplifier unit 18 will greatly increase as the voltage of the voltage source-divider 12 decreases, and the third amplifying unit 18 is brought out of the linear zone into the saturation region. The presence of the separation capacitor 11 eliminates this phenomenon. So any constant voltage that occurs at the output of the third amplifying unit 18 causes current through the fourth balancing resistor 6 and the fourth adjustable field-effect transistor 10. Current Through the third balancing resistor 5, the coupling capacitor 11 and the third adjustable Field ¹ transistor 9 is absent. As a result, a voltage drop across the fourth balancing resistor 6 is applied to the differential input of the second amplifying block 17. This voltage, amplified by the second amplifying block 17, is fed to the input of the third amplifying block 18. At the same time, the offset voltage at its output is reduced to the minimum value.

As a result, the dynamic range is expanded and the accuracy of the device increases.

the first and fourth adjustable field-effect transistors 7 and 10 are fed in.— - orders, setting the mode of operation of these transistors. The inverting input of the first amplifying unit 16 through the first scaling resistor 13 is supplied with voltage from the voltage source-divider 12. The transfer ratio of the bridge circuit formed by the first and second balancing resistors 3 and 4 and the first "second regulated field-effect transistors 7 and 8 is proportional to the voltage value of the voltage source of the separator 12. The transfer coefficient of the 45 bridge circuit, formed by the third and fourth balancing, rheistors 5 and 6, and the third and fourth regimen transistors

9 and 10, is also proportional to the magnitude of the voltage source of the voltage separator 12. "...........

Pomere decrease tension from

· The voltage divider 12 _ISTO chnika reduced value of the negative inverse ³³

of the third ^ adaptive unit 18. With a zero value of the voltage source voltage-divider 12, the gain of the third amplifying unit 18 reaches a maximum of 60

^: minimum value (without negative feedback). Therefore, the voltage at the output 22 of the device is directly 'proportional to the magnitude of the voltage of the voltage source-dividend 19 and back 65

Claims (1)

Claim An analog dividing device containing the first amplifying unit, the inverting input of which is connected to the drain of the first adjustable field-effect transistor, and through the first scaling resistor with a voltage-divider source that non-inverting the input of the first amplifying unit is connected to the drain of the second adjustable Molecular transistor, the gate of which is connected to the output the first amplifying unit and the gate of the third adjustable field-effect transistor, the second amplifying unit, the inverting input of which is connected to current of the fourth controlled field-effect transistor, the gate of which is connected to one output of the voltage divider, the other output of which is connected to the gate of the first field-effect transistor, the drains of the first and second adjustable field transistors are respectively connected via the first and second balancing resistors to the first output power source, the second output of which is connected to the input of the voltage divider, the third amplifying unit, the inverting input of which is connected to the output via the second scaling resistor ode voltage-divisible source, the output of the third amplifying unit is connected to the output device .-.- G '’·' ' five 760121 6 and through the third balancing resistor - with non-inverting input of the second amplifying unit, the output of which through the third scaling resistor is connected to the inverting input of the third amplifying unit, output 5 of which through the fourth balancing resistor is connected to the drain of the fourth adjustable field-effect transistor, non-inverting input of the third amplifying unit through | d the bias resistor is connected to the sources of the adjustable field-effect transistors and to the busbar of a zero potential, an isolating capacitor, ... This is because, in order to expand the dynamic range and increase the accuracy of operation, the drain of the third adjustable field-effect transistor is connected via a coupling capacitor to the non-inverting input of the second amplifying unit.