SU754662A1 - Pulse delay device - Google Patents

Description

The invention relates to a pulse technique and can be used in devices for comparison and selection of pulses.

A device is known for the time delay of pulses containing an element And, two delay elements and two flip-flops m ·

However, in this device, the delay and the duration of the output pulses do not depend on the duration of the input pulses.

It is also known a device containing two binary counters connected via gates to a pulse generator, a time delay register and a comparison element £ 2].

In this device, the pulse duration is restored, but the delay does not depend on their duration.

A device for delaying pulses is known, which contains a driver connected to two outputs through an EL element 25 OR to a delay line with taps connected to gates whose inputs are connected through a multi-input OR element to the input of a counting trigger and an OR element [3] · 30

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However, this device has insufficient reliability due to its complexity.

The purpose of the invention is to increase the reliability of the device delay pulses.

To achieve this goal, a pulse delay device containing a driver connected by two outputs through an OR element to a delay line with trunks connected to gates whose outputs are connected via a multi-input OR element to a counting trigger input and OR elements connected in parallel to the first the inputs of the valves connected to the odd taps of the delay line and through the OR elements connected to the first inputs of the gates connected to the even taps of the delay line, with the first tap of the line ki delayed parallel via an OR gate connected to the other input gate connected to the second withdrawal of the delay line, the second tap delay line coupled to the other input gate connected to the fourth withdrawal of the delay line, the third outlet

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754662

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the delay line is connected to another input of the valve connected to

The sixth tap of the delay line and the rest in the appropriate order.

The drawing shows a functional diagram of the device.

The device contains a delay line 1 with taps, valves 2-5, shaper b, element OR 7, multi-input element OR 8, elements OR 9, 10, and counting trigger 11.

The taps of the delay line 1 are connected to the second inputs of the valves 2-5, the first output of the driver b is connected to the first input of the element OR 7. The second output of the driver b is connected to the second input of the element OR 7, the output of which is connected to the input of the delay line 1 and in parallel to the second the inputs of valves 2 and 4, connected by the first inputs to the odd taps of the delay line 1. In addition, the output of the element OR 7 is connected in parallel to the first inputs of the elements OR 9 and 10, the outputs of which are connected to the first inputs of the valves 3 and 5, connected by the second inputs to To the remote taps of the delay line 1. The second input of the element OR 9 is connected to the first tap of the delay line 1, the second input of the element OR 10 to the second tap. The outputs of the valves 2-5 are connected to the inputs of the multi-input element OR 8 / the output of which is connected by the input of the counting trigger 11.

The delayed pulses are fed to the input 12, the delayed pulses are removed from the output 13.

The device works as follows.

When a pulse arrives at input 12 of the device, the former B generates two short pulses, the first of which coincides with the position of the front, and the second with the position of the trailing edge of the input pulse, the first and second pulses arrive at the first and second inputs of the element OR, respectively. OR 7, both pulses are fed to the delay line !, the delay of which must not be less than twice the maximum duration of the input pulses, and the number of taps made at regular intervals is determined by the required precision delay. The first impulse corresponding to the leading edge of the input impulse, propagating along delay line 1, is successively fed to the second inputs of gates 2-5 at the first inputs of which, directly or through the elements OR 9 and 10, impulses come from the output of the element OR 7. As a result, that valve ( for example, on the valve 3), which is connected to a tap that is 1 distance from the beginning of the delay line equal to the duration of the input pulse, the first delayed pulse coincides with the second non-held one. The coincidence pulse, selected by the valve 3, flows through the element OR 8 to the counting trigger 11, which forms the leading edge of the output pulse.

The first pulse propagates further along the delay line 1 after a time interval equal to twice the duration of the input pulse reaches the gate 5. At the same time, the second pulse of the delay line 1 appears the second pulse, which through the element OR 10, acts on the second input of the gate 5. In As a result, a coincidence pulse appears at the output of the valve 5, relative to the pulse allocated by the valve 3 by an amount equal to the duration of the input signal. Through the element OR 8, this pulse arrives at the counting trigger 11, which forms the trailing edge of the output pulse. As a result, the output of the trigger 11 is removed impulse, delayed relative to the input for a time equal to its duration and having the same duration with it.

Simplification of the device is expressed in the fact that there is no need for a switch, which is a fairly complex node, while maintaining the accuracy parameters. In addition, it is possible to halve the number of taps and gates of the second half of the delay line 1, since to get matching pulses that form the falling edge of the output pulses, the duration of which exceeds half the maximum, you can use only even taps of the delay line. It is also necessary to take into account that in most cases there are no branches. The second half of the delay line uses only even numbers without the OR element. Thus, the number of OR gates and gates remains the same as in the publishing device. By simplifying the device, its reliability is increased.

Claims (1)

Claim A pulse delay device containing a driver connected by two outputs through an OR element to a delay line with taps connected to gates, whose outputs are connected through a multi-input OR element to the input of a counting trigger and the elements that increase reliability, the output of the element OR is connected in parallel to the first inputs of the odd-gate valves of the delay line and through the elements OR five 754662 6 connected to the first inputs of even-numbered gates, with the first tapping of the delay line in parallel through the OR element connected to the valve connected to the second tapping, the second tapping through the OR element to the valve connected to the fourth tapping, the third tapping to the sixth tapping tap and the rest - in the appropriate order.