SU532098A1 - Number-pulse function converter - Google Patents

Description

You are in static mode, i.e. there is no pulse counting.

The aim of the invention is to improve the speed of the device.

This is achieved by the fact that (the proposed device additionally contains a counter, an AND element and a shaper, which is connected to the input of the device and connected to the first output of the control unit and the first input of the second element AND, and the second output - "iBTOpoMy to the input of the fourth element AND 1 and the second input of the control unit, the third input (which is connected to the output of an additional counter, connected to the output of the second register, to the outputs of the second register, and to the output of the additional element I, oo single CHIioro (the first input with the output of the oscillator frequency generator, and the second input with the corresponding output of the control unit.

The drawing shows a block diagram of the proposed device.

The function-ion converter contains a counter-drive 1, the counting input of which through the element OR 2 and the elements AND 3, 4 is coadiped with the outputs of the pulse former 5, at the outputs of which two sequences and pulses are formed, 180 ° out of phase. The input of the foradivator 5 is connected to the input of the device, the output of the reference frequency generator 6 through the elements 7, 5 is connected respectively to the subtractive input of the reversible counter 9 and the counting input of the counter 10 connected by the bit inputs to the output | M of the register Ы. The totalized input of the counter W is connected via an And 12 element to one of the outputs of the ramp 5. The outputs of the register 13 are connected to the bit inputs 1M of the switch | Ka /, the sockets of the outputs 1 and the output indicator 14. The potential inputs of the And elements 3, 4, 7, 8, 12 and the inputs of registers //, 13 are connected to the outputs of the control unit 15 connected by the inputs respectively to the outputs of the imaging unit 5 and the outputs of the counters 9, 10.

The device works as follows.

, The command from the control unit 15 performs the initial installation in the counters 1, 10 of the codes yVj and the reset of the counter 9 to the zero state. Elements 4, 8, 12 for period G, determined by the appearance of counter overflow pulse 10, are opened to the command from the PoE unit 15. For this period, / V (frequency pulses, /.v/V, // o.

At the end of the period D), the elements AND 8, 12 are locked, while in the counter 10 the code // 2 is written in the interval between the momentum MH f And upon the arrival of the first pulse f in the control unit 15, the elements ПЛ, 7 are opened, in the counter / start pulses of frequency f X are received for the period Th, which is time required for subtracting the counter's value by 9 and frequency / o pulses until a pulse appears at the output of counter 9, which enters the control unit 15, Elements 5, 7 are closed and terminated receipt of pulses in the counter /. In this case, N pulses will go to Counter 1:

N, ll

,

The elements 4, 8 are closed when the counter 10 is disconnected AND the pulse arrives from its output to the control unit / 5. So through the element And 4 in the counter 1 will go NI them (pulse frequency D-:

L., f .. (Ni + N2) / о

and in the counter / there will be a code L., equal to the sum of the linear component yV. ,,. nonlinear component L / i and constant component NO, i.e.:

L, yVo + .V, + N ,, Lo - /. Rf

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Formula p 3 about b ete e and

A number-pulse function converter containing two registers, a reversible counter connected to the addition and subtraction inputs respectively to the outputs of two elements AND, the first input of the first of which is connected to the output of the reference frequency generator, and the first input of the second element AND connected to the first input of the third element AND connected with the first

the input of the OR element connected by the second input to the output of the fourth element AND and connected by the output to the counting input of the drive counter, the bit inputs of which are connected to the outputs of the first register, and, with the inputs of both registers, the second inputs of the first, second, third elements And The first input of the fourth element I is connected to the corresponding outputs / m of the control unit, characterized in that

the purpose of increasing the speed of the device, it additionally introduced a counter, the element And the pulse shaper connected by the input to the input of the device and connected by the first output to the first input

 control and the first input of the second element And, and the second output to the second input of the fourth element And the second input of the control unit, the third input of which is connected to the output of the additional counter,

connected by the bit inputs to the outputs of the second register, and the counting one (the input to the output of the additional element I connected by the FIRST INPUT to the output of the reference frequency generator, and the second input, m to the corresponding output of the control unit.