SU1536509A1

SU1536509A1 - Code converter

Info

Publication number: SU1536509A1
Application number: SU884398981A
Authority: SU
Inventors: Борис Михайлович Солодухин; Александр Сергеевич Серков; Сергей Михайлович Федоров; Лилия Николаевна Ким
Original assignee: Предприятие П/Я Г-4149
Priority date: 1988-03-29
Filing date: 1988-03-29
Publication date: 1990-01-15

Abstract

Изобретение относитс к автоматике и вычислительной технике. Цель изобретени - упрощение преобразовател . Преобразователь содержит логические чейки. Логическа чейка содержит элемент ИЛИ и элемент И. Преобразователь кодов вл етс многопороговым логическим элементом, реализующим на выходах пороговые функции с порогами, равными пор дковым номерам выходов, от числа переменных, равного числу входов преобразовател . 2 ил.This invention relates to automation and computing. The purpose of the invention is to simplify the converter. The converter contains logic cells. The logic cell contains the OR element and the AND element. The code converter is a multithreshold logic element that implements threshold functions at the outputs with thresholds equal to the sequence number of the outputs of the number of variables equal to the number of converter inputs. 2 Il.

Description

Изобретение относитс к автоматизации и вычислительной технике.This invention relates to automation and computing.

Цель изобретени - упрощение преобразовател .The purpose of the invention is to simplify the converter.

На фиг. 1 представлена схема преобразовател кодов-, на фиг. 2 - схема логической чейки.FIG. 1 shows a diagram of a code converter; FIG. 2 is a logic cell diagram.

Преобразователь кодов содержит логические чейки 1,1-1,25.The code converter contains logic cells 1.1-1.25.

Логическую чейку образуют элемент ИЛИ 2 и элемент И 3.The logical cell is formed by the element OR 2 and the element AND 3.

Преобразователь кодов работает следующим образом.Converter codes works as follows.

Преобразователь кодов вл етс многопороговым логическим элементом, реализующим на выходах пороговые функции (пороги, равны пор дковым номерам выходов) от числа переменных, равного числу входов преобразовател .A code converter is a multi-threshold logic element that implements threshold functions at the outputs (thresholds equal to the sequence numbers of the outputs) of a number of variables equal to the number of converter inputs.

При подаче на любую из входных шин одного единичного потенциала единичный потенциал по вл етс на соответствующем входе и выходе соответствующей чейки 15 первом выходе следующей чейки 1 и т.д. и на соответствующей выходной шине.When applying to one of the input buses of one unit potential, a unit potential appears at the corresponding input and output of the corresponding cell 15, the first output of the next cell 1, etc. and on the corresponding output bus.

Работа преобразовател кодов аналогична описанному при любом числе единичных сигналов на входных шинах.The operation of the code converter is similar to that described for any number of single signals on the input buses.

Claims

Image formula

A code converter containing logic cells, each of which has the first and second inputs, the first and second outputs, the first output of the first logic cell is connected to the same input of the second logic cell, the second output of which is connected to the first input of the third logic cell, the first output of which is connected to with the same input of the fourth logical cell, the second output of the first logical cell is connected to the first input of the fifth logical cell, the first output of which is connected to the second input

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the second logical cell, the second output of the third logical cell is connected to the first input of the sixth logical cell, the first output of which is connected to the second input of the fourth logical cell, the first output of the seventh logical cell is connected to the same input of the eighth logical cell, the second output of the seventh logical cell is connected to the first input of the ninth logical cell, the first output of which is connected to the second input of the eighth logical cell, the second output of the tenth logical cell is connected to the first input of the eleventh log the first output of which is connected to the second input of the twelfth logical cell, the second output of the eleventh logical cell is connected to the first input of the thirteenth cell, the first output of which is connected to the second input of the fourteenth logical cell, the first output of which is connected to the second input of the fifteenth logical cell, the first the output of which is connected to the second input of the sixteenth logical cell, the second output of the n thirteenth logical cell is connected to the first input of the seventeenth logical cell, the first output is eighth The logic unit cell is connected to the second input of the twelfth logic cell, the second output of which is connected to the first input of the twentieth logic cell, the second output of which is connected to the same input of the thirteenth logic cell, the second output of the eighteenth logic cell is connected to the same input of the twentieth logical cell, the second output the fourteenth logic cell is connected to the first input of the twenty first logical cell, the second output of the thirteenth logic cell is connected to the same input of the twenty the first logic cell, the twenty-second to the twenty-fifth logical cells, the second outputs of the Sixteenth and twenty-first logic cells, and the first and second outputs of the seventeenth logic cell, respectively, are the first to fourth outputs of the converter, in order to simplify the converter per

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the second output of the second logical cell is connected to the same input of the seventh logical cell, the second output of the eighth logical cell is connected to the first input of the twenty-second logical cell, the second output of which is connected to the first input of the twenty-third logical cell, the second output of the fifth logical cell is connected to the first input of the fourteenth the logical cell, the first output of the twelfth logical cell is connected to the second input of the ninth logical cell, the second output of which is connected to the first input of the twenty fifth logical cells whose first output is connected to the same input of the sixteenth logical cell, the first output of which is connected to the second input of the twenty-third logical cell, the first and second outputs of the fourth logical cell are connected, respectively, to the second inputs of the twenty-second and twenty-fifth logical cells, the second output twenty the fifth logic cell is connected to the first input of the fifteenth logical cell, the first output of the tenth logical cell is connected to the same input of the twelfth logical cell, the first and the second The second outputs of which are connected to the second inputs of the seventh and third logical cells, respectively, the first output of the twentieth logical cell is connected to the second input of the sixth logical cell, the second output of which and the first output of the twenty-first logical cell are connected respectively to the first and second inputs of the twenty-fourth logical cell, The first output of which is connected to the second input of the seventeenth logical cell, the first and second inputs of the first, tenth and eighteenth, the second inputs of the fifth and eleventh and the first input of the ninth the tenth logic cells are the first to ninth inputs of the converter, respectively; the first outputs of the eighth and twenty-second, the first and second outputs of the twenty-third, and the second output of the twenty-fourth logic cells are respectively the fifth ninth output of the converter.

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