RU2380824C1 - Alternating current amplifier with controlled amplification - Google Patents

Abstract

FIELD: radio engineering.

SUBSTANCE: device comprises the first input transistor, emitter of which is connected to the first output of statistical mode setting circuit, the second input transistor, emitter of which is connected to the second output of statistical mode setting circuit, load dipole connected to collector of the second input transistor and output of controlled amplifier, the first input of controlled amplifier, which is connected to base of the first input transistor and source of signal, the second input of controlled amplifier, which is connected to base of the second input transistor. Between the first output of statistical mode setting circuit and power supply source bus there is additional capacitor connected, collector of the first input transistor is connected to output of controlled amplifier, and the second input of controlled amplifier is connected to source of control voltage.

EFFECT: creation of conditions for electronic control of amplification ratio by voltage of AC voltage amplifier.

3 cl, 6 dwg

Description

The present invention relates to the field of radio engineering and communications and can be used as a broadband amplifier, the voltage transfer coefficient of which depends on the level of the control signal (u _y ). Such devices are used in the structure of analog microcircuits of various functional purposes, automatic gain control systems, analog signal multipliers, etc.

Currently, in analog microcircuit technology as part of input stages of operational amplifiers, multipliers of two voltages, highly linear voltage-current converters, an AC amplifier based on a differential stage containing input transistors between which emitters includes a scaling resistor is widely used (Fig. 1) . Such a structure has become the basis for the construction of almost all analogue signal multipliers currently known on the basis of differential stages and instrumental amplifiers of both domestic and foreign manufacturers of analogue microcircuits [1-15].

Within its development programs, a number of leading microelectronic companies, including Russian, begins to use technological equipment for 0.25 μm SiGe technology, capable of producing high-quality heterojunctions within a single cycle. This allows you to implement submicron transistors of the X range, as well as use the economical modes for microwave integrated circuits with a relatively high level of integration. However, the SiGe technology imposes additional and essential limitations for analog microcircuitry, expressed in the impossibility of using complementary transistors and relatively low-voltage modes of their operation (U _ke.max = 1 ÷ 2.9 V). The creation of IP block circuitry for SiGe technology is (along with its development) the most important task for foreign and domestic centers for the design of analog microcircuits.

Over the past few years, 5 V power supplies have been superseded by lower voltage ones. Requirements to reduce power dissipation and reduce the number of batteries in applications such as wireless communication devices and personal computers have led to a decrease in the supply voltage in digital devices to 1.5 V. This trend is implemented in modern SiGe transistors, which are designed to provide maximum cutoff frequency (f ₁ ) in compromise with breakdown voltage (U _pp ). For silicon SiGe transistors, there is the following fundamental limitation: f ₁ × U _pr ≈const.

Thus, the small size of the transistors, providing high values of f ₁ (up to 200 GHz), has led to a decrease in the supply voltage of microwave circuits to 1.2 ÷ 1.5 V.

In this regard, for many HF and microwave applications, AC amplifier circuits with a local feedback resistor are promising (Fig. 1, [1 ÷ 15]), in which the maximum minimum supply voltage can reach ± (1 ÷ 1.5) V The inventive UPT refers to this class of devices.

The closest prototype is an AC amplifier (USP), described in US patent No. 4511852, fig.3, containing the first input transistor 1, the emitter of which is connected to the first 2 output of the establishment of the statistical mode 3, the second 4 input transistor, the emitter of which is connected to the second 5 by the output of the establishment of the statistical mode 3, the bipolar load 6 connected to the collector of the second 4 input transistor and the output 7 of the controlled amplifier, the first 8 input of the controlled amplifier connected to the base of the first 1 input transistor RA and the signal source 9, the second 10 input of a controlled amplifier connected to the base of the second 4 input transistor.

A significant disadvantage of the known amplifier is that it does not have a special input "U" for electronic control of the gain on alternating current, "tied" to a common bus of power sources. This significantly narrows the scope of its use, does not allow implementing on its basis adaptive functional units of systems on a chip, for example, microwave amplifiers of communication systems.

The main objective of the invention is to create the conditions for electronic control of the voltage gain of the CTF. In this case, the control voltage U _y as well as the signal U _I must be supplied relative to the common bus power sources. The implementation of this goal allows you to perform on the basis of the claimed device not only broadband RF and microwave amplifiers with adjustable parameters, but to create on its basis more complex functional units, for example analog signal multipliers.

This goal is achieved by the fact that in the AC amplifier (Fig. 1) containing the first input transistor 1, the emitter of which is connected to the first 2 output of the establishment of the statistical mode 3, the second 4 input transistor, the emitter of which is connected to the second 5 output of the establishment of the statistical mode 3, bipolar load 6, connected to the collector of the second 4 input transistor and the output 7 of the controlled amplifier, the first 8 input of the controlled amplifier, connected to the base of the first 1 input transistor and the signal source 9, the second 10 input of a controlled amplifier connected to the base of the second 4 input transistor, new elements and connections are provided - an additional capacitor 14 is connected between the first output 2 of the statistical mode 3 establishment circuit and the power supply bus, the collector of the first 1 input transistor is connected to the output 7 of the controlled amplifier, and the second 10 input of the controlled amplifier is connected to a source of control voltage 15.

Figure 1 shows a diagram of the UPT prototype, and figure 2 is a diagram of the claimed remote control in accordance with paragraph 1 of the claims.

Figure 3, as well as figure 2 presents particular options for constructing a circuit establishing a static mode 3.

Figure 4 shows a diagram of the CNT of figure 2 in the environment of computer simulation PSpice on models of integrated transistors of FSUE NPP Pulsar. The results of its modeling are shown in FIGS. 5-6:

- the dependence of the gain on the voltage K _u from the frequency at different values of the control voltage U _y (figure 5);

- the dependence of the gain on the voltage To _u from the control voltage U _y .

The AC amplifier of FIG. 2 comprises a first input transistor 1, the emitter of which is connected to the first 2 output of the establishment of the statistical mode 3 circuit, a second 4 input transistor, the emitter of which is connected to the second 5 output of the establishment of the statistical mode 3 circuit, a load 6-pole connected to the collector the second 4 input transistor and the output 7 of the controlled amplifier, the first 8 input of the controlled amplifier connected to the base of the first 1 input transistor and the signal source 9, the second 10 input of the controlled amplifier, communication data base of the second 4 input transistor. Between the first output 2 of the static mode 3 establishment circuit and the power supply bus, an additional capacitor 14 is connected, the collector of the first 1 input transistor is connected to the output of the controlled amplifier 7, and the second 10 input of the controlled amplifier is connected to the control voltage source 15.

In Fig.2, in accordance with claim 2 of the claims, the establishment of the statistical mode (3) contains the first current-stabilizing two-terminal network (11) connected to the first (2) output of the establishment of the statistical mode (3), the second (12) current-stabilizing two-terminal network (12) connected to the second (5) output of the establishment of the statistical mode (3) and the first additional resistor (13) connected between the first (11) and second (12) current-stabilizing two-terminal device.

In figure 3, in accordance with claim 3 of the claims, the establishment of the statistical mode (3) contains a second current-stabilizing two-terminal network (16) connected to the first (2) output of the establishment of the statistical mode (3) through a second additional resistor (17) and the second (5) output of the static mode establishment circuit (3) through the third additional resistor (18).

Consider the operation of the claimed UPT figure 2.

In the static mode, when the control voltage is zero (u _y = 0), the emitter and collector currents of figure 2 are set by two-terminal 11 and 12 of the subcircuit 3. In this case

where I _k1 , I _k4 - collector currents of transistors 1 and 4;

I ₁₁ , I ₁₂ - currents of two-terminal 11 and 12 included in the structure of the circuit establishing a static mode 3.

The capacitance of the capacitor 14 is chosen such that in the entire frequency range ω _{x of the} signal u _{I the} inequality

where ω _x is the frequency of the signal on the channel "X";

r _e1 is the resistance of the emitter junction of the transistor 1;

φ _t ≈26 mV - temperature potential.

Therefore, the voltage gain

where R _n.eq - equivalent load resistance.

через резистор 13If the voltage at the controlled input 10 (u _y ) increases, then this leads to the appearance of current

through resistor 13

передается, с одной стороны, на выход 7 через транзистор 4, а с другой в противофазе - через транзистор 1. Если во всем диапазоне частот ω_y сигнала Increment

is transmitted, on the one hand, to output 7 through a transistor 4, and on the other, in antiphase - through a transistor 1. If in the entire frequency range ω _{y the} signal

u _y the inequality

практически без потерь поступает на выход 7 и компенсирует составляющую коллекторного тока

. В результате на выходе 7 обеспечивается полное подавление сигнала управления U_y. Как следствие, уровень постоянной составляющей выходного напряжения не изменяется, что позволяет применять непосредственную связь между каскадами.then the whole increment

almost losslessly goes to output 7 and compensates for the component of the collector current

. As a result, the output 7 provides complete suppression of the control signal U _y . As a result, the level of the constant component of the output voltage does not change, which allows the direct connection between cascades.

под действиемChange

Under the influence

u _y > 0 increases the resistance of the emitter junction of the transistor 1, which in accordance with (3) reduces K _u :

The graphs presented in FIG. 5 and FIG. 6 show that K _{u of the} claimed CTF at the selected resistances of the load resistors vary in the range 0 ÷ 70. On the basis of the claimed UPT, circuits of analog variable voltage multipliers are also implemented.

BIBLIOGRAPHIC LIST

1. M. Herpy. Analog integrated circuits. M .: Radio and communications, 1983 - S.366, Fig. 8.11.

2. Patent EP 0058448, H03F 3/45.

3. Autosvid. USSR No. 853776, G03G 3/36.

4. Autosvid. USSR No. 488317, H03H 7/44.

5. Greben A.B. Designing analog integrated circuits. M .: World - S.147, Fig. 7-5.

6. US patent No. 4146844, cl. 330-149.

7. Japanese Patent 53-33232 98 (5) A 333.

8. England patent No. 1429793 H03F 1/34.

9. England patent No. 1572079, H3T.

10. US patent No. 4511852.

11. US patent application No. 2002/0053935.

12. US patent No. 6456142, Fig.8.

13. US patent No. 5184088, figure 2.

14. US patent No. 5821810.

15. UK patent No. 2318470.

Claims (3)

1. An AC amplifier with a controlled voltage transfer coefficient, comprising a first input transistor (1), the emitter of which is connected to the first (2) output of the establishment of the statistical mode (3), a second (4) input transistor, the emitter of which is connected to the second (5) ) the output of the establishment of the statistical mode (3), the bipolar load (6) connected to the collector of the second (4) input transistor and the output (7) of the controlled amplifier, the first (8) input of the controlled amplifier connected to the base of the first (1) input transistor and is the signal source (9), the second (10) input of the controlled amplifier connected to the base of the second (4) input transistor, characterized in that between the first output (2) of the statistical mode establishment circuit (3) and the power supply bus an additional capacitor is connected (14 ), the collector of the first (1) input transistor is connected to the output (7) of the controlled amplifier, and the second (10) input of the controlled amplifier is connected to the source of control voltage (15). 2. The device according to claim 1, characterized in that the statistical mode establishment circuit (3) comprises a first current-stabilizing two-terminal network (11) connected to the first (2) output of the statistical mode establishment circuit (3), a second (12) current-stabilizing two-terminal network (12) ) is connected to the second (5) output of the statistical mode establishment circuit (3), and the first additional resistor (13) connected between the first (11) and second (12) current-stabilizing two-terminal devices. 3. The device according to claim 1, characterized in that the statistical mode establishment circuit (3) comprises a second current-stabilizing two-terminal network (16) connected to the first (2) output of the statistical mode establishment circuit (3) through a second additional resistor (17) and a second (5) the output of the establishment of the statistical mode (3) through the third additional resistor (18).

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