RU2365029C1 - Cascode difference amplifier with low offset voltage - Google Patents

Abstract

FIELD: physics; radio.

SUBSTANCE: invention concerns radio engineering and communication area and can be used as the arrangement of analogue signals amplification, in structure of analogue microcircuits of a various functional purpose (for example, operating amplifiers with low zero offset electromotive force values. The cascode difference amplifier (CDA) with low offset voltage contains the first (1) and the second (2) output transistors (T) of one type of conductance, their incorporated bases are connected to the bias potential source (3), and emitters are linked with corresponding current inputs (4, 5), and also the first (6) and the second (7) current-stabilizing two-terminal elements, the third (8) and the fourth (9) output T of other type of conductance, which emitters are linked, and bases are connected with each other, and the collector the fourth output T (9) is linked to a collector the second output T (2) and a CDA output (10), and the collector the first output T (1) is linked to a collector of the third output T (8). A termination current repeater is entered into the scheme (R), its input (12) is linked to incorporated collectors of the first (1) and the third (8) output T, the general output (13) - is connected to incorporated bases of the third (8) and the fourth (9) output T, and the output (14) - is connected with the emitter of the second (2) output T.

EFFECT: reduction of bias voltage of null.

4 cl, 14 dwg

Description

The invention relates to the field of radio engineering and communication and can be used as a device for amplifying analog signals in the structure of analog microcircuits of various functional purposes (for example, operational amplifiers with small values of the emf of zero bias (OA)).

Known circuits of the so-called “bent” cascode differential amplifiers (DU) on npn and pnp transistors [1-36], which became the basis of more than 20 serial operational amplifiers manufactured as foreign (HA2520, HA5190, AD797, AD8631, AD8632, OP90 and etc.), and by Russian (154UD3, etc.) microelectronic companies. Due to the high popularity of such a remote control architecture, more than 100 patents have been issued for their modification. The present invention relates to this subclass of devices.

The closest prototype (figure 1) of the claimed device is a cascode differential amplifier (CDA) described in the patent of Texas Instruments (USA) No. 6.304.143, containing the first 1 and second 2 output transistors of the same conductivity type, the combined bases of which are connected to a voltage source bias 3, the emitters are connected to the corresponding current inputs 4, 5, as well as the first 6 and second 7 current-stabilizing two-terminal, the third 8 and fourth 9 output transistors of a different type of conductivity, the emitters of which are combined, and the bases are connected to yz other, wherein the collector of the fourth output transistor 9 is connected to the collector of the second output transistor 2 and the output 10 of the differential cascode amplifier, and the collector of the first output transistor 1 is connected to the collector of the third output transistor 8.

A significant drawback of the known KDU (figure 1) is that it has a relatively large value of the bias voltage zero (U _cm ), which negatively affects the static parameters of various analog devices based on it.

The main objective of the invention is to reduce the bias voltage of zero.

This goal is achieved by the fact that in the cascode differential amplifier of figure 1, containing the first 1 and second 2 output transistors of the same conductivity type, the combined bases of which are connected to a bias voltage source 3, the emitters are connected to the corresponding current inputs 4, 5, as well as the first 6 and the second 7 current-stabilizing two-pole, the third 8 and fourth 9 output transistors of a different type of conductivity, the emitters of which are combined, and the bases are connected to each other, and the collector of the fourth 9 output transistor soy dinene with the collector of the second 2 output transistor and output 10 of the cascode differential amplifier, and the collector of the first output transistor 1 is connected to the collector of the third 8 output transistor, new elements and connections are provided - a matching current repeater 11 is introduced into the circuit, the input 12 of which is connected to the combined collectors of the first 1 and the third 8 output transistors, the common output 13 is connected to the combined bases of the third 8 and fourth 9 output transistors, and the output 14 is connected to the emitter of the second 2 output transistor .

The amplifier circuit of the prototype is shown in the drawing of figure 1. The drawing of figure 2 presents a diagram of the inventive device in accordance with claim 1, claim 2 of the claims. Figure 3, in accordance with paragraph 3 of the claims, shows a particular case of execution of the matching current repeater 11, which contains the first 15 additional transistor, the emitter of which is connected through a reference voltage source 16 to the common output 13 of the matching current repeater 11 and an auxiliary source current 17, the base is the input 12 of the matching current repeater 11, the collector is connected to the emitter of the second additional transistor 18, and the base of the second additional transistor 18 is the output 14 matching toritelya current 11 and the collector of transistor 18 is connected to the power source 19.

The drawing of figure 4, corresponding to claim 4 of the claims, shows another particular case of the execution of the matching current repeater 11, which contains a bias circuit 20 connected between the input 12 of the matching current repeater 11 and the additional pn junction 21, the output auxiliary transistor 22, the base of which connected to the first output of the additional pn junction 21 and the bias circuit 20, the emitter is connected to the common output 13 of the matching current follower 11 and the second output of the additional pn junction 21, and the collector is the output 14 matching a current follower 11. In the particular case (4b) bias circuit is implemented on the transistor.

The drawing of figure 5 presents a diagram of the CDA, in which the matching current repeater 11 is implemented in accordance with figure 3.

A diagram of an operational amplifier based on the proposed CDA with an input stage on elements 23 and 24 and an output stage based on a typical buffer amplifier 25 for the case when the matching current follower 11 corresponds to FIG. 4 is shown in FIG. 6.

Another special case of the CDA of FIG. 2 when performing matching current repeater 11 in accordance with the circuit of FIG. 4a is shown in FIG. 7.

The scheme of the KDU prototype in the PSpice environment on the models of integrated transistors of FSUE NPP Pulsar is shown in the drawing of Fig. 8. In this scheme, U _cm = -10.2 mV.

A diagram of the proposed CDD of FIG. 6 in a PSpice environment is shown in FIG. 9. In this circuit, without any adjustments, U _cm = 713 μV.

In the drawing of FIG. 10a, the pnp transistor macromodel of the Minsk NGO Integral is shown, and in the drawing of FIG. 10b, its β is dependent on the collector current.

The drawing of Fig. 11 shows a model of an operational amplifier based on a KDU prototype on integrated transistors of the Minsk NGO Integral. Here U _cm = 1.74 mV.

The drawing of Fig. 12 shows a diagram of an op-amp based on the inventive KDU of Fig. 5 in a PSpice environment on models of integrated transistors of NPO Integral. Here U _cm = 113.5 μV.

The differential amplifier of figure 2 contains the first 1 and second 2 output transistors of the same type of conductivity, the combined bases of which are connected to a bias voltage source 3, and the emitters are connected to the corresponding current inputs 4, 5, as well as the first 6 and second 7 current-stabilizing two-pole, third 8 and the fourth 9 output transistors of a different type of conductivity, the emitters of which are combined, and the bases are connected to each other, and the collector of the fourth 9 output transistor is connected to the collector of the second 2 output transistor and an output 10 of a cascode differential amplifier, and the collector of the first output transistor 1 is connected to the collector of the third 8 output transistor. A matching current follower 11 is introduced into the circuit, the input 12 of which is connected to the combined collectors of the first 1 and third 8 output transistors, the common output 13 is connected to the combined bases of the third 8 and fourth 9 output transistors, and the output 14 is connected to the emitter of the second 2 output transistor.

Consider the operation of the inventive cascode differential amplifier as an example of the analysis of the circuit of figure 2.

The static current mode of the KDU of FIG. 2 is set by bipolar terminals 6 and 7, taking into account the currents of the inputs 14 and 15 generated by the signal source. In this case, the currents in the circuit elements corresponding to the notation in the drawing of Fig. 2 at identical collector-emitter voltages of transistors 8 and 9 U _ke.8 = U _ke.9 (claim 2)

I _k1 = α ₁ I ₀ ,

I _k2 = α ₂ (I ₀ -I ₁₄ ),

I _k8 = I _k1 -I ₁₂ = α ₁ I ₀ -I ₁₂ ,

I _e8 = α ₈ ^-1 (α ₁ I ₀ -I ₁₂ ) = I _e9 ,

I ₁₄ = I ₁₂ K _i12.11 ,

I ₉ = α ₉ I _e9 ,

where I _кij - collector currents of transistors;

I ₄ , I ₅ - static currents of inputs 4 and 5 of the control panel;

α _i ≈1 - static current transfer coefficients of the emitter of transistors KDU;

- коэффициент передачи по току согласующего повторителя тока 11.

- current transfer coefficient matching current repeater 11.

Thus, the error current in the load R _n KDU figure 2

.

.

After transformations, the last formula can be represented as

,

,

;Where

;

.

.

In the circuit of the KDU prototype K _com = 0, since there is no additional transmission of current I ₁₂ to the output of the KDU.

In the inventive device with α ₁ = α ₂ , α ₉ = α _{8, the} current in the load due to structural errors of the circuit is significantly reduced

I _n.0 = I ₁₂ (1-K _com ) << I ₁₂ .

This reduces one component of the zero bias voltage in N _c times, where

.

.

In addition, by increasing the symmetry of the static mode in voltage, the collector-emitter of transistors 8 and 9 U _ke.8 = U _ke.9 (claim 2 of the claims), another component U _cm , which is due to internal feedback in the transistors (Earley effect), is reduced .

As computer modeling shows, in the proposed KDU, U _cm decreases without any adjustments by more than an order of magnitude.

This conclusion is valid for CDUs made both on integrated transistors of the Minsk NPO Integral and on transistors of the FSUE NPP Pulsar.

Therefore, in the circuit of FIG. 2, conditions are created under which the systematic error of amplification of the DC signals is eliminated due to the structural features of the CDD.

BIBLIOGRAPHIC LIST

1. Matavkin V.V. High-speed operational amplifiers. - M .: Radio and communications, 1989. - p. 74, fig. 4.15, p. 98, fig. 6.7.

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Claims (4)

1. A cascode differential amplifier with a low zero bias voltage, containing the first (1) and second (2) output transistors of the same conductivity type, the combined bases of which are connected to a bias voltage source (3), and the emitters are connected to the corresponding current inputs (4), (5), as well as the first (6) and second (7) current-stabilizing bipolar, the third (8) and fourth (9) output transistors of a different type of conductivity, the emitters of which are combined and the bases are connected to each other, and the collector of the fourth (9) output transistor connected to the collector of the second (2) output transistor and the output (10) of the cascode differential amplifier, and the collector of the first output transistor (1) is connected to the collector of the third (8) output transistor, characterized in that a matching current follower (11) is inserted into the circuit, the input (12) of which is connected to the combined collectors of the first (1) and third (8) output transistors, the common output (13) is connected to the combined bases of the third (8) and fourth (9) output transistors, and the output (14) is connected to the emitter second (2) output transistor . 2. The device according to claim 1, characterized in that the collector-emitter static voltage of the third output transistor (8) is approximately equal to the collector-emitter static voltage of the fourth (9) output transistor. 3. The device according to claim 1, characterized in that the matching current follower (11) contains a first (15) additional transistor, the emitter of which is connected through a reference voltage source (16) to the common output (13) of the matching current follower (11) and auxiliary a current source (17), the base is the input (12) of the matching current repeater (11), the collector is connected to the emitter of the second additional transistor (18), and the base of the second additional transistor (18) is the output (14) of the matching current repeater (11), and the collector of the transistor (18) soy Inonu to a power source (19). 4. The device according to claim 1, characterized in that the matching current follower (11) comprises a bias voltage source (20) connected between the input (12) of the matching current follower (11) and an additional pn junction (21), an output auxiliary transistor ( 22), the base of which is connected to the first output of the additional pn junction (21) and the bias voltage source (20), the emitter is connected to the common output (13) of the matching current follower (11) and the second output of the additional pn junction (21), and the collector is output (14) matching current repeater (11).

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