RU2331968C1 - Differential amplifier with high common mode rejection - Google Patents

Abstract

FIELD: electricity.

SUBSTANCE: invention may be used as analogue signal amplifier within the structures of different functional analogue microchips (for example, operational amplifiers, and comparators). Differential amplifier includes input differential stage (1) with reference current source (2) within common emitting circuit having inputs (3) and (4). Reference current source output 1 (5) and 2 (6) are connected with output transistors 1 (7) and 2 (8) emitters and corresponding current-stabilising impedors 1 (9) and 2 (10). Differential amplifier also includes current mirror (11) with input coupled to output transistor collector (7) and output connected to differential amplifier output (12) and output transistor collector (8), offset voltage source (13) linked with integrated bases of output transistors (7) and (8). Circuit is supplemented with additional input differential stage (14) with additional reference current sources (15) in common emitting circuit. Current output 1 (16) of reference current source is connected to additional current mirror input (17), while its output is linked with additional input differential stage (14) current output 2 (18) and output transistor (7) emitter, additional input differential stage (14) inputs (19) and (20) being connected to corresponding inputs (3) and (4) of input differential stage (1).

EFFECT: increased common mode rejection factor.

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Description

The invention relates to the field of radio engineering and communication and can be used as a device for amplifying analog signals in the structure of analog microcircuits for various functional purposes (for example, operational amplifiers (op amps), comparators).

Known circuits of the so-called “bent” cascode differential amplifiers (DU) on npn and pnp transistors [1-40], which became the basis of more than 20 serial operational amplifiers manufactured as foreign (NA2520, NA5190, AD797, AD8631, AD8632, OP90 and etc.), and by Russian (154UD3, etc.) microelectronic companies. Due to the high popularity of such a remote control architecture, over 100 patents have been issued for their modification for leading manufacturers of microelectronic products. The present invention relates to this subclass of devices.

The closest prototype (figure 1) of the claimed device is a differential amplifier described in US patent No. 5.327.100 (Fig. 2), containing an input differential stage 1 with a reference current source 2 in a common emitter circuit, having inputs 3 and 4, the first 5 and the second 6 current outputs of which are connected to the emitters of the first 7 and 3 of the second 8 output transistors and the corresponding first 9 and second 10 current-stabilizing two-terminal devices, a current mirror 11, the input of which is connected to the collector of the first output transistor 7, and the output is connected to the output the differential amplifier 12 and the collector of the second output transistor 8, a bias voltage source 13 connected to the combined bases of the output transistors 7 and 8.

A significant drawback of the known DE is that it does not have a sufficiently high attenuation of common-mode signals (K _os.sf ).

The main objective of the invention is to increase the attenuation coefficient of the input common-mode signals.

This goal is achieved in that in the differential amplifier of figure 1, containing the input differential stage 1 with a reference current source 2 in a common emitter circuit, having inputs 3 and 4, the first 5 and second 6 current outputs of which are connected to the emitters of the first 7 and second 8 output transistors and the corresponding first 9 and second 10 current-stabilizing two-pole, a current mirror 11, the input of which is connected to the collector of the first output transistor 7, and the output is connected to the output of the differential amplifier 12 and the collector of the second about the output transistor 8, the bias voltage source 13 connected to the combined bases of the output transistors 7 and 8, new elements and connections are provided - an additional differential stage 14 with an additional reference current source 15 in the common emitter circuit is introduced into the circuit, the first current output of which 16 is connected with the input of the additional current mirror 17, the output of which is connected with the second current output 18 of the additional differential stage 14 and the emitter of the first output transistor 7, and the inputs 19 and 20 are additionally th differential stage 14 are connected to the corresponding inputs 3 and 4 of the input differential stage 1.

A diagram of the inventive device in accordance with the claims is shown in figure 2.

Figure 3 - 4 shows a diagram of the claimed (figure 4) and known (figure 3) devices in a computer simulation environment PSpice on models of integrated transistors of FSUE NPP Pulsar.

In _Fig.5 and _Fig.6 shows the simulation results To _os.sf remote control of _Fig.3 and _Fig.4 at different values of the current transfer coefficient of the applied current mirrors.

The differential amplifier (figure 2) contains an input differential stage 1 with a reference current source 2 in a common emitter circuit, having inputs 3 and 4, the first 5 and second 6 current outputs of which are connected to the emitters of the first 7 and second 8 output transistors and the corresponding first 9 and the second 10 current-stabilizing two-pole, a current mirror 11, the input of which is connected to the collector of the first output transistor 7, and the output is connected to the output of the differential amplifier 12 and the collector of the second output transistor 8, the voltage source bias 13, associated with the combined bases of the output transistors 7 and 8. An additional differential stage 14 with an additional reference current source 15 in the common emitter circuit is introduced into the circuit, the first current output of which 16 is connected to the input of the additional current mirror 17, the output of which is connected to the second the current output 18 of the additional differential stage 14 and the emitter of the first output transistor 7, and the inputs 19 and 20 of the additional differential stage 14 are connected to the corresponding inputs 3 and 4 of the input o differential cascade 1.

Consider the operation of the claimed control when applied to its inputs 3 and 4 (19, 20) phase signal _{u c = u c3 = u c4} . The change in u _c leads to the appearance of currents i ₁₅ and i ₂ through the output conductivity of the sources of the reference current 15 and 2

These currents are transmitted to the output nodes 16, 18, 5 and 6

Based on the Kirgoff law, the collector currents of transistors 8 and 7 can be found from the equations

Therefore, the current in the load R _n due to the in-phase signal u _c

where 1-K _i = 1-K _i12.11 = 1-K _i12.17 .

After transformations, the last equation can be written as

where S _{sf.application} = 0.5 (1-K _i ) y ₂ (1-T _i ) is the steepness of the in-phase signal conversion u _c to the load current i _ns ;

T _i = N _for K _i12.11 ≈1 - gain along the compensation channel;

- коэффициент асимметрии проводимостей у₁₅ и у₂.

- coefficient of asymmetry of conductivities at ₁₅ and at ₂ .

In the prototype amplifier, the slope S _sf.prot takes on the value

Thus, in the proposed amplifier provides a deeper attenuation of the common mode signal, since

Calculations show that with typical parameters of circuit elements, the gain N _c reaches a value of 10-20 times. Therefore, the attenuation coefficient of common-mode signals in the proposed remote control increases significantly.

The above conclusions are confirmed by the simulation results of the proposed schemes in the environment of PSpice, shown in Fig.5 and Fig.6.

BIBLIOGRAPHIC LIST

1. US Patent No. 6.304.143

2. US Patent No. 5.418.491

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Claims (1)

A differential amplifier with increased common-mode attenuation, comprising an input differential stage (1) with a reference current source (2) in a common emitter circuit, having inputs (3) and (4), the first (5) and second (6) current outputs of which are connected with emitters of the first (7) and second (8) output transistors and the corresponding first (9) and second (10) current-stabilizing two-terminal devices, a current mirror (11), the input of which is connected to the collector of the first output transistor (7), and the output is connected to the output differential amplifier (12) and call to the second output transistor (8), a bias voltage source (13) associated with the combined bases of the output transistors (7) and (8), characterized in that an additional differential stage (14) with an additional reference current source (15) is introduced into the circuit in a common emitter circuit, the first current output of which (16) is connected to the input of the additional current mirror (17), the output of which is connected to the second current output (18) of the additional differential stage (14) and the emitter of the first output transistor (7), and the inputs ( 19) and (20) add An additional differential cascade (14) is connected to the corresponding inputs (3) and (4) of the input differential cascade (1).

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