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KR970063406A - METHOD FOR MANUFACTURING RETICLE FOR SEMICONDUCTOR, - Google Patents

METHOD FOR MANUFACTURING RETICLE FOR SEMICONDUCTOR, Download PDF

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Publication number
KR970063406A
KR970063406A KR1019960003067A KR19960003067A KR970063406A KR 970063406 A KR970063406 A KR 970063406A KR 1019960003067 A KR1019960003067 A KR 1019960003067A KR 19960003067 A KR19960003067 A KR 19960003067A KR 970063406 A KR970063406 A KR 970063406A
Authority
KR
South Korea
Prior art keywords
key
reticle
pattern
vernier
electron beam
Prior art date
Application number
KR1019960003067A
Other languages
Korean (ko)
Other versions
KR0174992B1 (en
Inventor
홍석종
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019960003067A priority Critical patent/KR0174992B1/en
Publication of KR970063406A publication Critical patent/KR970063406A/en
Application granted granted Critical
Publication of KR0174992B1 publication Critical patent/KR0174992B1/en

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Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605—Workpiece metrology
    • G03F7/70616—Monitoring the printed patterns
    • G03F7/70633—Overlay, i.e. relative alignment between patterns printed by separate exposures in different layers, or in the same layer in multiple exposures or stitching
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/38—Masks having auxiliary features, e.g. special coatings or marks for alignment or testing; Preparation thereof
    • G03F1/44—Testing or measuring features, e.g. grid patterns, focus monitors, sawtooth scales or notched scales
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605—Workpiece metrology
    • G03F7/70681—Metrology strategies
    • G03F7/70683—Mark designs
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605—Workpiece metrology
    • G03F7/706843—Metrology apparatus
    • G03F7/706845—Calibration, e.g. tool-to-tool calibration, beam alignment, spot position or focus
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/30—Electron-beam or ion-beam tubes for localised treatment of objects
    • H01J37/317—Electron-beam or ion-beam tubes for localised treatment of objects for changing properties of the objects or for applying thin layers thereon, e.g. for ion implantation
    • H01J37/3174—Particle-beam lithography, e.g. electron beam lithography

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)

Abstract

0.03㎛ 피치 패턴을 갖는 버니어-키를 제작하는 방법 및 이에 이용되는 반도체용 레티클 제작방법에 관한 것이다.And a method of manufacturing a reticle for semiconductor used therefor.

본 발명은, 컴퓨터를 이용하여 레티클을 구성하는 각 부분에 대하여 각기 해당하는 특정 패턴에 대한 데이터 작업을 수행하는 단계, 상기 각 특정 패턴의 데이터를 테이프에 패턴으로 형성하는 단계, 상기 각 데이터 패턴에 따라 전자빔작업을 수행하여 레티클상에 상기 각 특정 패턴을 형성하는 단계를 구비하여 이루어지는 반도체용 레티클 제작방법에 있어서, 상기 버너어-키부에 형성되는 특정 패턴에 대하여 전자빔작업시 레티클의 다른 구성부분과 독립하여 일정비율로 축소하여 원하는 크기의 버니어-키를 형성하며, 0.05㎛ 피이 패턴을 갖는 버니어-키 데이터에 대하여 60% 축소하는 전자빔작업을 통해 0.03㎛ 피치 패턴을 갖는 버니어-키를 제작한다.According to the present invention, there is provided a method for manufacturing a reticle, comprising the steps of: performing a data operation on a specific pattern corresponding to each part constituting a reticle by using a computer; And forming the specific pattern on the reticle by performing an electron beam operation on the reticle, wherein the specific pattern to be formed on the burner-key part is different from the other constituent parts of the reticle The vernier-key having a 0.03-μm pitch pattern is manufactured through an electron beam operation in which a vernier-key of a desired size is independently reduced to a desired size and the vernier-key data having a 0.05-μm pitch pattern is reduced by 60%.

따라서, 0.25㎛ 스폿 사이즈를 이용할 수 있어서 레티클 제작이 용이하며, 원가절감의 효과가 있다.Therefore, it is possible to use a 0.25 mu m spot size, thereby facilitating the production of a reticle and reducing the cost.

Description

반도체용 레티클 제작방법 및 버니어-키 제작방법METHOD FOR MANUFACTURING RETICLE FOR SEMICONDUCTOR,

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제3도는 본 발명의 일 실시예에 따른 버어너-키 데이터 작업시의 버니어-키 데이터를 나타내는 도면이다.FIG. 3 is a view showing vernier-key data at the time of burner-key data operation according to an embodiment of the present invention.

Claims (4)

컴퓨터를 이용하여 레티클을 구성하는 메인부, 스크라이브 라인부, 버니어-키부 및 테그부에 각기 해당하는 특정 패턴에 대한 데이터작업을 수행하는 단계, 상기 각 특정 패턴의 데이터를 테이프에 패턴으로 형성하는 단계, 상기 각 데이터 패턴에 따라 전자빔작업을 수행하여 레티클상에 상기 각 특정 패턴을 형성하는 단계를 구비하여 이루어지는 반도체용 레티클 제작방법에 있어서, 상기 버니어-키부에 형성되는 특정 패턴에 대하여 전자빔작업시 레티클의 다른 구성부분과 독립하여 일정 비율로 축소하여 원하는 크기의 비니어-키를 형성하는 것을 특징으로 하는 반도체용 레티클 제작방법.Performing a data operation on a specific pattern corresponding to a main part, a scribe line part, a vernier-key part and a tag part constituting a reticle by using a computer, forming data of each specific pattern on a tape as a pattern And forming the specific pattern on the reticle by performing an electron beam operation according to the data pattern, the method comprising the steps of: forming a pattern on a reticle, Wherein the veneer key is reduced to a constant ratio independently of the other constituent parts of the veneer key to form a veneer-key of a desired size. 제1항에 있어서, 상기 데이터작업시 버니어-키의 피치 패턴은 0.05㎛로 하며, 상기 전자빔작업시 60% 축소하여 레티클상에 0.03㎛ 피치 패턴을 갖는 버니어-키를 형성하는 것을 특징으로 하는 반도체용 레티클 제작방법.2. The semiconductor device according to claim 1, characterized in that the pitch pattern of the vernier-key is 0.05 mu m in the data operation, and the vernier-key is formed by 60% reduction in the electron beam operation to have a pitch pattern of 0.03 mu m on the reticle Method for manufacturing a reticle. 제2항에 있어서, 상기 전자빔작업시 사용되는 스폿 사이즈는 0.25㎛인 것을 특징으로 하는 반도체용 레티클 제작방법.3. The method according to claim 2, wherein the spot size used in the electron beam work is 0.25 mu m. 전스텝에 의한 기준키에 대하여 상대적인 위치관계를 검사하여 반도체 웨이퍼에 형성되는 패턴의 정렬정도를 확인할 수 있는 버니어-키의 제작방법에 있어서, 컴퓨터를 이용하여 0.05㎛ 피치 패턴을 갖는 버니어-키 데이터작업을 수행하는 단계; 상기 비니어-키 데이터를 기초하여 테이프에 버니어-키 패턴을 형성하는 단계; 스폿사이즈가 0.25㎛이며, 60% 축소(shrink)한 전자빔작업을 수행하여 레티클상에 0.03㎛ 피치 패턴을 갖는 버니어-키를 형성하는 단계; 및 상기 레티클상의 버니어-키를 웨이퍼상에 전사하는 단계를 구비하여 이루어진 것을 특징으로 하는 비니어-키 제작방법.A method of manufacturing a vernier-key capable of verifying the degree of alignment of a pattern formed on a semiconductor wafer by inspecting a relative positional relationship with respect to a reference key by a previous step, comprising the steps of: Performing an operation; Forming a vernier-key pattern on the tape based on the veneer-key data; Performing electron beam work with a spot size of 0.25 占 퐉 and shrunk 60% to form a vernier-key having a 0.03 占 퐉 pitch pattern on the reticle; And transferring the vernier-key on the reticle onto a wafer. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: It is disclosed by the contents of the first application.
KR1019960003067A 1996-02-08 1996-02-08 Manufacturing method of semiconductor reticle and manufacturing method of vernier-key KR0174992B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960003067A KR0174992B1 (en) 1996-02-08 1996-02-08 Manufacturing method of semiconductor reticle and manufacturing method of vernier-key

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960003067A KR0174992B1 (en) 1996-02-08 1996-02-08 Manufacturing method of semiconductor reticle and manufacturing method of vernier-key

Publications (2)

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KR970063406A true KR970063406A (en) 1997-09-12
KR0174992B1 KR0174992B1 (en) 1999-04-01

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KR1019960003067A KR0174992B1 (en) 1996-02-08 1996-02-08 Manufacturing method of semiconductor reticle and manufacturing method of vernier-key

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