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KR970024032A - 인터페이스 조립체를 구비한 유에프비지에이(ufbga) 패키지 - Google Patents

인터페이스 조립체를 구비한 유에프비지에이(ufbga) 패키지 Download PDF

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Publication number
KR970024032A
KR970024032A KR1019950036163A KR19950036163A KR970024032A KR 970024032 A KR970024032 A KR 970024032A KR 1019950036163 A KR1019950036163 A KR 1019950036163A KR 19950036163 A KR19950036163 A KR 19950036163A KR 970024032 A KR970024032 A KR 970024032A
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South Korea
Prior art keywords
package
interface assembly
substrate
ufcga
anisotropic conductive
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KR1019950036163A
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KR100201383B1 (ko
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김진성
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문정환
엘지반도체 주식회사
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Priority to KR1019950036163A priority Critical patent/KR100201383B1/ko
Priority to US08/581,956 priority patent/US5877549A/en
Priority to JP25296A priority patent/JP2844058B2/ja
Publication of KR970024032A publication Critical patent/KR970024032A/ko
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Publication of KR100201383B1 publication Critical patent/KR100201383B1/ko
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
    • H05K3/323—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives by applying an anisotropic conductive adhesive layer over an array of pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
    • H01L2924/07811—Extrinsic, i.e. with electrical conductive fillers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10719—Land grid array [LGA]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/09—Treatments involving charged particles
    • H05K2203/095—Plasma, e.g. for treating a substrate to improve adhesion with a conductor or for cleaning holes

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

본 발명은 기판의 하부에 인터페이스 조립체를 설치한 UFBGA 패키지에 관한 것이다. 인터페이스 조립체는 전극돌기와, 이방성 전도필름과 광분해성 접착필름으로 구성된다. 그리고, 본 발명의 UFBGA 패키지는 인쇄 회로기판에 부착시 광분해성 접착필름을 노광하여 제거후 사용하게 되므로 이방성 전도필름의 수명을 연장시킬 수 있다. 아울러 솔더볼을 사용하지 않으므로 볼의 장착공정이 생략되어 생산성을 향상시킴과 동시에 원가절감을 할 수 있다.

Description

인터페이스 조립체를 구비한 유에프비지에이(UFBGA) 패키지
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 2도는 본 발명의 일 실시예에 따른 UFBGA 패키지를 나타낸 단면도.

Claims (9)

  1. 기판의 상부에 접착제로 부착된 반도체 칩과, 상기 반도체 칩의 패드와 기판의 도체패턴을 전기적으로 연결하기 위한 와이어와, 상기 반도체 칩과 와이어의 외부를 둘러싸는 에폭시 몰딩 컴파운드(EMC)와, 기판의 하부에 형성된 외부단자에 연결된 솔더볼을 구비한 BGA 패키지에 있어서, 상기 기판의 하부에 인터페이스 조립체를 설치한 것을 특징으로 하는 인터페이스 조립체를 구비한 유에프비지에이(UFBGA) 패키지.
  2. 제 1항에 있어서, 상기 인터페이스 조립체는 전극돌기와, 이방성 전도필름과 광분해성 접착필름으로 구성되는 것을 특징으로 하는 인터페이스 조립체를 구비한 유에프비지에어(UFBGA) 패키지.
  3. 제 1항에 있어서, 상기 기판은, 그 하부에 솔더볼 대신에 전극돌기를 설치한 것을 특징으로 하는 인터페이스 조립체를 구비한 유에프비지에이(UFBGA) 패키지.
  4. 제 3항에 있어서, 상기 전극돌기는 1mm 이하인 것을 특징으로 하는 인터페이스 조립체를 구비한 유에프비지에이(UFBGA) 패키지.
  5. 제 3항에 있어서, 상기 전극돌기는 Au 또는 Ag으로 도금된 것을 특징으로 하는 인터페이스 조립체를 구비한 유에프비지에이(UFBGA) 패키지.
  6. 제 2항에 있어서, 상기 이방성 전도필름은 그 내부에 복수개의 도전성볼을 구비한 것을 특징으로 하는 인터페이스 조립체를 구비한 유에프비지에이(UFBGA) 패키지.
  7. 제 6항에 있어서, 상기 이방성 전도필름의 두께는 5-200㎛의 범위내에 있는 것을 특징으로 하는 인터페이스 조립체를 구비한 유에프비지에이(UFBGA) 패키지.
  8. 제 2항에 있어서, 상기 광분해성 접착필름은 노블락/폴리에스테르 조성물의 하나로 이루어진 것을 특징으로 하는 인터페이스 조립체를 구비한 유에프비지에이(UFBGA) 패키지.
  9. 제 2항에 있어서, 상기 광분해성 접착필름은, 부착시 노광에 의해 제거되는 것을 특징으로 하는 인터페이스 조립체를 구비한 유에프비지에이(UFBGA) 패키지.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950036163A 1995-10-19 1995-10-19 인터페이스 조립체를 구비한 유에프비지에이 패키지 Expired - Fee Related KR100201383B1 (ko)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1019950036163A KR100201383B1 (ko) 1995-10-19 1995-10-19 인터페이스 조립체를 구비한 유에프비지에이 패키지
US08/581,956 US5877549A (en) 1995-10-19 1996-01-02 UFBGA package equipped with interface assembly including a photosoluble layer
JP25296A JP2844058B2 (ja) 1995-10-19 1996-01-05 半導体パッケージ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950036163A KR100201383B1 (ko) 1995-10-19 1995-10-19 인터페이스 조립체를 구비한 유에프비지에이 패키지

Publications (2)

Publication Number Publication Date
KR970024032A true KR970024032A (ko) 1997-05-30
KR100201383B1 KR100201383B1 (ko) 1999-06-15

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Country Link
US (1) US5877549A (ko)
JP (1) JP2844058B2 (ko)
KR (1) KR100201383B1 (ko)

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US7220615B2 (en) * 2001-06-11 2007-05-22 Micron Technology, Inc. Alternative method used to package multimedia card by transfer molding
KR100429856B1 (ko) * 2001-11-15 2004-05-03 페어차일드코리아반도체 주식회사 스터드 범프가 있는 웨이퍼 레벨 칩 스케일 패키지 및 그 제조 방법
US20050012225A1 (en) * 2002-11-15 2005-01-20 Choi Seung-Yong Wafer-level chip scale package and method for fabricating and using the same
US20040191955A1 (en) * 2002-11-15 2004-09-30 Rajeev Joshi Wafer-level chip scale package and method for fabricating and using the same
US20050176233A1 (en) * 2002-11-15 2005-08-11 Rajeev Joshi Wafer-level chip scale package and method for fabricating and using the same
US7728437B2 (en) * 2005-11-23 2010-06-01 Fairchild Korea Semiconductor, Ltd. Semiconductor package form within an encapsulation
CN103901236B (zh) * 2014-03-06 2016-04-20 广东工业大学 一种超精细无极金属丝栅网封装环

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US4731282A (en) * 1983-10-14 1988-03-15 Hitachi Chemical Co., Ltd. Anisotropic-electroconductive adhesive film
EP0289026B1 (en) * 1987-05-01 1994-12-28 Canon Kabushiki Kaisha External circuit connecting method and packaging structure
US5283468A (en) * 1988-05-30 1994-02-01 Canon Kabushiki Kaisha Electric circuit apparatus
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Also Published As

Publication number Publication date
US5877549A (en) 1999-03-02
JPH09129779A (ja) 1997-05-16
KR100201383B1 (ko) 1999-06-15
JP2844058B2 (ja) 1999-01-06

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