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AU634334B2 - Packaging structure and method for packaging a semiconductor device - Google Patents

Packaging structure and method for packaging a semiconductor device

Info

Publication number
AU634334B2
AU634334B2 AU69824/91A AU6982491A AU634334B2 AU 634334 B2 AU634334 B2 AU 634334B2 AU 69824/91 A AU69824/91 A AU 69824/91A AU 6982491 A AU6982491 A AU 6982491A AU 634334 B2 AU634334 B2 AU 634334B2
Authority
AU
Australia
Prior art keywords
packaging
semiconductor device
packaging structure
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
AU69824/91A
Other versions
AU6982491A (en
Inventor
Atsushi Miki
Masanori Nishiguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2013418A external-priority patent/JPH03218040A/en
Priority claimed from JP2013419A external-priority patent/JPH03218041A/en
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Publication of AU6982491A publication Critical patent/AU6982491A/en
Application granted granted Critical
Publication of AU634334B2 publication Critical patent/AU634334B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67144Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/81801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01061Promethium [Pm]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15172Fan-out arrangement of the internal vias
    • H01L2924/15173Fan-out arrangement of the internal vias in a single layer of the multilayer substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30105Capacitance
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0266Marks, test patterns or identification means
    • H05K1/0268Marks, test patterns or identification means for electrical inspection or testing
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10674Flip chip
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16Inspection; Monitoring; Aligning
    • H05K2203/166Alignment or registration; Control of registration
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49133Assembling to base an electrical component, e.g., capacitor, etc. with component orienting
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49144Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
AU69824/91A 1990-01-23 1991-01-22 Packaging structure and method for packaging a semiconductor device Ceased AU634334B2 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2013418A JPH03218040A (en) 1990-01-23 1990-01-23 Semiconductor element mounting method
JP2-13419 1990-01-23
JP2013419A JPH03218041A (en) 1990-01-23 1990-01-23 Mounting method of semiconductor element
JP2-13418 1990-01-23

Publications (2)

Publication Number Publication Date
AU6982491A AU6982491A (en) 1991-07-25
AU634334B2 true AU634334B2 (en) 1993-02-18

Family

ID=26349223

Family Applications (1)

Application Number Title Priority Date Filing Date
AU69824/91A Ceased AU634334B2 (en) 1990-01-23 1991-01-22 Packaging structure and method for packaging a semiconductor device

Country Status (5)

Country Link
US (2) US5092033A (en)
EP (1) EP0439136A2 (en)
KR (1) KR950002744B1 (en)
AU (1) AU634334B2 (en)
CA (1) CA2034702A1 (en)

Families Citing this family (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2034703A1 (en) * 1990-01-23 1991-07-24 Masanori Nishiguchi Substrate for packaging a semiconductor device
US5152055A (en) * 1991-04-26 1992-10-06 At&T Bell Laboratories Article alignment method
US5456018A (en) * 1994-02-28 1995-10-10 The Whitaker Corporation Alignment system for planar electronic devices arranged in parallel fashion
TW312079B (en) * 1994-06-06 1997-08-01 Ibm
FR2725560B1 (en) * 1994-10-06 1996-12-20 Commissariat Energie Atomique METHOD FOR EXCHANGING A HYBRID COMPONENT BY WELDING BALLS
KR0137826B1 (en) * 1994-11-15 1998-04-28 문정환 Package method and device package
JPH08201432A (en) * 1995-01-25 1996-08-09 Matsushita Electric Ind Co Ltd Probe sheet and its manufacture
US5637835A (en) * 1995-05-26 1997-06-10 The Foxboro Company Automatic test detection of unsoldered thru-hole connector leads
US5661042A (en) * 1995-08-28 1997-08-26 Motorola, Inc. Process for electrically connecting electrical devices using a conductive anisotropic material
KR100201383B1 (en) * 1995-10-19 1999-06-15 구본준 UFVIE package with interface assembly
JP3593833B2 (en) * 1997-02-10 2004-11-24 富士通株式会社 Semiconductor device
JPH10284535A (en) * 1997-04-11 1998-10-23 Toshiba Corp Method for producing semiconductor device and semiconductor component
US6389688B1 (en) 1997-06-18 2002-05-21 Micro Robotics Systems, Inc. Method and apparatus for chip placement
DE19738548A1 (en) * 1997-09-03 1999-03-11 Siemens Ag ASIC-type chip-card integrated circuit design
JPH11163047A (en) * 1997-11-27 1999-06-18 Toshiba Corp Manufacture of semiconductor device and apparatus therefor
US6046910A (en) * 1998-03-18 2000-04-04 Motorola, Inc. Microelectronic assembly having slidable contacts and method for manufacturing the assembly
JP2000294771A (en) * 1999-04-02 2000-10-20 Fuji Electric Co Ltd Planar type semiconductor device
JP3756348B2 (en) * 1999-06-15 2006-03-15 沖電気工業株式会社 Misalignment detection pattern
US6142361A (en) * 1999-12-09 2000-11-07 International Business Machines Corporation Chip C4 assembly improvement using magnetic force and adhesive
US6376263B1 (en) * 2000-01-24 2002-04-23 International Business Machines Corporation Non-destructive module placement verification
EP1136960A1 (en) * 2000-03-24 2001-09-26 Infineon Technologies AG Individual arrangement
US7057292B1 (en) * 2000-05-19 2006-06-06 Flipchip International, Llc Solder bar for high power flip chips
KR100429856B1 (en) * 2001-11-15 2004-05-03 페어차일드코리아반도체 주식회사 Wafer level chip scale package having stud bump and method for fabricating the same
US20050012225A1 (en) * 2002-11-15 2005-01-20 Choi Seung-Yong Wafer-level chip scale package and method for fabricating and using the same
US20050176233A1 (en) * 2002-11-15 2005-08-11 Rajeev Joshi Wafer-level chip scale package and method for fabricating and using the same
US20040191955A1 (en) * 2002-11-15 2004-09-30 Rajeev Joshi Wafer-level chip scale package and method for fabricating and using the same
US7109583B2 (en) * 2004-05-06 2006-09-19 Endwave Corporation Mounting with auxiliary bumps
US20060028228A1 (en) * 2004-08-05 2006-02-09 Bor-Doou Rong Test pads for IC chip
JP4570446B2 (en) * 2004-11-16 2010-10-27 パナソニック株式会社 Semiconductor wafer and inspection method thereof
US7928591B2 (en) * 2005-02-11 2011-04-19 Wintec Industries, Inc. Apparatus and method for predetermined component placement to a target platform
US20070187844A1 (en) * 2006-02-10 2007-08-16 Wintec Industries, Inc. Electronic assembly with detachable components
US7728437B2 (en) * 2005-11-23 2010-06-01 Fairchild Korea Semiconductor, Ltd. Semiconductor package form within an encapsulation
US20110222252A1 (en) * 2006-02-10 2011-09-15 Kong-Chen Chen Electronic assembly with detachable components
US20110223695A1 (en) * 2006-02-10 2011-09-15 Kong-Chen Chen Electronic assembly with detachable components
US20110228506A1 (en) * 2006-02-10 2011-09-22 Kong-Chen Chen Electronic assembly with detachable components
US20110222253A1 (en) * 2006-02-10 2011-09-15 Kong-Chen Chen Electronic assembly with detachable components
TWI307406B (en) 2006-07-06 2009-03-11 Au Optronics Corp Misalignment detection devices
FR2928030B1 (en) * 2008-02-22 2010-03-26 Commissariat Energie Atomique METHOD FOR ALIGNING TWO SUBSTRATES WITH MICROBOBINS
CN104779238B (en) * 2014-01-10 2018-08-21 中芯国际集成电路制造(上海)有限公司 A kind of detection structure and detection method of wafer bond quality

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US4776088A (en) * 1987-11-12 1988-10-11 The United States Of America As Represented By The United States Department Of Energy Placement accuracy gauge for electrical components and method of using same
US4924589A (en) * 1988-05-16 1990-05-15 Leedy Glenn J Method of making and testing an integrated circuit
US4970780A (en) * 1986-12-15 1990-11-20 Shin-Etsu Polymer Co., Ltd. Method for the assemblage of a semiconductor device

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JPS61123868A (en) * 1984-11-21 1986-06-11 キヤノン株式会社 Positioning securing method for panel substrate
JPH0746747B2 (en) * 1986-09-09 1995-05-17 松下電器産業株式会社 Semiconductor laser bonding method
DD266208A1 (en) * 1987-10-30 1989-03-22 Elektromat Veb METHOD FOR DETERMINING MALFUNCTIONS IN THE MANUFACTURE OF SEMICONDUCTOR ARRANGEMENTS
WO1989007339A1 (en) * 1988-02-05 1989-08-10 Raychem Limited Uses of uniaxially electrically conductive articles

Patent Citations (3)

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Publication number Priority date Publication date Assignee Title
US4970780A (en) * 1986-12-15 1990-11-20 Shin-Etsu Polymer Co., Ltd. Method for the assemblage of a semiconductor device
US4776088A (en) * 1987-11-12 1988-10-11 The United States Of America As Represented By The United States Department Of Energy Placement accuracy gauge for electrical components and method of using same
US4924589A (en) * 1988-05-16 1990-05-15 Leedy Glenn J Method of making and testing an integrated circuit

Also Published As

Publication number Publication date
US5302854A (en) 1994-04-12
KR950002744B1 (en) 1995-03-24
US5092033A (en) 1992-03-03
EP0439136A2 (en) 1991-07-31
AU6982491A (en) 1991-07-25
EP0439136A3 (en) 1994-01-05
CA2034702A1 (en) 1991-07-24

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