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KR970022714A - Computer and TV, video signal interface device - Google Patents

Computer and TV, video signal interface device Download PDF

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Publication number
KR970022714A
KR970022714A KR1019950038464A KR19950038464A KR970022714A KR 970022714 A KR970022714 A KR 970022714A KR 1019950038464 A KR1019950038464 A KR 1019950038464A KR 19950038464 A KR19950038464 A KR 19950038464A KR 970022714 A KR970022714 A KR 970022714A
Authority
KR
South Korea
Prior art keywords
signal
clock signal
outputting
computer
synchronization
Prior art date
Application number
KR1019950038464A
Other languages
Korean (ko)
Inventor
윤상진
Original Assignee
배순훈
대우전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 배순훈, 대우전자 주식회사 filed Critical 배순훈
Priority to KR1019950038464A priority Critical patent/KR970022714A/en
Publication of KR970022714A publication Critical patent/KR970022714A/en

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Abstract

본 발명은 컴퓨터에서의 영상 신호를 텔레비젼으로 볼 수 있도록 변환하도록 한 컴퓨터와 텔레비젼의 영상 신호 인터페이스 장치에 관한 것으로, 컴퓨터(100)로부터의 R, G, B 색 신호를 직류 레벨의 변동 없이 일정하게 유지시켜서 임시 저장하여 출력하는 제1버퍼부(210)와 ; 상기 컴퓨터(100)로부터의 제1수평, 수직 동기 신호를 임시 저장하여 출력하는 제2버퍼부(220)와 ; 상기 제2버퍼부(220)로부터의 제1수평, 수직 동기 신호에 기초하여 제1클럭 신호를 2분주한 제2클럭 신호와, 읽기/쓰기 제어 신호, 제2수평, 수직 동기 신호를 선택적으로 출력하는 동기 제어부(230)와 ; 상기 동기 제어부(230)로부터의 제1클럭 신호에 의거하여 제1버퍼부(210)로부터의 R, G, B 색 신호를 샘플링하고 소정 비트의 디지탈 색 신호로 변환하여 출력하는 A/D변환부(240)와 ; 상기 동기 제어부(230)로부터의 제1클럭 신호에 동기되어 읽기/쓰기 제어 신호에 의거하여 상기 A/D변환부(240)로부터의 디지탈 색 신호를 하나의 라인량만큼 저장하고, 상기 동기 제어부(230)로부터의 제2클럭 신호에 동기되어 읽기/쓰기 제어 신호에 의거하여 저장된 하나의 라인량만큼의 디지탈 색 신호를 출력하는 라인 메모리부(250)와 ; 상기 라인 메모리부(250)로부터의 디지탈 색 신호를 상기 제2클럭 신호에 의거하여 아날로그 R, G, B 색 신호로 변환하여 출력하는 D/A변환부(260)를 포함하여, 컴퓨터의 게임 및 입체 영상을 대형 텔레비젼등의 디스플레이 장치로 볼 수 있도록 한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal interface device of a computer and a television which converts a video signal from a computer so that it can be viewed on a television. A first buffer unit 210 for temporarily storing and outputting the same; A second buffer unit 220 for temporarily storing and outputting a first horizontal and vertical synchronization signal from the computer 100; A second clock signal obtained by dividing the first clock signal into two parts based on the first horizontal and vertical synchronization signals from the second buffer unit 220, and a read / write control signal and a second horizontal and vertical synchronization signals A synchronization control unit 230 for outputting; An A / D converter configured to sample R, G, and B color signals from the first buffer unit 210 based on the first clock signal from the synchronization controller 230, and convert the R, G, and B color signals into a predetermined bit of digital color signals 240 and; The digital color signal from the A / D converter 240 is stored by one line based on a read / write control signal in synchronization with the first clock signal from the synchronization controller 230, and the synchronization controller ( A line memory section 250 for synchronizing with the second clock signal from 230 and outputting a digital color signal corresponding to one line amount stored based on the read / write control signal; A computer game including a D / A converter 260 for converting the digital color signal from the line memory unit 250 into analog R, G, and B color signals based on the second clock signal and outputting the analog color signal. Stereoscopic images can be viewed on display devices such as large televisions.

Description

컴퓨터와 텔레비젼의 영상 신호 인터페이스 장치Computer and TV, video signal interface device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 발명에 따른 인터페이스 장치에 대한 블럭도.1 is a block diagram of an interface device according to the present invention.

제2도는 본 발명을 설명하기 위한 파형도.2 is a waveform diagram for explaining the present invention.

Claims (1)

컴퓨터(100)의 영상 신호를 텔레비젼 영상 신호 포맷으로 변환할 수 있도록 한 인터페이스 장치(200)로서, 상기 컴퓨터(100)로부터의 R, G, B 색 신호를 직류 레벨의 변동없이 일정하게 유지시켜 출력하는 제1버퍼부(210)와 ; 상기 컴퓨터(100)로부터의 제1수평, 수직 동기 신호를 임시 저장하여 출력하는 제2버퍼부(220)와 ; 상기 제2버퍼부(220)로부터의 제1수평, 수직 동기 신호에 기초하여 제1클럭 신호와 상기 제1클럭 신호를 2분주한 제2클럭 신호와, 읽기/쓰기 제어 신호, 제2수평, 수직 동기 신호를 선택적으로 출력하는 동기 제어부(230)와 ; 상기 동기 제어부(230)로부터의 제1클럭 신호에 의거하여 제1버퍼부(210)로부터의 R, G, B 색 신호를 샘플링하고 소정 비트의 디지탈 색 신호로 변환하여 출력하는 A/D변환부(240)와 ; 상기 동기 제어부(230)로부터의 제1클럭 신호에 동기되어 읽기/쓰기 제어 신호에 의거하여 상기 A/D변환부(240)로부터의 디지탈 색 신호를 하나의 라인량만큼 저장하고, 상기 동기 제어부(230)로부터의 제2클럭 신호에 동기되어 읽기/쓰기 제어 신호에 의거하여 저장된 하나의 라인양만큼의 디지탈 색 신호를 출력하는 라인 메모리부(250)와 ; 상기 라인 메모리부(250)로부터의 디지탈 색 신호를 상기 제2클럭 신호에 의거하여 아날로그 R, G, B 색 신호로 변환하여 출력하는 D/A 변환부(260)를 포함하는 컴퓨터와 텔레비젼의 영상 신호 인터페이스 장치.An interface device 200 capable of converting a video signal of a computer 100 into a television video signal format, wherein the R, G, and B color signals from the computer 100 are constantly maintained without a change in a DC level. A first buffer portion 210 to be formed; A second buffer unit 220 for temporarily storing and outputting a first horizontal and vertical synchronization signal from the computer 100; A second clock signal obtained by dividing the first clock signal and the first clock signal into two parts based on a first horizontal and vertical synchronization signal from the second buffer unit 220, a read / write control signal, a second horizontal signal, A synchronization controller 230 for selectively outputting a vertical synchronization signal; An A / D converter configured to sample R, G, and B color signals from the first buffer unit 210 based on the first clock signal from the synchronization controller 230, and convert the R, G, and B color signals into a predetermined bit of digital color signals 240 and; The digital color signal from the A / D converter 240 is stored by one line based on a read / write control signal in synchronization with the first clock signal from the synchronization controller 230, and the synchronization controller ( A line memory section 250 for synchronizing with the second clock signal from 230 and outputting a digital color signal equal to the amount of one line stored based on the read / write control signal; An image of a computer and a television including a D / A converter 260 for converting a digital color signal from the line memory unit 250 into analog R, G, and B color signals based on the second clock signal and outputting the analog color signal. Signal interface device. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950038464A 1995-10-31 1995-10-31 Computer and TV, video signal interface device KR970022714A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950038464A KR970022714A (en) 1995-10-31 1995-10-31 Computer and TV, video signal interface device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950038464A KR970022714A (en) 1995-10-31 1995-10-31 Computer and TV, video signal interface device

Publications (1)

Publication Number Publication Date
KR970022714A true KR970022714A (en) 1997-05-30

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Application Number Title Priority Date Filing Date
KR1019950038464A KR970022714A (en) 1995-10-31 1995-10-31 Computer and TV, video signal interface device

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100294536B1 (en) * 1997-12-09 2001-07-12 윤종용 Televison output graphic device and the method thereof in computer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100294536B1 (en) * 1997-12-09 2001-07-12 윤종용 Televison output graphic device and the method thereof in computer

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Patent event code: PA01091R01D

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